[PATCH 1/4] ARM: rdu2: config PMIC SW1AB and SW1C rails to 1.375

[PATCH 1/4] ARM: rdu2: config PMIC SW1AB and SW1C rails to 1.375

[Lucas Stach]

This is the default out-of-reset voltage, but if only the i.MX6 SoC
got reset, the PMIC might still be stuck at the lower volatge for the
slow operating point.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 arch/arm/boards/zii-imx6q-rdu2/board.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm/boards/zii-imx6q-rdu2/board.c b/arch/arm/boards/zii-imx6q-rdu2/board.c
index c99f993f02b8..49cc234c020b 100644
--- a/arch/arm/boards/zii-imx6q-rdu2/board.c
+++ b/arch/arm/boards/zii-imx6q-rdu2/board.c
@@ -16,6 +16,7 @@
 #include <common.h>
 #include <envfs.h>
 #include <gpio.h>
+#include <i2c/i2c.h>
 #include <init.h>
 #include <mach/bbu.h>
 #include <mach/imx6.h>
@@ -137,10 +138,27 @@ late_initcall(rdu2_enable_front_panel_usb);
 
 static int rdu2_devices_init(void)
 {
+	struct i2c_client client;
+
 	if (!of_machine_is_compatible("zii,imx6q-zii-rdu2") &&
 	    !of_machine_is_compatible("zii,imx6qp-zii-rdu2"))
 		return 0;
 
+	client.adapter = i2c_get_adapter(1);
+	if (client.adapter) {
+		u8 reg;
+
+		/*
+		 * Reset PMIC SW1AB and SW1C rails to 1.375V. If an event
+		 * caused only the i.MX6 SoC reset, the PMIC might still be
+		 * stuck on the low voltage for the slow operating point.
+		 */
+		client.addr = 0x08; /* PMIC i2c address */
+		reg = 0x2b; /* 1.375V, valid for both rails */
+		i2c_write_reg(&client, 0x20, &reg, 1);
+		i2c_write_reg(&client, 0x2e, &reg, 1);
+	}
+
 	barebox_set_hostname("rdu2");
 
 	imx6_bbu_internal_spi_i2c_register_handler("SPI", "/dev/m25p0.barebox",
-- 
2.19.1


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[PATCH 2/4] ARM: rdu2: configure the USB port as OTG

[Lucas Stach]

While the USB port is host-only for the Linux system, it is useful
to be able to switch it into device mode for debugging purposes in
Barebox.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 arch/arm/dts/imx6qdl-zii-rdu2.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/dts/imx6qdl-zii-rdu2.dtsi b/arch/arm/dts/imx6qdl-zii-rdu2.dtsi
index f63b5d2ed760..a885e4f3f2c0 100644
--- a/arch/arm/dts/imx6qdl-zii-rdu2.dtsi
+++ b/arch/arm/dts/imx6qdl-zii-rdu2.dtsi
@@ -124,3 +124,7 @@
 		};
 	};
 };
+
+&usbotg {
+	dr_mode = "otg";
+};
-- 
2.19.1


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[PATCH 3/4] ARM: rdu2: program e1000 iNVM

[Lucas Stach]

Check if the iNVM is already correctly written. If it isn't write
the correct value in, so the device uses the correct PCI ID for the
Linux driver.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 arch/arm/boards/zii-imx6q-rdu2/board.c | 30 ++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm/boards/zii-imx6q-rdu2/board.c b/arch/arm/boards/zii-imx6q-rdu2/board.c
index 49cc234c020b..960c5ba53301 100644
--- a/arch/arm/boards/zii-imx6q-rdu2/board.c
+++ b/arch/arm/boards/zii-imx6q-rdu2/board.c
@@ -15,6 +15,7 @@
 
 #include <common.h>
 #include <envfs.h>
+#include <fs.h>
 #include <gpio.h>
 #include <i2c/i2c.h>
 #include <init.h>
@@ -226,3 +227,32 @@ static int rdu2_ethernet_init(void)
 	return 0;
 }
 late_initcall(rdu2_ethernet_init);
+
+#define I210_CFGWORD_PCIID_157B	0x157b1a11
+static int rdu2_i210_invm(void)
+{
+	int fd;
+	u32 val;
+
+	if (!of_machine_is_compatible("zii,imx6q-zii-rdu2") &&
+	    !of_machine_is_compatible("zii,imx6qp-zii-rdu2"))
+		return 0;
+
+	fd = open("/dev/e1000-invm0", O_RDWR);
+	if (fd < 0) {
+		pr_err("could not open e1000 iNVM device!\n");
+		return fd;
+	}
+
+	pread(fd, &val, sizeof(val), 0);
+	if (val == I210_CFGWORD_PCIID_157B) {
+		pr_debug("i210 already programmed correctly\n");
+		return 0;
+	}
+
+	val = I210_CFGWORD_PCIID_157B;
+	pwrite(fd, &val, sizeof(val), 0);
+
+	return 0;
+}
+late_initcall(rdu2_i210_invm);
-- 
2.19.1


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[PATCH 4/4] ARM: rdu2: fix warnings in Barebox internal DT

[Lucas Stach]

Drop partially wrong pcie nodes, so we pick up the correct ones
from the kernel DT.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 arch/arm/dts/imx6qdl-zii-rdu2.dtsi | 16 +++-------------
 1 file changed, 3 insertions(+), 13 deletions(-)

diff --git a/arch/arm/dts/imx6qdl-zii-rdu2.dtsi b/arch/arm/dts/imx6qdl-zii-rdu2.dtsi
index a885e4f3f2c0..a77b9001834f 100644
--- a/arch/arm/dts/imx6qdl-zii-rdu2.dtsi
+++ b/arch/arm/dts/imx6qdl-zii-rdu2.dtsi
@@ -110,19 +110,9 @@
 	};
 };
 
-&pcie {
-	host@0 {
-		#address-cells = <3>;
-		#size-cells = <2>;
-		reg = <0 0 0 0 0>;
-		device_type = "pci";
-
-		i210: i210@0 {
-			reg = <0 0 0 0 0>;
-			nvmem-cells = <&mac_address_1>;
-			nvmem-cell-names = "mac-address";
-		};
-	};
+&i210 {
+	nvmem-cells = <&mac_address_1>;
+	nvmem-cell-names = "mac-address";
 };
 
 &usbotg {
-- 
2.19.1


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Re: [PATCH 1/4] ARM: rdu2: config PMIC SW1AB and SW1C rails to 1.375

[Sascha Hauer]

On Thu, Nov 01, 2018 at 07:25:52PM +0100, Lucas Stach wrote:
> This is the default out-of-reset voltage, but if only the i.MX6 SoC
> got reset, the PMIC might still be stuck at the lower volatge for the
> slow operating point.

s/volatge/voltage and applied, thanks

Sascha

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