From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gQBcv-0002q8-VL for barebox@lists.infradead.org; Fri, 23 Nov 2018 13:36:11 +0000 From: Michael Tretter Date: Fri, 23 Nov 2018 14:35:52 +0100 Message-Id: <20181123133553.24761-3-m.tretter@pengutronix.de> In-Reply-To: <20181123133553.24761-1-m.tretter@pengutronix.de> References: <20181123133553.24761-1-m.tretter@pengutronix.de> MIME-Version: 1.0 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "barebox" Errors-To: barebox-bounces+u.kleine-koenig=pengutronix.de@lists.infradead.org Subject: [PATCH 2/3] ARM: aarch64: compile with general-regs-only To: barebox@lists.infradead.org Cc: Michael Tretter Without this flag, gcc generates code to save the Q/V registers to the stack for handling the va_list in pr_print(). Saving the registers is use useless, as the registers are never restored, but this hangs the CPU. Follow the Linux arch/arm64/Makefile and the general-regs-only flag, to prevent usage of floating point and Advanced SIMD register. Signed-off-by: Michael Tretter --- arch/arm/Makefile | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 5db67b9db8..50958b787f 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -27,6 +27,10 @@ else CFLAGS += -mstrict-align endif +# Prevent use of floating point and Advanced SIMD registers. +ifeq ($(CONFIG_CPU_V8),y) +CFLAGS += -mgeneral-regs-only +endif # This selects which instruction set is used. # Note that GCC does not numerically define an architecture version -- 2.19.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox