From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from mail-pg1-x544.google.com ([2607:f8b0:4864:20::544]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gYlKG-0001S9-KQ for barebox@lists.infradead.org; Mon, 17 Dec 2018 05:20:32 +0000 Received: by mail-pg1-x544.google.com with SMTP id g189so5528439pgc.5 for ; Sun, 16 Dec 2018 21:20:10 -0800 (PST) From: Andrey Smirnov Date: Sun, 16 Dec 2018 21:18:43 -0800 Message-Id: <20181217051925.17582-24-andrew.smirnov@gmail.com> In-Reply-To: <20181217051925.17582-1-andrew.smirnov@gmail.com> References: <20181217051925.17582-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "barebox" Errors-To: barebox-bounces+u.kleine-koenig=pengutronix.de@lists.infradead.org Subject: [PATCH v2 23/65] PCI: designware: Keep viewport fixed for IO transaction if num_viewport > 2 To: barebox@lists.infradead.org Cc: Andrey Smirnov Port of a Linux commit fe48cb8538421fbd16ecf8bf95829faf8d8c001e Most of the platforms have 3 or more viewports. For such platforms, We do not need to share viewports between IO and CFG. Assign viewport 2 to IO transactions in such cases. Tested-by: Dong Bo Signed-off-by: Pratyush Anand Signed-off-by: Bjorn Helgaas Acked-by: Rob Herring Signed-off-by: Andrey Smirnov --- drivers/pci/pcie-designware.c | 26 +++++++++++++++++++------- drivers/pci/pcie-designware.h | 1 + 2 files changed, 20 insertions(+), 7 deletions(-) diff --git a/drivers/pci/pcie-designware.c b/drivers/pci/pcie-designware.c index a6006201e..a591ac7a9 100644 --- a/drivers/pci/pcie-designware.c +++ b/drivers/pci/pcie-designware.c @@ -61,6 +61,7 @@ #define PCIE_ATU_VIEWPORT 0x900 #define PCIE_ATU_REGION_INBOUND (0x1 << 31) #define PCIE_ATU_REGION_OUTBOUND (0x0 << 31) +#define PCIE_ATU_REGION_INDEX2 (0x2 << 0) #define PCIE_ATU_REGION_INDEX1 (0x1 << 0) #define PCIE_ATU_REGION_INDEX0 (0x0 << 0) #define PCIE_ATU_CR1 0x904 @@ -404,6 +405,10 @@ int __init dw_pcie_host_init(struct pcie_port *pp) if (ret) pp->lanes = 0; + ret = of_property_read_u32(np, "num-viewport", &pp->num_viewport); + if (ret) + pp->num_viewport = 2; + if (pp->ops->host_init) pp->ops->host_init(pp); @@ -450,9 +455,10 @@ static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, type, cpu_addr, busdev, cfg_size); ret = dw_pcie_cfg_read(va_cfg_base + where, size, val); - dw_pcie_prog_outbound_atu(pp, PCIE_ATU_REGION_INDEX0, - PCIE_ATU_TYPE_IO, pp->io_mod_base, - pp->io_bus_addr, pp->io_size); + if (pp->num_viewport <= 2) + dw_pcie_prog_outbound_atu(pp, PCIE_ATU_REGION_INDEX0, + PCIE_ATU_TYPE_IO, pp->io_mod_base, + pp->io_bus_addr, pp->io_size); return ret; } @@ -488,9 +494,10 @@ static int dw_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus, type, cpu_addr, busdev, cfg_size); ret = dw_pcie_cfg_write(va_cfg_base + where, size, val); - dw_pcie_prog_outbound_atu(pp, PCIE_ATU_REGION_INDEX0, - PCIE_ATU_TYPE_IO, pp->io_mod_base, - pp->io_bus_addr, pp->io_size); + if (pp->num_viewport <= 2) + dw_pcie_prog_outbound_atu(pp, PCIE_ATU_REGION_INDEX0, + PCIE_ATU_TYPE_IO, pp->io_mod_base, + pp->io_bus_addr, pp->io_size); return ret; } @@ -643,10 +650,15 @@ void dw_pcie_setup_rc(struct pcie_port *pp) * uses its own address translation component rather than ATU, so * we should not program the ATU here. */ - if (!pp->ops->rd_other_conf) + if (!pp->ops->rd_other_conf) { dw_pcie_prog_outbound_atu(pp, PCIE_ATU_REGION_INDEX1, PCIE_ATU_TYPE_MEM, pp->mem_mod_base, pp->mem_bus_addr, pp->mem_size); + if (pp->num_viewport > 2) + dw_pcie_prog_outbound_atu(pp, PCIE_ATU_REGION_INDEX2, + PCIE_ATU_TYPE_IO, pp->io_base, + pp->io_bus_addr, pp->io_size); + } dw_pcie_wr_own_conf(pp, PCI_BASE_ADDRESS_0, 4, 0); diff --git a/drivers/pci/pcie-designware.h b/drivers/pci/pcie-designware.h index b2f492a5d..62f04e69b 100644 --- a/drivers/pci/pcie-designware.h +++ b/drivers/pci/pcie-designware.h @@ -40,6 +40,7 @@ struct pcie_port { struct resource busn; int irq; u32 lanes; + u32 num_viewport; struct pcie_host_ops *ops; struct pci_controller pci; u8 iatu_unroll_enabled; -- 2.19.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox