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From: Andrey Smirnov <andrew.smirnov@gmail.com>
To: barebox@lists.infradead.org
Cc: Andrey Smirnov <andrew.smirnov@gmail.com>
Subject: [PATCH 6/7] ARM: dts: imx8mq: Add nodes for USB IP blocks
Date: Tue, 26 Feb 2019 19:16:56 -0800	[thread overview]
Message-ID: <20190227031657.19896-7-andrew.smirnov@gmail.com> (raw)
In-Reply-To: <20190227031657.19896-1-andrew.smirnov@gmail.com>

Add node for USB IP block that is missing in upstream DTS. This patch
should be reverted once that changes.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/dts/imx8mq.dtsi | 73 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 73 insertions(+)

diff --git a/arch/arm/dts/imx8mq.dtsi b/arch/arm/dts/imx8mq.dtsi
index 153808b1c..4bb384f66 100644
--- a/arch/arm/dts/imx8mq.dtsi
+++ b/arch/arm/dts/imx8mq.dtsi
@@ -152,6 +152,16 @@
 						power-domains = <&pgc_pcie2_phy>;
 					};
 
+					pgc_otg1: power-domain@2 {
+						#power-domain-cells = <0>;
+						reg = <2>;
+					};
+
+					pgc_otg2: power-domain@3 {
+						#power-domain-cells = <0>;
+						reg = <3>;
+					};
+
 					pgc_pcie2_phy: gpc_power_domain@10 {
 						#power-domain-cells = <0>;
 						reg = <10>;
@@ -172,6 +182,69 @@
 			};
 		};
 
+
+		usb_dwc3_0: usb@38100000 {
+			compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
+			reg = <0x38100000 0x10000>;
+			clocks = <&clk IMX8MQ_CLK_USB_BUS>,
+			         <&clk IMX8MQ_CLK_USB_CORE_REF>,
+			         <&clk IMX8MQ_CLK_USB1_CTRL_ROOT>;
+			clock-names = "bus_early", "ref", "suspend";
+			assigned-clocks = <&clk IMX8MQ_CLK_USB_BUS>,
+			                  <&clk IMX8MQ_CLK_USB_CORE_REF>;
+			assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_500M>,
+			                         <&clk IMX8MQ_SYS1_PLL_100M>;
+			assigned-clock-rates = <500000000>, <100000000>;
+			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+			phys = <&usb3_phy0>, <&usb3_phy0>;
+			phy-names = "usb2-phy", "usb3-phy";
+			power-domains = <&pgc_otg1>;
+			status = "disabled";
+		};
+
+		usb3_phy0: phy@381f0040 {
+			compatible = "fsl,imx8mq-usb-phy";
+			reg = <0x381f0040 0x40>;
+			clocks = <&clk IMX8MQ_CLK_USB1_PHY_ROOT>;
+			clock-names = "phy";
+			assigned-clocks = <&clk IMX8MQ_CLK_USB_PHY_REF>;
+			assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_100M>;
+			assigned-clock-rates = <100000000>;
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
+		usb_dwc3_1: usb@38200000 {
+			compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
+			reg = <0x38200000 0x10000>;
+			clocks = <&clk IMX8MQ_CLK_USB_BUS>,
+			         <&clk IMX8MQ_CLK_USB_CORE_REF>,
+			         <&clk IMX8MQ_CLK_USB2_CTRL_ROOT>;
+			clock-names = "bus_early", "ref", "suspend";
+			assigned-clocks = <&clk IMX8MQ_CLK_USB_BUS>,
+			                  <&clk IMX8MQ_CLK_USB_CORE_REF>;
+			assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_500M>,
+			                         <&clk IMX8MQ_SYS1_PLL_100M>;
+			assigned-clock-rates = <500000000>, <100000000>;
+			interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+			phys = <&usb3_phy1>, <&usb3_phy1>;
+			phy-names = "usb2-phy", "usb3-phy";
+			power-domains = <&pgc_otg2>;
+			status = "disabled";
+		};
+
+		usb3_phy1: phy@382f0040 {
+			compatible = "fsl,imx8mq-usb-phy";
+			reg = <0x382f0040 0x40>;
+			clocks = <&clk IMX8MQ_CLK_USB2_PHY_ROOT>;
+			clock-names = "phy";
+			assigned-clocks = <&clk IMX8MQ_CLK_USB_PHY_REF>;
+			assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_100M>;
+			assigned-clock-rates = <100000000>;
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
 		pcie0: pcie@33800000 {
 			compatible = "fsl,imx8mq-pcie";
 			reg = <0x33800000 0x400000>,
-- 
2.20.1


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  parent reply	other threads:[~2019-02-27  3:17 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-27  3:16 [PATCH 0/7] i.MX8MQ PCIe/USB DT changes Andrey Smirnov
2019-02-27  3:16 ` [PATCH 1/7] PCI: imx6: Add code to request/control "pcie_aux" clock for i.MX8MQ Andrey Smirnov
2019-02-27  3:16 ` [PATCH 2/7] ARM: imx8mq: Add node for SRC IP block Andrey Smirnov
2019-02-27  3:16 ` [PATCH 3/7] ARM: imx8mq: Add node for GPC " Andrey Smirnov
2019-02-27  3:16 ` [PATCH 4/7] ARM: imx8mq: Add nodes for PCIE1 and PCIE2 IP blocks Andrey Smirnov
2019-02-27  3:16 ` [PATCH 5/7] ARM: imx8mq-zii-ultra: Enable PCIE1 and PCIE2 Andrey Smirnov
2019-02-27 11:18   ` Lucas Stach
2019-02-28  2:42     ` Andrey Smirnov
2019-02-27  3:16 ` Andrey Smirnov [this message]
2019-02-27  3:16 ` [PATCH 7/7] ARM: imx8mq-zii-ultra: Add USB related nodes Andrey Smirnov
2019-02-27 11:10   ` Lucas Stach
2019-02-28  2:43     ` Andrey Smirnov
2019-02-27  7:43 ` [PATCH 0/7] i.MX8MQ PCIe/USB DT changes Sascha Hauer

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