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From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH] ARM: Fix cpu_info for armv8
Date: Mon,  4 Mar 2019 12:33:11 +0100	[thread overview]
Message-ID: <20190304113311.1434-1-s.hauer@pengutronix.de> (raw)

We have get_cr() to get the control register for the different exception
levels. Use it rather than the variant hardcoded for EL1.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/cpu/cpuinfo.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/arch/arm/cpu/cpuinfo.c b/arch/arm/cpu/cpuinfo.c
index 175475b038..1ba3b4379c 100644
--- a/arch/arm/cpu/cpuinfo.c
+++ b/arch/arm/cpu/cpuinfo.c
@@ -19,6 +19,7 @@
 #include <common.h>
 #include <command.h>
 #include <complete.h>
+#include <asm/system.h>
 
 #define CPU_ARCH_UNKNOWN	0
 #define CPU_ARCH_ARMv3		1
@@ -76,11 +77,7 @@ static int do_cpuinfo(int argc, char *argv[])
 		:
 		: "memory");
 
-	__asm__ __volatile__(
-		"mrs	%0, sctlr_el1\n"
-		: "=r" (cr)
-		:
-		: "memory");
+	cr = get_cr();
 #else
 	__asm__ __volatile__(
 		"mrc    p15, 0, %0, c0, c0, 0   @ read control reg\n"
-- 
2.20.1


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                 reply	other threads:[~2019-03-04 11:33 UTC|newest]

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