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From: Rouven Czerwinski <r.czerwinski@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Subject: [PATCH] ARM: imx: disable IPU QoS setup for i.MX6 UL/ULL
Date: Sat, 13 Apr 2019 10:49:28 +0200	[thread overview]
Message-ID: <20190413084928.27923-1-r.czerwinski@pengutronix.de> (raw)

Neither of the two devices has an IPU, disable the setup for both SoCs.

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
---
 arch/arm/mach-imx/imx6.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index 01b4274ed3..6c08f22b7a 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -117,7 +117,8 @@ static void imx6_setup_ipu_qos(void)
 	uint32_t val;
 
 	if (!cpu_mx6_is_mx6q() && !cpu_mx6_is_mx6d() &&
-	    !cpu_mx6_is_mx6dl() && cpu_mx6_is_mx6s())
+	    !cpu_mx6_is_mx6dl() && (cpu_mx6_is_mx6s() || cpu_mx6_is_mx6ul() ||
+				    cpu_is_mx6ull()))
 		return;
 
 	val = readl(iomux + IOMUXC_GPR4);
-- 
2.21.0


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             reply	other threads:[~2019-04-13  8:49 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-13  8:49 Rouven Czerwinski [this message]
2019-04-15  7:03 ` Ahmad Fatoum

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