From: Sascha Hauer <s.hauer@pengutronix.de>
To: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH] ARM: aarch64: lowlevel: Reset SCTLR_EL3 in arm_cpu_lowlevel_init()
Date: Fri, 26 Apr 2019 07:40:23 +0200 [thread overview]
Message-ID: <20190426054023.buemc3xvt3a2m4hw@pengutronix.de> (raw)
In-Reply-To: <20190424063248.478-1-andrew.smirnov@gmail.com>
On Tue, Apr 23, 2019 at 11:32:48PM -0700, Andrey Smirnov wrote:
> There's no guarantee that when arm_cpu_lowlevel_init() runs at EL3,
> SCTLR will be in a state we expect it to be. Add code to reset it to a
> known state, so we'd always start form clean slate. This is also
> matches what we've been doing non 64-bit ARMs.
>
> Real word motivation for this patch is i.MX8MQ whose rev 2.1 silicon
> appear to have different mask ROM behaviour where it now leaves MMU
> enabled if no valid boot source is found. Page table it sets up
> doesn't include DDR range, so trying to bootstrap the device via
> JTAG/OpenOCD results in an abort.
>
> The value for SCTLR_ELx_FLAGS was taken from Linux kernel.
>
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> ---
> arch/arm/cpu/lowlevel_64.S | 7 +++++++
> arch/arm/include/asm/system.h | 20 ++++++++++++++++++++
> 2 files changed, 27 insertions(+)
Applied, thanks
Sascha
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prev parent reply other threads:[~2019-04-26 5:40 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-24 6:32 Andrey Smirnov
2019-04-26 5:40 ` Sascha Hauer [this message]
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