From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: barebox@lists.infradead.org
Cc: pza@pengutronix.de, Ahmad Fatoum <a.fatoum@pengutronix.de>
Subject: [PATCH v2 2/5] clk: imx6: Make the LDB_DI0 and LDB_DI1 clocks read-only
Date: Tue, 21 May 2019 17:56:23 +0200 [thread overview]
Message-ID: <20190521155626.9906-3-a.fatoum@pengutronix.de> (raw)
In-Reply-To: <20190521155626.9906-1-a.fatoum@pengutronix.de>
From: Philipp Zabel <p.zabel@pengutronix.de>
Due to incorrect placement of the clock gate cell in the ldb_di[x]_clk
tree, the glitchy parent mux of ldb_di[x]_clk can cause a glitch to
enter the ldb_di_ipu_div divider. If the divider gets locked up, no
ldb_di[x]_clk is generated, and the LVDS display will hang when the
ipu_di_clk is sourced from ldb_di_clk.
To fix the problem, both the new and current parent of the ldb_di_clk
should be disabled before the switch. As this can not be guaranteed by
the clock framework during runtime, make the ldb_di[x]_sel muxes read-only.
A workaround to set the muxes once during boot could be added to the
kernel or bootloader.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
[afa: ported from Linux kernel commit 03d576f202]
[afa: added exception for i.MX6QP, see kernel commit f4a0a6c309]
[afa: added cpu_has_err009219 helper function]
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
drivers/clk/imx/clk-imx6.c | 17 +++++++++++++++--
drivers/clk/imx/clk.h | 8 ++++++++
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/imx/clk-imx6.c b/drivers/clk/imx/clk-imx6.c
index 319485f8521c..01b649ebbd26 100644
--- a/drivers/clk/imx/clk-imx6.c
+++ b/drivers/clk/imx/clk-imx6.c
@@ -64,6 +64,12 @@ static inline int cpu_is_plus(void)
return cpu_is_mx6qp() || cpu_is_mx6dp();
}
+/* i.MX6 Quad/Dual/DualLite/Solo are all affected */
+static inline int cpu_has_err009219(void) {
+ return cpu_is_mx6d() || cpu_is_mx6q() ||
+ cpu_is_mx6dl() || cpu_is_mx6s();
+}
+
static const char *step_sels[] = {
"osc",
"pll2_pfd2_396m",
@@ -300,8 +306,15 @@ static void imx6_add_video_clks(void __iomem *anab, void __iomem *cb)
clks[IMX6QDL_CLK_IPU1_SEL] = imx_clk_mux("ipu1_sel", cb + 0x3c, 9, 2, ipu_sels, ARRAY_SIZE(ipu_sels));
clks[IMX6QDL_CLK_IPU2_SEL] = imx_clk_mux("ipu2_sel", cb + 0x3c, 14, 2, ipu_sels, ARRAY_SIZE(ipu_sels));
- clks[IMX6QDL_CLK_LDB_DI0_SEL] = imx_clk_mux_p("ldb_di0_sel", cb + 0x2c, 9, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels));
- clks[IMX6QDL_CLK_LDB_DI1_SEL] = imx_clk_mux_p("ldb_di1_sel", cb + 0x2c, 12, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels));
+
+ if (cpu_has_err009219()) {
+ clks[IMX6QDL_CLK_LDB_DI0_SEL] = imx_clk_mux_ldb("ldb_di0_sel", cb + 0x2c, 9, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels));
+ clks[IMX6QDL_CLK_LDB_DI1_SEL] = imx_clk_mux_ldb("ldb_di1_sel", cb + 0x2c, 12, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels));
+ } else {
+ clks[IMX6QDL_CLK_LDB_DI0_SEL] = imx_clk_mux_p("ldb_di0_sel", cb + 0x2c, 9, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels));
+ clks[IMX6QDL_CLK_LDB_DI1_SEL] = imx_clk_mux_p("ldb_di1_sel", cb + 0x2c, 12, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels));
+ }
+
clks[IMX6QDL_CLK_IPU1_DI0_PRE_SEL] = imx_clk_mux_p("ipu1_di0_pre_sel", cb + 0x34, 6, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels));
clks[IMX6QDL_CLK_IPU1_DI1_PRE_SEL] = imx_clk_mux_p("ipu1_di1_pre_sel", cb + 0x34, 15, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels));
clks[IMX6QDL_CLK_IPU2_DI0_PRE_SEL] = imx_clk_mux_p("ipu2_di0_pre_sel", cb + 0x38, 6, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels));
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 875c76a8b3e4..04286f03f727 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -39,6 +39,14 @@ static inline struct clk *imx_clk_divider_table(const char *name,
width, table, 0);
}
+static inline struct clk *imx_clk_mux_ldb(const char *name, void __iomem *reg,
+ u8 shift, u8 width, const char **parents, int num_parents)
+{
+ return clk_mux(name, CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT, reg,
+ shift, width, parents, num_parents, CLK_MUX_READ_ONLY);
+}
+
+
static inline struct clk *imx_clk_fixed_factor(const char *name,
const char *parent, unsigned int mult, unsigned int div)
{
--
2.20.1
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next prev parent reply other threads:[~2019-05-21 15:56 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-21 15:56 [PATCH v2 0/5] clk: imx6: work around LDB hang caused by ERR009219 Ahmad Fatoum
2019-05-21 15:56 ` [PATCH v2 1/5] clk: imx6: remove quirky clk_set_parent(LDB_diN_sel, pll5_video_div) Ahmad Fatoum
2019-05-23 10:01 ` Philipp Zabel
2019-05-23 10:28 ` Ahmad Fatoum
2019-05-26 21:55 ` Andrey Smirnov
2019-05-27 6:29 ` Ahmad Fatoum
2019-05-27 6:50 ` Andrey Smirnov
2019-05-27 7:23 ` Ahmad Fatoum
2019-05-27 7:28 ` Andrey Smirnov
2019-05-27 7:49 ` Ahmad Fatoum
2019-05-27 8:02 ` Andrey Smirnov
2019-05-27 9:19 ` Ahmad Fatoum
2019-05-27 7:25 ` Andrey Smirnov
2019-05-27 7:39 ` Ahmad Fatoum
2019-05-21 15:56 ` Ahmad Fatoum [this message]
2019-05-23 10:01 ` [PATCH v2 2/5] clk: imx6: Make the LDB_DI0 and LDB_DI1 clocks read-only Philipp Zabel
2019-05-27 7:01 ` Andrey Smirnov
2019-05-27 7:38 ` Ahmad Fatoum
2019-05-21 15:56 ` [PATCH v2 3/5] clk: imx6: Mask mmdc_ch1 handshake for periph2_sel and mmdc_ch1_axi_podf Ahmad Fatoum
2019-05-23 10:01 ` Philipp Zabel
2019-05-21 15:56 ` [PATCH v2 4/5] clk: imx6: Fix procedure to switch the parent of LDB_DI_CLK Ahmad Fatoum
2019-05-23 10:03 ` Philipp Zabel
2019-05-26 21:58 ` Andrey Smirnov
2019-05-27 7:04 ` Andrey Smirnov
2019-05-21 15:56 ` [PATCH v2 5/5] clk: imx6: define an enum for ldb mux inputs Ahmad Fatoum
2019-05-23 10:03 ` Philipp Zabel
2019-05-23 10:35 ` Ahmad Fatoum
2019-05-26 21:59 ` [PATCH v2 0/5] clk: imx6: work around LDB hang caused by ERR009219 Andrey Smirnov
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