* [PATCH v3 0/9] ARM: at91: misc fixes and cleanup
@ 2019-05-23 15:39 Ahmad Fatoum
2019-05-23 15:39 ` [PATCH v3 1/9] ARM: at91: replace __raw_{readl, writel} of peripherals with readl, writel Ahmad Fatoum
` (10 more replies)
0 siblings, 11 replies; 12+ messages in thread
From: Ahmad Fatoum @ 2019-05-23 15:39 UTC (permalink / raw)
To: barebox; +Cc: sam
The fixes are the same as in v2. The cleanup was made cleaner
a bit.
Changes since v2:
- Collected Sam's Tested-by and Reviewed-by
- Reinstated *_get_ddram_size helpers, but without #ifdefs,
as suggested by Sascha
- While doing that, some more unnecessary #ifdef usage unraveled,
so added two patches for those as well
- Squashed in a fix for another const-safety warning, suggested by Sam
Changes since v1:
- Collected Sam's Tested-by and Reviewed-by
- Included Sam's fix for the sama5d4 as patch 03
- moved debug_ll base address defaults to common/Kconfig
- above also got rid of a typo in the base address constant name
- added patches 06-09 which remove board-specific helpers as suggested
by Sascha in the review of the sama5d3 first stage patchset
- added patch 10 with a fix for a warning I ran into in the newly
ported clock drivers
Ahmad Fatoum (8):
ARM: at91: replace __raw_{readl,writel} of peripherals with
readl,writel
ARM: at91: debug_ll: make UART base address configurable
ARM: at91: remove references to non-existing CONFIG_ARCH_AT91*
ARM: at91: remove no-longer needed subarch #ifdefery
ARM: at91: remove #ifdefery around *_get_ddram_size helpers
ARM: at91: fix at91sama5_get_ddram_size for sama5d4
ARM: at91: remove duplicate get_ddram_size code
clk: at91: fix warning about missing const-safety
Sam Ravnborg (1):
arm: sama5d4: fix stack setup
arch/arm/boards/at91rm9200ek/lowlevel.c | 40 ++++-----
arch/arm/boards/sama5d3_xplained/lowlevel.c | 2 +-
arch/arm/boards/sama5d3xek/lowlevel.c | 2 +-
arch/arm/boards/sama5d4_xplained/lowlevel.c | 4 +-
arch/arm/boards/sama5d4ek/lowlevel.c | 4 +-
arch/arm/mach-at91/Kconfig | 17 ----
arch/arm/mach-at91/include/mach/at91_dbgu.h | 2 -
.../include/mach/at91sam926x_board_init.h | 22 ++---
.../mach-at91/include/mach/at91sam9_ddrsdr.h | 68 ++-------------
.../mach-at91/include/mach/at91sam9_sdramc.h | 4 +-
arch/arm/mach-at91/include/mach/debug_ll.h | 13 +--
arch/arm/mach-at91/include/mach/gpio.h | 57 ++++++------
arch/arm/mach-at91/include/mach/hardware.h | 18 ----
arch/arm/mach-at91/sam9_smc.c | 58 ++++++-------
arch/arm/mach-at91/sama5d3_devices.c | 2 +-
arch/arm/mach-at91/sama5d4_devices.c | 2 +-
arch/arm/mach-at91/setup.c | 4 +-
common/Kconfig | 21 +++++
drivers/clk/at91/clk-generated.c | 3 +-
drivers/clk/at91/clk-main.c | 3 +-
drivers/clocksource/timer-atmel-pit.c | 4 +-
drivers/mci/atmel-mci-regs.h | 4 +-
drivers/net/at91_ether.h | 4 +-
drivers/net/macb.h | 8 +-
drivers/pinctrl/pinctrl-at91.c | 28 +++---
drivers/spi/atmel_spi.h | 4 +-
drivers/usb/gadget/at91_udc.c | 86 +++++++++----------
drivers/video/atmel_lcdfb.h | 4 +-
28 files changed, 204 insertions(+), 284 deletions(-)
--
2.20.1
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^ permalink raw reply [flat|nested] 12+ messages in thread* [PATCH v3 1/9] ARM: at91: replace __raw_{readl, writel} of peripherals with readl, writel 2019-05-23 15:39 [PATCH v3 0/9] ARM: at91: misc fixes and cleanup Ahmad Fatoum @ 2019-05-23 15:39 ` Ahmad Fatoum 2019-05-23 15:39 ` [PATCH v3 2/9] ARM: at91: debug_ll: make UART base address configurable Ahmad Fatoum ` (9 subsequent siblings) 10 siblings, 0 replies; 12+ messages in thread From: Ahmad Fatoum @ 2019-05-23 15:39 UTC (permalink / raw) To: barebox; +Cc: sam Use the potentially endianness-changing readl, writel and siblings directly. They looks prettier and are the correct thing to do, as even if the CPU is in big-endian mode, the peripherals are little-endian. Unlike Linux, barebox readl,writel are the same Linux' {readl,writel}_relaxed (they don't imply memory barriers) and thus there shouldn't be any functional change. Patch was generated by a mass search and replace. I looked it over, adjust some whitespace and further verified by reviewing the output of git diff HEAD~1 --word-diff | \ perl -pe 's/\[-(.*?)__raw_/{+$1/; s/-\]\{\+/+}{+/;' \ -e 's/(\{\+.*?\+\})\1/__ALL_IS_WELL__/' | grep '+}{+' which filters out the common case of lines where a single __raw_{readT,writeT} had its __raw_ prefix stripped without any further changes. Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Tested-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> --- arch/arm/boards/at91rm9200ek/lowlevel.c | 40 ++++----- .../include/mach/at91sam926x_board_init.h | 22 ++--- .../mach-at91/include/mach/at91sam9_ddrsdr.h | 8 +- .../mach-at91/include/mach/at91sam9_sdramc.h | 4 +- arch/arm/mach-at91/include/mach/debug_ll.h | 6 +- arch/arm/mach-at91/include/mach/gpio.h | 57 ++++++------ arch/arm/mach-at91/sam9_smc.c | 58 ++++++------- arch/arm/mach-at91/setup.c | 4 +- drivers/clocksource/timer-atmel-pit.c | 4 +- drivers/mci/atmel-mci-regs.h | 4 +- drivers/net/at91_ether.h | 4 +- drivers/net/macb.h | 8 +- drivers/pinctrl/pinctrl-at91.c | 28 +++--- drivers/spi/atmel_spi.h | 4 +- drivers/usb/gadget/at91_udc.c | 86 +++++++++---------- drivers/video/atmel_lcdfb.h | 4 +- 16 files changed, 168 insertions(+), 173 deletions(-) diff --git a/arch/arm/boards/at91rm9200ek/lowlevel.c b/arch/arm/boards/at91rm9200ek/lowlevel.c index 030c3dbf04a5..b132ccc08431 100644 --- a/arch/arm/boards/at91rm9200ek/lowlevel.c +++ b/arch/arm/boards/at91rm9200ek/lowlevel.c @@ -33,28 +33,28 @@ void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint /* * PMC Check if the PLL is already initialized */ - r = __raw_readl(pmc + AT91_PMC_MCKR); + r = readl(pmc + AT91_PMC_MCKR); if (r & AT91_PMC_CSS) goto end; /* * Enable the Main Oscillator */ - __raw_writel(CONFIG_SYS_MOR_VAL, pmc + AT91_CKGR_MOR); + writel(CONFIG_SYS_MOR_VAL, pmc + AT91_CKGR_MOR); do { - r = __raw_readl(pmc + AT91_PMC_SR); + r = readl(pmc + AT91_PMC_SR); } while (!(r & AT91_PMC_MOSCS)); /* * EBI_CFGR */ - __raw_writel(CONFIG_SYS_EBI_CFGR_VAL, mc + AT91RM9200_EBI_CFGR); + writel(CONFIG_SYS_EBI_CFGR_VAL, mc + AT91RM9200_EBI_CFGR); /* * SMC2_CSR[0]: 16bit, 2 TDF, 4 WS */ - __raw_writel(CONFIG_SYS_SMC_CSR0_VAL, mc + AT91RM9200_SMC_CSR(0)); + writel(CONFIG_SYS_SMC_CSR0_VAL, mc + AT91RM9200_SMC_CSR(0)); /* * Init Clocks @@ -63,24 +63,24 @@ void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint /* * PLLAR: x MHz for PCK */ - __raw_writel(CONFIG_SYS_PLLAR_VAL, pmc + AT91_CKGR_PLLAR); + writel(CONFIG_SYS_PLLAR_VAL, pmc + AT91_CKGR_PLLAR); do { - r = __raw_readl(pmc + AT91_PMC_SR); + r = readl(pmc + AT91_PMC_SR); } while (!(r & AT91_PMC_LOCKA)); /* * PCK/x = MCK Master Clock from SLOW */ - __raw_writel(CONFIG_SYS_MCKR2_VAL1, pmc + AT91_PMC_MCKR); + writel(CONFIG_SYS_MCKR2_VAL1, pmc + AT91_PMC_MCKR); /* * PCK/x = MCK Master Clock from PLLA */ - __raw_writel(CONFIG_SYS_MCKR2_VAL2, pmc + AT91_PMC_MCKR); + writel(CONFIG_SYS_MCKR2_VAL2, pmc + AT91_PMC_MCKR); do { - r = __raw_readl(pmc + AT91_PMC_SR); + r = readl(pmc + AT91_PMC_SR); } while (!(r & AT91_PMC_MCKRDY)); /* @@ -88,38 +88,38 @@ void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint */ /* PIOC_ASR: Configure PIOC as peripheral (D16/D31) */ - __raw_writel(CONFIG_SYS_PIOC_ASR_VAL, AT91RM9200_BASE_PIOC + PIO_ASR); + writel(CONFIG_SYS_PIOC_ASR_VAL, AT91RM9200_BASE_PIOC + PIO_ASR); /* PIOC_BSR */ - __raw_writel(CONFIG_SYS_PIOC_BSR_VAL, AT91RM9200_BASE_PIOC + PIO_BSR); + writel(CONFIG_SYS_PIOC_BSR_VAL, AT91RM9200_BASE_PIOC + PIO_BSR); /* PIOC_PDR */ - __raw_writel(CONFIG_SYS_PIOC_PDR_VAL, AT91RM9200_BASE_PIOC + PIO_PDR); + writel(CONFIG_SYS_PIOC_PDR_VAL, AT91RM9200_BASE_PIOC + PIO_PDR); /* EBI_CSA : CS1=SDRAM */ - __raw_writel(CONFIG_SYS_EBI_CSA_VAL, mc + AT91RM9200_EBI_CSA); + writel(CONFIG_SYS_EBI_CSA_VAL, mc + AT91RM9200_EBI_CSA); /* SDRC_CR */ - __raw_writel(CONFIG_SYS_SDRC_CR_VAL, mc + AT91RM9200_SDRAMC_CR); + writel(CONFIG_SYS_SDRC_CR_VAL, mc + AT91RM9200_SDRAMC_CR); /* SDRC_MR : Precharge All */ - __raw_writel(AT91RM9200_SDRAMC_MODE_PRECHARGE, mc + AT91RM9200_SDRAMC_MR); + writel(AT91RM9200_SDRAMC_MODE_PRECHARGE, mc + AT91RM9200_SDRAMC_MR); /* access SDRAM */ access_sdram(); /* SDRC_MR : refresh */ - __raw_writel(AT91RM9200_SDRAMC_MODE_REFRESH, mc + AT91RM9200_SDRAMC_MR); + writel(AT91RM9200_SDRAMC_MODE_REFRESH, mc + AT91RM9200_SDRAMC_MR); /* access SDRAM 8 times */ for (i = 0; i < 8; i++) access_sdram(); /* SDRC_MR : Load Mode Register */ - __raw_writel(AT91RM9200_SDRAMC_MODE_LMR, mc + AT91RM9200_SDRAMC_MR); + writel(AT91RM9200_SDRAMC_MODE_LMR, mc + AT91RM9200_SDRAMC_MR); /* access SDRAM */ access_sdram(); /* SDRC_TR : Write refresh rate */ - __raw_writel(CONFIG_SYS_SDRC_TR_VAL, mc + AT91RM9200_SDRAMC_TR); + writel(CONFIG_SYS_SDRC_TR_VAL, mc + AT91RM9200_SDRAMC_TR); /* access SDRAM */ access_sdram(); /* SDRC_MR : Normal Mode */ - __raw_writel(AT91RM9200_SDRAMC_MODE_NORMAL, mc + AT91RM9200_SDRAMC_MR); + writel(AT91RM9200_SDRAMC_MODE_NORMAL, mc + AT91RM9200_SDRAMC_MR); /* access SDRAM */ access_sdram(); diff --git a/arch/arm/mach-at91/include/mach/at91sam926x_board_init.h b/arch/arm/mach-at91/include/mach/at91sam926x_board_init.h index 9ab0eef72813..d52a29e5ef46 100644 --- a/arch/arm/mach-at91/include/mach/at91sam926x_board_init.h +++ b/arch/arm/mach-at91/include/mach/at91sam926x_board_init.h @@ -78,43 +78,43 @@ static void __always_inline at91sam926x_sdramc_init(struct at91sam926x_board_cfg int in_sram = running_in_sram(); /* SDRAMC Check if Refresh Timer Counter is already initialized */ - r = __raw_readl(cfg->sdramc + AT91_SDRAMC_TR); + r = readl(cfg->sdramc + AT91_SDRAMC_TR); if (r && !in_sram) return; /* SDRAMC_MR : Normal Mode */ - __raw_writel(AT91_SDRAMC_MODE_NORMAL, cfg->sdramc + AT91_SDRAMC_MR); + writel(AT91_SDRAMC_MODE_NORMAL, cfg->sdramc + AT91_SDRAMC_MR); /* SDRAMC_TR - Refresh Timer register */ - __raw_writel(cfg->sdrc_tr1, cfg->sdramc + AT91_SDRAMC_TR); + writel(cfg->sdrc_tr1, cfg->sdramc + AT91_SDRAMC_TR); /* SDRAMC_CR - Configuration register*/ - __raw_writel(cfg->sdrc_cr, cfg->sdramc + AT91_SDRAMC_CR); + writel(cfg->sdrc_cr, cfg->sdramc + AT91_SDRAMC_CR); /* Memory Device Type */ - __raw_writel(cfg->sdrc_mdr, cfg->sdramc + AT91_SDRAMC_MDR); + writel(cfg->sdrc_mdr, cfg->sdramc + AT91_SDRAMC_MDR); /* SDRAMC_MR : Precharge All */ - __raw_writel(AT91_SDRAMC_MODE_PRECHARGE, cfg->sdramc + AT91_SDRAMC_MR); + writel(AT91_SDRAMC_MODE_PRECHARGE, cfg->sdramc + AT91_SDRAMC_MR); access_sdram(); /* SDRAMC_MR : refresh */ - __raw_writel(AT91_SDRAMC_MODE_REFRESH, cfg->sdramc + AT91_SDRAMC_MR); + writel(AT91_SDRAMC_MODE_REFRESH, cfg->sdramc + AT91_SDRAMC_MR); /* access SDRAM 8 times */ for (i = 0; i < 8; i++) access_sdram(); /* SDRAMC_MR : Load Mode Register */ - __raw_writel(AT91_SDRAMC_MODE_LMR, cfg->sdramc + AT91_SDRAMC_MR); + writel(AT91_SDRAMC_MODE_LMR, cfg->sdramc + AT91_SDRAMC_MR); access_sdram(); /* SDRAMC_MR : Normal Mode */ - __raw_writel(AT91_SDRAMC_MODE_NORMAL, cfg->sdramc + AT91_SDRAMC_MR); + writel(AT91_SDRAMC_MODE_NORMAL, cfg->sdramc + AT91_SDRAMC_MR); access_sdram(); /* SDRAMC_TR : Refresh Timer Counter */ - __raw_writel(cfg->sdrc_tr2, cfg->sdramc + AT91_SDRAMC_TR); + writel(cfg->sdrc_tr2, cfg->sdramc + AT91_SDRAMC_TR); access_sdram(); } @@ -127,7 +127,7 @@ static void __always_inline at91sam926x_board_init(void __iomem *smcbase, if (!IS_ENABLED(CONFIG_AT91SAM926X_BOARD_INIT)) return; - __raw_writel(cfg->wdt_mr, AT91SAM926X_BASE_WDT + AT91_WDT_MR); + writel(cfg->wdt_mr, AT91SAM926X_BASE_WDT + AT91_WDT_MR); /* configure PIOx as EBI0 D[16-31] */ at91_mux_gpio_disable(cfg->pio, cfg->ebi_pio_pdr); diff --git a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h index 1c4d313eb486..b0c003cd1e05 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h +++ b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h @@ -145,8 +145,8 @@ static inline u32 at91_get_ddram_size(void * __iomem base, bool is_nb) u32 size; bool is_sdram; - cr = __raw_readl(base + AT91_DDRSDRC_CR); - mdr = __raw_readl(base + AT91_DDRSDRC_MDR); + cr = readl(base + AT91_DDRSDRC_CR); + mdr = readl(base + AT91_DDRSDRC_MDR); is_sdram = (mdr & AT91_DDRSDRC_MD) <= AT91_DDRSDRC_MD_LOW_POWER_SDR; @@ -230,8 +230,8 @@ static inline u32 at91sama5_get_ddram_size(void) u32 size; void * __iomem base = IOMEM(SAMA5D3_BASE_MPDDRC); - cr = __raw_readl(base + AT91_DDRSDRC_CR); - mdr = __raw_readl(base + AT91_DDRSDRC_MDR); + cr = readl(base + AT91_DDRSDRC_CR); + mdr = readl(base + AT91_DDRSDRC_MDR); /* Formula: * size = bank << (col + row + 1); diff --git a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h index 8595f9cd5cc7..7bd887c8cbcf 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h +++ b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h @@ -90,7 +90,7 @@ static inline u32 at91_get_sdram_size(void *base) u32 val; u32 size; - val = __raw_readl(base + AT91_SDRAMC_CR); + val = readl(base + AT91_SDRAMC_CR); /* Formula: * size = bank << (col + row + 1); @@ -114,7 +114,7 @@ static inline u32 at91_get_sdram_size(void *base) static inline bool at91_is_low_power_sdram(void *base) { - return __raw_readl(base + AT91_SDRAMC_MDR) & AT91_SDRAMC_MD_LOW_POWER_SDRAM; + return readl(base + AT91_SDRAMC_MDR) & AT91_SDRAMC_MD_LOW_POWER_SDRAM; } #ifdef CONFIG_SOC_AT91SAM9260 diff --git a/arch/arm/mach-at91/include/mach/debug_ll.h b/arch/arm/mach-at91/include/mach/debug_ll.h index 42728a4b2789..fd26cae21ef2 100644 --- a/arch/arm/mach-at91/include/mach/debug_ll.h +++ b/arch/arm/mach-at91/include/mach/debug_ll.h @@ -31,11 +31,11 @@ */ static inline void PUTC_LL(char c) { - while (!(__raw_readl(UART_BASE + ATMEL_US_CSR) & ATMEL_US_TXRDY)) + while (!(readl(UART_BASE + ATMEL_US_CSR) & ATMEL_US_TXRDY)) barrier(); - __raw_writel(c, UART_BASE + ATMEL_US_THR); + writel(c, UART_BASE + ATMEL_US_THR); - while (!(__raw_readl(UART_BASE + ATMEL_US_CSR) & ATMEL_US_TXEMPTY)) + while (!(readl(UART_BASE + ATMEL_US_CSR) & ATMEL_US_TXEMPTY)) barrier(); } #endif diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h index bdc0cb68792c..f5ab47c0649a 100644 --- a/arch/arm/mach-at91/include/mach/gpio.h +++ b/arch/arm/mach-at91/include/mach/gpio.h @@ -26,67 +26,62 @@ static inline unsigned pin_to_mask(unsigned pin) static inline void at91_mux_disable_interrupt(void __iomem *pio, unsigned mask) { - __raw_writel(mask, pio + PIO_IDR); + writel(mask, pio + PIO_IDR); } static inline void at91_mux_set_pullup(void __iomem *pio, unsigned mask, bool on) { - __raw_writel(mask, pio + (on ? PIO_PUER : PIO_PUDR)); + writel(mask, pio + (on ? PIO_PUER : PIO_PUDR)); } static inline void at91_mux_set_multidrive(void __iomem *pio, unsigned mask, bool on) { - __raw_writel(mask, pio + (on ? PIO_MDER : PIO_MDDR)); + writel(mask, pio + (on ? PIO_MDER : PIO_MDDR)); } static inline void at91_mux_set_A_periph(void __iomem *pio, unsigned mask) { - __raw_writel(mask, pio + PIO_ASR); + writel(mask, pio + PIO_ASR); } static inline void at91_mux_set_B_periph(void __iomem *pio, unsigned mask) { - __raw_writel(mask, pio + PIO_BSR); + writel(mask, pio + PIO_BSR); } static inline void at91_mux_pio3_set_A_periph(void __iomem *pio, unsigned mask) { - - __raw_writel(__raw_readl(pio + PIO_ABCDSR1) & ~mask, - pio + PIO_ABCDSR1); - __raw_writel(__raw_readl(pio + PIO_ABCDSR2) & ~mask, - pio + PIO_ABCDSR2); + writel(readl(pio + PIO_ABCDSR1) & ~mask, pio + PIO_ABCDSR1); + writel(readl(pio + PIO_ABCDSR2) & ~mask, pio + PIO_ABCDSR2); } static inline void at91_mux_pio3_set_B_periph(void __iomem *pio, unsigned mask) { - __raw_writel(__raw_readl(pio + PIO_ABCDSR1) | mask, - pio + PIO_ABCDSR1); - __raw_writel(__raw_readl(pio + PIO_ABCDSR2) & ~mask, - pio + PIO_ABCDSR2); + writel(readl(pio + PIO_ABCDSR1) | mask, pio + PIO_ABCDSR1); + writel(readl(pio + PIO_ABCDSR2) & ~mask, pio + PIO_ABCDSR2); } static inline void at91_mux_pio3_set_C_periph(void __iomem *pio, unsigned mask) { - __raw_writel(__raw_readl(pio + PIO_ABCDSR1) & ~mask, pio + PIO_ABCDSR1); - __raw_writel(__raw_readl(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2); + writel(readl(pio + PIO_ABCDSR1) & ~mask, pio + PIO_ABCDSR1); + writel(readl(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2); } static inline void at91_mux_pio3_set_D_periph(void __iomem *pio, unsigned mask) { - __raw_writel(__raw_readl(pio + PIO_ABCDSR1) | mask, pio + PIO_ABCDSR1); - __raw_writel(__raw_readl(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2); + writel(readl(pio + PIO_ABCDSR1) | mask, pio + PIO_ABCDSR1); + writel(readl(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2); } static inline void at91_mux_set_deglitch(void __iomem *pio, unsigned mask, bool is_on) { - __raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR)); + writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR)); } static inline void at91_mux_pio3_set_deglitch(void __iomem *pio, unsigned mask, bool is_on) { if (is_on) - __raw_writel(mask, pio + PIO_IFSCDR); + writel(mask, pio + PIO_IFSCDR); at91_mux_set_deglitch(pio, mask, is_on); } @@ -94,50 +89,50 @@ static inline void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask, bool is_on, u32 div) { if (is_on) { - __raw_writel(mask, pio + PIO_IFSCER); - __raw_writel(div & PIO_SCDR_DIV, pio + PIO_SCDR); - __raw_writel(mask, pio + PIO_IFER); + writel(mask, pio + PIO_IFSCER); + writel(div & PIO_SCDR_DIV, pio + PIO_SCDR); + writel(mask, pio + PIO_IFER); } else { - __raw_writel(mask, pio + PIO_IFDR); + writel(mask, pio + PIO_IFDR); } } static inline void at91_mux_pio3_set_pulldown(void __iomem *pio, unsigned mask, bool is_on) { - __raw_writel(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR)); + writel(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR)); } static inline void at91_mux_pio3_disable_schmitt_trig(void __iomem *pio, unsigned mask) { - __raw_writel(__raw_readl(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT); + writel(readl(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT); } static inline void at91_mux_gpio_disable(void __iomem *pio, unsigned mask) { - __raw_writel(mask, pio + PIO_PDR); + writel(mask, pio + PIO_PDR); } static inline void at91_mux_gpio_enable(void __iomem *pio, unsigned mask) { - __raw_writel(mask, pio + PIO_PER); + writel(mask, pio + PIO_PER); } static inline void at91_mux_gpio_input(void __iomem *pio, unsigned mask, bool input) { - __raw_writel(mask, pio + (input ? PIO_ODR : PIO_OER)); + writel(mask, pio + (input ? PIO_ODR : PIO_OER)); } static inline void at91_mux_gpio_set(void __iomem *pio, unsigned mask, int value) { - __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR)); + writel(mask, pio + (value ? PIO_SODR : PIO_CODR)); } static inline int at91_mux_gpio_get(void __iomem *pio, unsigned mask) { u32 pdsr; - pdsr = __raw_readl(pio + PIO_PDSR); + pdsr = readl(pio + PIO_PDSR); return (pdsr & mask) != 0; } diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c index dc1f2edf4125..a4d441f02385 100644 --- a/arch/arm/mach-at91/sam9_smc.c +++ b/arch/arm/mach-at91/sam9_smc.c @@ -41,23 +41,23 @@ static void sam9_smc_cs_write_mode(void __iomem *base, break; } - __raw_writel(config->mode - | AT91_SMC_TDF_(config->tdf_cycles), - mode_reg); + writel(config->mode + | AT91_SMC_TDF_(config->tdf_cycles), + mode_reg); } static void sam9_smc_cs_write_timings(void __iomem *base, struct sam9_smc_config *config) { - __raw_writel(AT91_SMC_TCLR_(config->tclr) - | AT91_SMC_TADL_(config->tadl) - | AT91_SMC_TAR_(config->tar) - | AT91_SMC_OCMS_(config->ocms) - | AT91_SMC_TRR_(config->trr) - | AT91_SMC_TWB_(config->twb) - | AT91_SMC_RBNSEL_(config->rbnsel) - | AT91_SMC_NFSEL_(config->nfsel), - base + AT91_SAMA5_SMC_TIMINGS); + writel(AT91_SMC_TCLR_(config->tclr) + | AT91_SMC_TADL_(config->tadl) + | AT91_SMC_TAR_(config->tar) + | AT91_SMC_OCMS_(config->ocms) + | AT91_SMC_TRR_(config->trr) + | AT91_SMC_TWB_(config->twb) + | AT91_SMC_RBNSEL_(config->rbnsel) + | AT91_SMC_NFSEL_(config->nfsel), + base + AT91_SAMA5_SMC_TIMINGS); } void sam9_smc_write_mode(int id, int cs, @@ -71,23 +71,23 @@ static void sam9_smc_cs_configure(void __iomem *base, { /* Setup register */ - __raw_writel(AT91_SMC_NWESETUP_(config->nwe_setup) - | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup) - | AT91_SMC_NRDSETUP_(config->nrd_setup) - | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup), - base + AT91_SMC_SETUP); + writel(AT91_SMC_NWESETUP_(config->nwe_setup) + | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup) + | AT91_SMC_NRDSETUP_(config->nrd_setup) + | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup), + base + AT91_SMC_SETUP); /* Pulse register */ - __raw_writel(AT91_SMC_NWEPULSE_(config->nwe_pulse) - | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse) - | AT91_SMC_NRDPULSE_(config->nrd_pulse) - | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse), - base + AT91_SMC_PULSE); + writel(AT91_SMC_NWEPULSE_(config->nwe_pulse) + | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse) + | AT91_SMC_NRDPULSE_(config->nrd_pulse) + | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse), + base + AT91_SMC_PULSE); /* Cycle register */ - __raw_writel(AT91_SMC_NWECYCLE_(config->write_cycle) - | AT91_SMC_NRDCYCLE_(config->read_cycle), - base + AT91_SMC_CYCLE); + writel(AT91_SMC_NWECYCLE_(config->write_cycle) + | AT91_SMC_NRDCYCLE_(config->read_cycle), + base + AT91_SMC_CYCLE); /* Mode register */ sam9_smc_cs_write_mode(base, config); @@ -115,7 +115,7 @@ static void sam9_smc_cs_read_mode(void __iomem *base, break; } - val = __raw_readl(mode_reg); + val = readl(mode_reg); config->mode = (val & ~AT91_SMC_NWECYCLE); config->tdf_cycles = (val & AT91_SMC_NWECYCLE) >> 16 ; @@ -133,7 +133,7 @@ static void sam9_smc_cs_read(void __iomem *base, u32 val; /* Setup register */ - val = __raw_readl(base + AT91_SMC_SETUP); + val = readl(base + AT91_SMC_SETUP); config->nwe_setup = val & AT91_SMC_NWESETUP; config->ncs_write_setup = (val & AT91_SMC_NCS_WRSETUP) >> 8; @@ -141,7 +141,7 @@ static void sam9_smc_cs_read(void __iomem *base, config->ncs_read_setup = (val & AT91_SMC_NCS_RDSETUP) >> 24; /* Pulse register */ - val = __raw_readl(base + AT91_SMC_PULSE); + val = readl(base + AT91_SMC_PULSE); config->nwe_setup = val & AT91_SMC_NWEPULSE; config->ncs_write_pulse = (val & AT91_SMC_NCS_WRPULSE) >> 8; @@ -149,7 +149,7 @@ static void sam9_smc_cs_read(void __iomem *base, config->ncs_read_pulse = (val & AT91_SMC_NCS_RDPULSE) >> 24; /* Cycle register */ - val = __raw_readl(base + AT91_SMC_CYCLE); + val = readl(base + AT91_SMC_CYCLE); config->write_cycle = val & AT91_SMC_NWECYCLE; config->read_cycle = (val & AT91_SMC_NRDCYCLE) >> 16; diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index cb79eb26b8e7..4e30c78de78d 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c @@ -29,11 +29,11 @@ static void __init soc_detect(u32 dbgu_base) { u32 cidr, socid; - cidr = __raw_readl(dbgu_base + AT91_DBGU_CIDR); + cidr = readl(dbgu_base + AT91_DBGU_CIDR); socid = cidr & ~AT91_CIDR_VERSION; /* sub version of soc */ - at91_soc_initdata.exid = __raw_readl(dbgu_base + AT91_DBGU_EXID); + at91_soc_initdata.exid = readl(dbgu_base + AT91_DBGU_EXID); switch (socid) { case ARCH_ID_AT91RM9200: diff --git a/drivers/clocksource/timer-atmel-pit.c b/drivers/clocksource/timer-atmel-pit.c index e23f1e5ec4e1..6e8665348060 100644 --- a/drivers/clocksource/timer-atmel-pit.c +++ b/drivers/clocksource/timer-atmel-pit.c @@ -35,8 +35,8 @@ #include <linux/err.h> #define PIT_CPIV(x) ((x) & AT91_PIT_CPIV) -#define pit_write(reg, val) __raw_writel(val, pit_base + reg) -#define pit_read(reg) __raw_readl(pit_base + reg) +#define pit_write(reg, val) writel(val, pit_base + reg) +#define pit_read(reg) readl(pit_base + reg) static __iomem void *pit_base; diff --git a/drivers/mci/atmel-mci-regs.h b/drivers/mci/atmel-mci-regs.h index af1dba00f9b5..2866e3eb77d0 100644 --- a/drivers/mci/atmel-mci-regs.h +++ b/drivers/mci/atmel-mci-regs.h @@ -138,9 +138,9 @@ /* Register access macros */ #define atmci_readl(port,reg) \ - __raw_readl((port)->regs + reg) + readl((port)->regs + reg) #define atmci_writel(port,reg,value) \ - __raw_writel((value), (port)->regs + reg) + writel((value), (port)->regs + reg) /* On AVR chips the Peripheral DMA Controller is not connected to MCI. */ #ifdef CONFIG_AVR32 diff --git a/drivers/net/at91_ether.h b/drivers/net/at91_ether.h index 08df6f161ca4..21c2ae94da43 100644 --- a/drivers/net/at91_ether.h +++ b/drivers/net/at91_ether.h @@ -33,7 +33,7 @@ struct rbf_t */ static inline unsigned long at91_emac_read(unsigned int reg) { - return __raw_readl(AT91_VA_BASE_EMAC + reg); + return readl(AT91_VA_BASE_EMAC + reg); } /* @@ -41,6 +41,6 @@ static inline unsigned long at91_emac_read(unsigned int reg) */ static inline void at91_emac_write(unsigned int reg, unsigned long value) { - __raw_writel(value, AT91_VA_BASE_EMAC + reg); + writel(value, AT91_VA_BASE_EMAC + reg); } #endif diff --git a/drivers/net/macb.h b/drivers/net/macb.h index 979f53cb715d..fda4d086631a 100644 --- a/drivers/net/macb.h +++ b/drivers/net/macb.h @@ -334,13 +334,13 @@ /* Register access macros */ #define macb_readl(port,reg) \ - __raw_readl((port)->regs + MACB_##reg) + readl((port)->regs + MACB_##reg) #define macb_writel(port,reg,value) \ - __raw_writel((value), (port)->regs + MACB_##reg) + writel((value), (port)->regs + MACB_##reg) #define gem_readl(port, reg) \ - __raw_readl((port)->regs + GEM_##reg) + readl((port)->regs + GEM_##reg) #define gem_writel(port, reg, value) \ - __raw_writel((value), (port)->regs + GEM_##reg) + writel((value), (port)->regs + GEM_##reg) /* * Conditional GEM/MACB macros. These perform the operation to the correct diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c index 11e00833c586..9b366e48120f 100644 --- a/drivers/pinctrl/pinctrl-at91.c +++ b/drivers/pinctrl/pinctrl-at91.c @@ -303,11 +303,11 @@ static enum at91_mux at91_mux_pio3_get_periph(void __iomem *pio, unsigned mask) { unsigned select; - if (__raw_readl(pio + PIO_PSR) & mask) + if (readl(pio + PIO_PSR) & mask) return AT91_MUX_GPIO; - select = !!(__raw_readl(pio + PIO_ABCDSR1) & mask); - select |= (!!(__raw_readl(pio + PIO_ABCDSR2) & mask) << 1); + select = !!(readl(pio + PIO_ABCDSR1) & mask); + select |= (!!(readl(pio + PIO_ABCDSR2) & mask) << 1); return select + 1; } @@ -316,34 +316,34 @@ static enum at91_mux at91_mux_get_periph(void __iomem *pio, unsigned mask) { unsigned select; - if (__raw_readl(pio + PIO_PSR) & mask) + if (readl(pio + PIO_PSR) & mask) return AT91_MUX_GPIO; - select = __raw_readl(pio + PIO_ABSR) & mask; + select = readl(pio + PIO_ABSR) & mask; return select + 1; } static bool at91_mux_get_deglitch(void __iomem *pio, unsigned pin) { - return (__raw_readl(pio + PIO_IFSR) >> pin) & 0x1; + return (readl(pio + PIO_IFSR) >> pin) & 0x1; } static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div) { - *div = __raw_readl(pio + PIO_SCDR); + *div = readl(pio + PIO_SCDR); - return (__raw_readl(pio + PIO_IFSCSR) >> pin) & 0x1; + return (readl(pio + PIO_IFSCSR) >> pin) & 0x1; } static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin) { - return (__raw_readl(pio + PIO_PPDSR) >> pin) & 0x1; + return (readl(pio + PIO_PPDSR) >> pin) & 0x1; } static bool at91_mux_pio3_get_schmitt_trig(void __iomem *pio, unsigned pin) { - return (__raw_readl(pio + PIO_SCHMITT) >> pin) & 0x1; + return (readl(pio + PIO_SCHMITT) >> pin) & 0x1; } static struct at91_pinctrl_mux_ops at91rm9200_ops = { @@ -559,7 +559,7 @@ static int at91_gpio_direction_output(struct gpio_chip *chip, unsigned offset, unsigned mask = 1 << offset; at91_mux_gpio_set(pio, mask, value); - __raw_writel(mask, pio + PIO_OER); + writel(mask, pio + PIO_OER); return 0; } @@ -571,8 +571,8 @@ static int at91_gpio_get_direction(struct gpio_chip *chip, unsigned offset) unsigned mask = 1 << offset; u32 osr; - if (mask & __raw_readl(pio + PIO_PSR)) { - osr = __raw_readl(pio + PIO_OSR); + if (mask & readl(pio + PIO_PSR)) { + osr = readl(pio + PIO_OSR); return !(osr & mask); } else { return -EBUSY; @@ -585,7 +585,7 @@ static int at91_gpio_direction_input(struct gpio_chip *chip, unsigned offset) void __iomem *pio = at91_gpio->regbase; unsigned mask = 1 << offset; - __raw_writel(mask, pio + PIO_ODR); + writel(mask, pio + PIO_ODR); return 0; } diff --git a/drivers/spi/atmel_spi.h b/drivers/spi/atmel_spi.h index 3f4d7ba124d2..7c4806981ffc 100644 --- a/drivers/spi/atmel_spi.h +++ b/drivers/spi/atmel_spi.h @@ -161,8 +161,8 @@ /* Register access macros */ #define spi_readl(port, reg) \ - __raw_readl((port)->regs + SPI_##reg) + readl((port)->regs + SPI_##reg) #define spi_writel(port, reg, value) \ - __raw_writel((value), (port)->regs + SPI_##reg) + writel((value), (port)->regs + SPI_##reg) #endif /* __ATMEL_SPI_H__ */ diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c index 243656d443bd..efbc574c2328 100644 --- a/drivers/usb/gadget/at91_udc.c +++ b/drivers/usb/gadget/at91_udc.c @@ -65,9 +65,9 @@ static const char ep0name[] = "ep0"; #define at91_udp_read(udc, reg) \ - __raw_readl((udc)->udp_baseaddr + (reg)) + readl((udc)->udp_baseaddr + (reg)) #define at91_udp_write(udc, reg, val) \ - __raw_writel((val), (udc)->udp_baseaddr + (reg)) + writel((val), (udc)->udp_baseaddr + (reg)) /*-------------------------------------------------------------------------*/ @@ -136,7 +136,7 @@ static int read_fifo (struct at91_ep *ep, struct at91_request *req) * or if we already emptied both pingpong buffers */ rescan: - csr = __raw_readl(creg); + csr = readl(creg); if ((csr & RX_DATA_READY) == 0) return 0; @@ -162,7 +162,7 @@ rescan: } } else csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); - __raw_writel(csr, creg); + writel(csr, creg); req->req.actual += count; is_done = (count < ep->ep.maxpacket); @@ -184,7 +184,7 @@ rescan: * CSR returns bad RXCOUNT when read too soon after updating * RX_DATA_BK flags. */ - csr = __raw_readl(creg); + csr = readl(creg); bufferspace -= count; buf += count; @@ -198,7 +198,7 @@ rescan: static int write_fifo(struct at91_ep *ep, struct at91_request *req) { u32 __iomem *creg = ep->creg; - u32 csr = __raw_readl(creg); + u32 csr = readl(creg); u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); unsigned total, count, is_last; u8 *buf; @@ -219,8 +219,8 @@ static int write_fifo(struct at91_ep *ep, struct at91_request *req) if (csr & AT91_UDP_TXCOMP) { csr |= CLR_FX; csr &= ~(SET_FX | AT91_UDP_TXCOMP); - __raw_writel(csr, creg); - csr = __raw_readl(creg); + writel(csr, creg); + csr = readl(creg); } if (csr & AT91_UDP_TXPKTRDY) return 0; @@ -340,7 +340,7 @@ ok: tmp |= 0x04; tmp <<= 8; tmp |= AT91_UDP_EPEDS; - __raw_writel(tmp, ep->creg); + writel(tmp, ep->creg); ep->desc = desc; ep->ep.maxpacket = maxpacket; @@ -373,7 +373,7 @@ static int at91_ep_disable (struct usb_ep * _ep) if (ep->udc->clocked) { at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); at91_udp_write(udc, AT91_UDP_RST_EP, 0); - __raw_writel(0, ep->creg); + writel(0, ep->creg); } return 0; @@ -471,10 +471,10 @@ static int at91_ep_queue(struct usb_ep *_ep, ep0_in_status: PACKET("ep0 in/status\n"); status = 0; - tmp = __raw_readl(ep->creg); + tmp = readl(ep->creg); tmp &= ~SET_FX; tmp |= CLR_FX | AT91_UDP_TXPKTRDY; - __raw_writel(tmp, ep->creg); + writel(tmp, ep->creg); udc->req_pending = 0; goto done; } @@ -534,7 +534,7 @@ static int at91_ep_set_halt(struct usb_ep *_ep, int value) creg = ep->creg; - csr = __raw_readl(creg); + csr = readl(creg); /* * fail with still-busy IN endpoints, ensuring correct sequencing @@ -554,7 +554,7 @@ static int at91_ep_set_halt(struct usb_ep *_ep, int value) at91_udp_write(udc, AT91_UDP_RST_EP, 0); csr &= ~AT91_UDP_FORCESTALL; } - __raw_writel(csr, creg); + writel(csr, creg); } return status; @@ -760,7 +760,7 @@ static int handle_ep(struct at91_ep *ep) { struct at91_request *req; u32 __iomem *creg = ep->creg; - u32 csr = __raw_readl(creg); + u32 csr = readl(creg); if (!list_empty(&ep->queue)) req = list_entry(ep->queue.next, @@ -772,7 +772,7 @@ static int handle_ep(struct at91_ep *ep) if (csr & (AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)) { csr |= CLR_FX; csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP); - __raw_writel(csr, creg); + writel(csr, creg); } if (req) return write_fifo(ep, req); @@ -784,8 +784,8 @@ static int handle_ep(struct at91_ep *ep) req->req.status = -EILSEQ; csr |= CLR_FX; csr &= ~(SET_FX | AT91_UDP_STALLSENT); - __raw_writel(csr, creg); - csr = __raw_readl(creg); + writel(csr, creg); + csr = readl(creg); } if (req && (csr & RX_DATA_READY)) return read_fifo(ep, req); @@ -811,7 +811,7 @@ static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr) rxcount = (csr & AT91_UDP_RXBYTECNT) >> 16; if (likely(rxcount == 8)) { while (rxcount--) - pkt.raw[i++] = __raw_readb(dreg); + pkt.raw[i++] = readb(dreg); if (pkt.r.bRequestType & USB_DIR_IN) { csr |= AT91_UDP_DIR; ep->is_in = 1; @@ -826,7 +826,7 @@ static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr) } csr |= CLR_FX; csr &= ~(SET_FX | AT91_UDP_RXSETUP); - __raw_writel(csr, creg); + writel(csr, creg); udc->wait_for_addr_ack = 0; udc->wait_for_config_ack = 0; ep->stopped = 0; @@ -846,14 +846,14 @@ static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr) * hardware ... notably for device and endpoint features. */ udc->req_pending = 1; - csr = __raw_readl(creg); + csr = readl(creg); csr |= CLR_FX; csr &= ~SET_FX; switch ((pkt.r.bRequestType << 8) | pkt.r.bRequest) { case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) | USB_REQ_SET_ADDRESS: - __raw_writel(csr | AT91_UDP_TXPKTRDY, creg); + writel(csr | AT91_UDP_TXPKTRDY, creg); udc->addr = w_value; udc->wait_for_addr_ack = 1; udc->req_pending = 0; @@ -882,8 +882,8 @@ static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr) if (at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_ESR) tmp |= (1 << USB_DEVICE_REMOTE_WAKEUP); PACKET("get device status\n"); - __raw_writeb(tmp, dreg); - __raw_writeb(0, dreg); + writeb(tmp, dreg); + writeb(0, dreg); goto write_in; /* then STATUS starts later, automatically */ case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) @@ -910,8 +910,8 @@ static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr) case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) | USB_REQ_GET_STATUS: PACKET("get interface status\n"); - __raw_writeb(0, dreg); - __raw_writeb(0, dreg); + writeb(0, dreg); + writeb(0, dreg); goto write_in; /* then STATUS starts later, automatically */ case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) @@ -939,12 +939,12 @@ static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr) goto stall; } PACKET("get %s status\n", ep->ep.name); - if (__raw_readl(ep->creg) & AT91_UDP_FORCESTALL) + if (readl(ep->creg) & AT91_UDP_FORCESTALL) tmp = (1 << USB_ENDPOINT_HALT); else tmp = 0; - __raw_writeb(tmp, dreg); - __raw_writeb(0, dreg); + writeb(tmp, dreg); + writeb(0, dreg); goto write_in; /* then STATUS starts later, automatically */ case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) @@ -961,10 +961,10 @@ static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr) } else if (ep->is_in) goto stall; - tmp = __raw_readl(ep->creg); + tmp = readl(ep->creg); tmp &= ~SET_FX; tmp |= CLR_FX | AT91_UDP_FORCESTALL; - __raw_writel(tmp, ep->creg); + writel(tmp, ep->creg); goto succeed; case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) | USB_REQ_CLEAR_FEATURE: @@ -984,10 +984,10 @@ static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr) at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); at91_udp_write(udc, AT91_UDP_RST_EP, 0); - tmp = __raw_readl(ep->creg); + tmp = readl(ep->creg); tmp |= CLR_FX; tmp &= ~(SET_FX | AT91_UDP_FORCESTALL); - __raw_writel(tmp, ep->creg); + writel(tmp, ep->creg); if (!list_empty(&ep->queue)) handle_ep(ep); goto succeed; @@ -1008,7 +1008,7 @@ stall: VDBG(udc, "req %02x.%02x protocol STALL; stat %d\n", pkt.r.bRequestType, pkt.r.bRequest, status); csr |= AT91_UDP_FORCESTALL; - __raw_writel(csr, creg); + writel(csr, creg); udc->req_pending = 0; } return; @@ -1018,7 +1018,7 @@ succeed: PACKET("ep0 in/status\n"); write_in: csr |= AT91_UDP_TXPKTRDY; - __raw_writel(csr, creg); + writel(csr, creg); udc->req_pending = 0; } @@ -1026,7 +1026,7 @@ static void handle_ep0(struct at91_udc *udc) { struct at91_ep *ep0 = &udc->ep[0]; u32 __iomem *creg = ep0->creg; - u32 csr = __raw_readl(creg); + u32 csr = readl(creg); struct at91_request *req; if (unlikely(csr & AT91_UDP_STALLSENT)) { @@ -1034,9 +1034,9 @@ static void handle_ep0(struct at91_udc *udc) udc->req_pending = 0; csr |= CLR_FX; csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_FORCESTALL); - __raw_writel(csr, creg); + writel(csr, creg); VDBG(udc, "ep0 stalled\n"); - csr = __raw_readl(creg); + csr = readl(creg); } if (csr & AT91_UDP_RXSETUP) { nuke(ep0, 0); @@ -1070,7 +1070,7 @@ static void handle_ep0(struct at91_udc *udc) */ } else { udc->req_pending = 0; - __raw_writel(csr, creg); + writel(csr, creg); /* * SET_ADDRESS takes effect only after the STATUS @@ -1104,10 +1104,10 @@ static void handle_ep0(struct at91_udc *udc) if (handle_ep(ep0)) { /* send IN/STATUS */ PACKET("ep0 in/status\n"); - csr = __raw_readl(creg); + csr = readl(creg); csr &= ~SET_FX; csr |= CLR_FX | AT91_UDP_TXPKTRDY; - __raw_writel(csr, creg); + writel(csr, creg); udc->req_pending = 0; } } else if (udc->req_pending) { @@ -1129,14 +1129,14 @@ static void handle_ep0(struct at91_udc *udc) * that gadget drivers not use this mode. */ DBG(udc, "no control-OUT deferred responses!\n"); - __raw_writel(csr | AT91_UDP_FORCESTALL, creg); + writel(csr | AT91_UDP_FORCESTALL, creg); udc->req_pending = 0; } /* STATUS stage for control-IN; ack. */ } else { PACKET("ep0 out/status ACK\n"); - __raw_writel(csr, creg); + writel(csr, creg); /* "early" status stage */ if (req) diff --git a/drivers/video/atmel_lcdfb.h b/drivers/video/atmel_lcdfb.h index b8458924ba15..76c0e739e858 100644 --- a/drivers/video/atmel_lcdfb.h +++ b/drivers/video/atmel_lcdfb.h @@ -43,8 +43,8 @@ struct atmel_lcdfb_info { void *dma_desc; }; -#define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg)) -#define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg)) +#define lcdc_readl(sinfo, reg) readl((sinfo)->mmio+(reg)) +#define lcdc_writel(sinfo, reg, val) writel((val), (sinfo)->mmio+(reg)) #define ATMEL_LCDC_STOP_NOWAIT (1 << 0) -- 2.20.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3 2/9] ARM: at91: debug_ll: make UART base address configurable 2019-05-23 15:39 [PATCH v3 0/9] ARM: at91: misc fixes and cleanup Ahmad Fatoum 2019-05-23 15:39 ` [PATCH v3 1/9] ARM: at91: replace __raw_{readl, writel} of peripherals with readl, writel Ahmad Fatoum @ 2019-05-23 15:39 ` Ahmad Fatoum 2019-05-23 15:39 ` [PATCH v3 3/9] ARM: at91: remove references to non-existing CONFIG_ARCH_AT91* Ahmad Fatoum ` (8 subsequent siblings) 10 siblings, 0 replies; 12+ messages in thread From: Ahmad Fatoum @ 2019-05-23 15:39 UTC (permalink / raw) To: barebox; +Cc: sam This is in line with other platforms such as i.MX, which allow specifying a debug port. As we can't use port indices because the UARTs aren't mapped consecutively, allow specifying a hex base at configuration time. A side effect of this patch is that sama5d4's HAVE_AT91_DBGU2 is now honored as well. Previously anything besides DBGU0 defaulted to DBGU1. Fixes: 06a0773ee31 ("ARM: at91: add sama5d4 soc support #2") Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Tested-by: Sam Ravnborg <sam@ravnborg.org> [afa: moved base address defaults to common/Kconfig] Signed-off-by: Ahmad Fatoum <afa@pengutronix.de> --- arch/arm/mach-at91/Kconfig | 17 ----------------- arch/arm/mach-at91/include/mach/debug_ll.h | 13 +++---------- common/Kconfig | 21 +++++++++++++++++++++ 3 files changed, 24 insertions(+), 27 deletions(-) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index efed73827849..8e1bf0629ab7 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -1,14 +1,5 @@ if ARCH_AT91 -config HAVE_AT91_DBGU0 - bool - -config HAVE_AT91_DBGU1 - bool - -config HAVE_AT91_DBGU2 - bool - config HAVE_AT91_UTMI bool @@ -115,7 +106,6 @@ config SOC_AT91RM9200 config SOC_AT91SAM9260 bool select SOC_AT91SAM9 - select HAVE_AT91_DBGU0 select HAS_MACB help Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE @@ -124,21 +114,18 @@ config SOC_AT91SAM9260 config SOC_AT91SAM9261 bool select SOC_AT91SAM9 - select HAVE_AT91_DBGU0 help Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC. config SOC_AT91SAM9263 bool select SOC_AT91SAM9 - select HAVE_AT91_DBGU1 select HAS_MACB select HAVE_AT91_LOAD_BAREBOX_SRAM config SOC_AT91SAM9G45 bool select SOC_AT91SAM9 - select HAVE_AT91_DBGU1 select HAS_MACB help Select this if you are using one of Atmel's AT91SAM9G45 family SoC. @@ -147,7 +134,6 @@ config SOC_AT91SAM9G45 config SOC_AT91SAM9X5 bool select SOC_AT91SAM9 - select HAVE_AT91_DBGU0 select HAS_MACB select COMMON_CLK_OF_PROVIDER help @@ -160,7 +146,6 @@ config SOC_AT91SAM9X5 config SOC_AT91SAM9N12 bool select SOC_AT91SAM9 - select HAVE_AT91_DBGU0 help Select this if you are using Atmel's AT91SAM9N12 SoC. @@ -213,14 +198,12 @@ config ARCH_AT91SAM9N12 config ARCH_SAMA5D3 bool "SAMA5D3x" select SOC_SAMA5D3 - select HAVE_AT91_DBGU1 select HAS_MACB select HAVE_MACH_ARM_HEAD config ARCH_SAMA5D4 bool "SAMA5D4" select SOC_SAMA5D4 - select HAVE_AT91_DBGU2 select HAS_MACB select HAVE_MACH_ARM_HEAD diff --git a/arch/arm/mach-at91/include/mach/debug_ll.h b/arch/arm/mach-at91/include/mach/debug_ll.h index fd26cae21ef2..b71393042463 100644 --- a/arch/arm/mach-at91/include/mach/debug_ll.h +++ b/arch/arm/mach-at91/include/mach/debug_ll.h @@ -9,13 +9,6 @@ #define __MACH_DEBUG_LL_H__ #include <asm/io.h> -#include <mach/hardware.h> - -#ifdef CONFIG_HAVE_AT91_DBGU0 -#define UART_BASE AT91_BASE_DBGU0 -#else -#define UART_BASE AT91_BASE_DBGU1 -#endif #define ATMEL_US_CSR 0x0014 #define ATMEL_US_THR 0x001c @@ -31,11 +24,11 @@ */ static inline void PUTC_LL(char c) { - while (!(readl(UART_BASE + ATMEL_US_CSR) & ATMEL_US_TXRDY)) + while (!(readl(CONFIG_DEBUG_AT91_UART_BASE + ATMEL_US_CSR) & ATMEL_US_TXRDY)) barrier(); - writel(c, UART_BASE + ATMEL_US_THR); + writel(c, CONFIG_DEBUG_AT91_UART_BASE + ATMEL_US_THR); - while (!(readl(UART_BASE + ATMEL_US_CSR) & ATMEL_US_TXEMPTY)) + while (!(readl(CONFIG_DEBUG_AT91_UART_BASE + ATMEL_US_CSR) & ATMEL_US_TXEMPTY)) barrier(); } #endif diff --git a/common/Kconfig b/common/Kconfig index 7832df5c554f..2f30b2acf890 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -1168,6 +1168,13 @@ config DEBUG_RPI1_UART Say Y here if you want low-level debugging support on RaspberryPi 1 boards. +config DEBUG_AT91_UART + bool "AT91 Debug UART" + depends on ARCH_AT91 + help + Say Y here if you want barebox low-level debugging support + on AT91 based platforms. + config DEBUG_RPI2_3_UART bool "RaspberryPi 2/3 PL011 UART" depends on ARCH_BCM283X @@ -1238,6 +1245,7 @@ config DEBUG_SOCFPGA_UART_CLOCK help Choose UART root clock. + config DEBUG_LAYERSCAPE_UART_PORT int "Layerscape UART port selection" depends on ARCH_LAYERSCAPE @@ -1246,6 +1254,19 @@ config DEBUG_LAYERSCAPE_UART_PORT Select the UART port number used for early debugging here. Port numbers start counting from 1. +config DEBUG_AT91_UART_BASE + hex "AT91 Debug UART Port Selection" if DEBUG_AT91_UART + default 0xfffff200 if SOC_AT91RM9200 || SOC_AT91SAM9260 \ + || SOC_AT91SAM9261 || SOC_AT91SAM9X5 \ + || SOC_AT91SAM9N12 + default 0xffffee00 if SOC_AT91SAM9263 || SOC_AT91SAM9G45 || ARCH_SAMA5D3 + default 0xfc069000 if ARCH_SAMA5D4 + default 0xfffff200 + depends on ARCH_AT91 + help + Specify UART port base address on which barebox low-level + debug messages should be output. + config DEBUG_INITCALLS bool "Trace initcalls" help -- 2.20.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3 3/9] ARM: at91: remove references to non-existing CONFIG_ARCH_AT91* 2019-05-23 15:39 [PATCH v3 0/9] ARM: at91: misc fixes and cleanup Ahmad Fatoum 2019-05-23 15:39 ` [PATCH v3 1/9] ARM: at91: replace __raw_{readl, writel} of peripherals with readl, writel Ahmad Fatoum 2019-05-23 15:39 ` [PATCH v3 2/9] ARM: at91: debug_ll: make UART base address configurable Ahmad Fatoum @ 2019-05-23 15:39 ` Ahmad Fatoum 2019-05-23 15:39 ` [PATCH v3 4/9] ARM: at91: remove no-longer needed subarch #ifdefery Ahmad Fatoum ` (7 subsequent siblings) 10 siblings, 0 replies; 12+ messages in thread From: Ahmad Fatoum @ 2019-05-23 15:39 UTC (permalink / raw) To: barebox; +Cc: sam These symbols aren't set anywhere in barebox and in some cases they guard non-existing headers. Remove them. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> --- arch/arm/mach-at91/include/mach/at91_dbgu.h | 2 -- arch/arm/mach-at91/include/mach/hardware.h | 6 ------ 2 files changed, 8 deletions(-) diff --git a/arch/arm/mach-at91/include/mach/at91_dbgu.h b/arch/arm/mach-at91/include/mach/at91_dbgu.h index 3b5948566e52..e33a358153f9 100644 --- a/arch/arm/mach-at91/include/mach/at91_dbgu.h +++ b/arch/arm/mach-at91/include/mach/at91_dbgu.h @@ -16,7 +16,6 @@ #ifndef AT91_DBGU_H #define AT91_DBGU_H -#if !defined(CONFIG_ARCH_AT91X40) #define AT91_DBGU_CR (0x00) /* Control Register */ #define AT91_DBGU_MR (0x04) /* Mode Register */ #define AT91_DBGU_IER (0x08) /* Interrupt Enable Register */ @@ -34,7 +33,6 @@ #define AT91_DBGU_FNR (0x48) /* Force NTRST Register [SAM9 only] */ #define AT91_DBGU_FNTRST (1 << 0) /* Force NTRST */ -#endif /* AT91_DBGU */ /* * Some AT91 parts that don't have full DEBUG units still support the ID diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h index e2e01343d475..58dc6edfa93f 100644 --- a/arch/arm/mach-at91/include/mach/hardware.h +++ b/arch/arm/mach-at91/include/mach/hardware.h @@ -30,8 +30,6 @@ #include <mach/at91sam9261.h> #elif defined(CONFIG_ARCH_AT91SAM9263) #include <mach/at91sam9263.h> -#elif defined(CONFIG_ARCH_AT91SAM9RL) -#include <mach/at91sam9rl.h> #elif defined(CONFIG_ARCH_AT91SAM9G45) #include <mach/at91sam9g45.h> #elif defined(CONFIG_ARCH_AT91SAM9N12) @@ -42,10 +40,6 @@ #include <mach/sama5d3.h> #elif defined(CONFIG_ARCH_SAMA5D4) #include <mach/sama5d4.h> -#elif defined(CONFIG_ARCH_AT91CAP9) -#include <mach/at91cap9.h> -#elif defined(CONFIG_ARCH_AT91X40) -#include <mach/at91x40.h> #else #error "Unsupported AT91 processor" #endif -- 2.20.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3 4/9] ARM: at91: remove no-longer needed subarch #ifdefery 2019-05-23 15:39 [PATCH v3 0/9] ARM: at91: misc fixes and cleanup Ahmad Fatoum ` (2 preceding siblings ...) 2019-05-23 15:39 ` [PATCH v3 3/9] ARM: at91: remove references to non-existing CONFIG_ARCH_AT91* Ahmad Fatoum @ 2019-05-23 15:39 ` Ahmad Fatoum 2019-05-23 15:39 ` [PATCH v3 5/9] ARM: at91: remove #ifdefery around *_get_ddram_size helpers Ahmad Fatoum ` (6 subsequent siblings) 10 siblings, 0 replies; 12+ messages in thread From: Ahmad Fatoum @ 2019-05-23 15:39 UTC (permalink / raw) To: barebox; +Cc: sam c16bcbc644 ("ARM: at91: remove unused defines") removed conflicting definitions from the headers, so they can now be included all at the same time. Do this. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> --- arch/arm/mach-at91/include/mach/hardware.h | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h index 58dc6edfa93f..21462030e98b 100644 --- a/arch/arm/mach-at91/include/mach/hardware.h +++ b/arch/arm/mach-at91/include/mach/hardware.h @@ -22,27 +22,15 @@ /* sama5d4 */ #define AT91_BASE_DBGU2 0xfc069000 -#if defined(CONFIG_ARCH_AT91RM9200) #include <mach/at91rm9200.h> -#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20) #include <mach/at91sam9260.h> -#elif defined(CONFIG_ARCH_AT91SAM9261) || defined(CONFIG_ARCH_AT91SAM9G10) #include <mach/at91sam9261.h> -#elif defined(CONFIG_ARCH_AT91SAM9263) #include <mach/at91sam9263.h> -#elif defined(CONFIG_ARCH_AT91SAM9G45) #include <mach/at91sam9g45.h> -#elif defined(CONFIG_ARCH_AT91SAM9N12) #include <mach/at91sam9n12.h> -#elif defined(CONFIG_ARCH_AT91SAM9X5) #include <mach/at91sam9x5.h> -#elif defined(CONFIG_ARCH_SAMA5D3) #include <mach/sama5d3.h> -#elif defined(CONFIG_ARCH_SAMA5D4) #include <mach/sama5d4.h> -#else -#error "Unsupported AT91 processor" -#endif /* External Memory Map */ #define AT91_CHIPSELECT_0 0x10000000 -- 2.20.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3 5/9] ARM: at91: remove #ifdefery around *_get_ddram_size helpers 2019-05-23 15:39 [PATCH v3 0/9] ARM: at91: misc fixes and cleanup Ahmad Fatoum ` (3 preceding siblings ...) 2019-05-23 15:39 ` [PATCH v3 4/9] ARM: at91: remove no-longer needed subarch #ifdefery Ahmad Fatoum @ 2019-05-23 15:39 ` Ahmad Fatoum 2019-05-23 15:39 ` [PATCH v3 6/9] arm: sama5d4: fix stack setup Ahmad Fatoum ` (5 subsequent siblings) 10 siblings, 0 replies; 12+ messages in thread From: Ahmad Fatoum @ 2019-05-23 15:39 UTC (permalink / raw) To: barebox; +Cc: sam c16bcbc644 ("ARM: at91: remove unused defines") removed the conflicting defintions from these headers, so it's ok to include them at the same time now. Do this and remove the noise. Suggested-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> --- .../mach-at91/include/mach/at91sam9_ddrsdr.h | 33 +------------------ 1 file changed, 1 insertion(+), 32 deletions(-) diff --git a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h index b0c003cd1e05..835fdea259f2 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h +++ b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h @@ -137,6 +137,7 @@ Banks [not SAM9G45] */ #ifndef __ASSEMBLY__ #include <io.h> +#include <mach/hardware.h> static inline u32 at91_get_ddram_size(void * __iomem base, bool is_nb) { @@ -175,8 +176,6 @@ static inline u32 at91_get_ddram_size(void * __iomem base, bool is_nb) return size; } -#ifdef CONFIG_SOC_AT91SAM9G45 -#include <mach/at91sam9g45.h> static inline u32 at91sam9g45_get_ddram_size(int bank) { switch (bank) { @@ -188,41 +187,17 @@ static inline u32 at91sam9g45_get_ddram_size(int bank) return 0; } } -#else -static inline u32 at91sam9g45_get_ddram_size(int bank) -{ - return 0; -} -#endif -#ifdef CONFIG_SOC_AT91SAM9X5 -#include <mach/at91sam9x5.h> static inline u32 at91sam9x5_get_ddram_size(void) { return at91_get_ddram_size(IOMEM(AT91SAM9X5_BASE_DDRSDRC0), true); } -#else -static inline u32 at91sam9x5_get_ddram_size(void) -{ - return 0; -} -#endif -#ifdef CONFIG_SOC_AT91SAM9N12 -#include <mach/at91sam9n12.h> static inline u32 at91sam9n12_get_ddram_size(void) { return at91_get_ddram_size(IOMEM(AT91SAM9N12_BASE_DDRSDRC0), true); } -#else -static inline u32 at91sam9n12_get_ddram_size(void) -{ - return 0; -} -#endif -#ifdef CONFIG_SOC_SAMA5 -#include <mach/sama5d3.h> static inline u32 at91sama5_get_ddram_size(void) { u32 cr; @@ -252,12 +227,6 @@ static inline u32 at91sama5_get_ddram_size(void) return size; } -#else -static inline u32 at91sama5_get_ddram_size(void) -{ - return 0; -} -#endif #endif -- 2.20.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3 6/9] arm: sama5d4: fix stack setup 2019-05-23 15:39 [PATCH v3 0/9] ARM: at91: misc fixes and cleanup Ahmad Fatoum ` (4 preceding siblings ...) 2019-05-23 15:39 ` [PATCH v3 5/9] ARM: at91: remove #ifdefery around *_get_ddram_size helpers Ahmad Fatoum @ 2019-05-23 15:39 ` Ahmad Fatoum 2019-05-23 15:39 ` [PATCH v3 7/9] ARM: at91: fix at91sama5_get_ddram_size for sama5d4 Ahmad Fatoum ` (4 subsequent siblings) 10 siblings, 0 replies; 12+ messages in thread From: Ahmad Fatoum @ 2019-05-23 15:39 UTC (permalink / raw) To: barebox; +Cc: sam From: Sam Ravnborg <sam@ravnborg.org> The code that configure the stack uses sama5d3 constants. Fix this to use the proper sama5d4 constants. Boot tested on sama5d4_xplained. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> --- arch/arm/boards/sama5d4_xplained/lowlevel.c | 2 +- arch/arm/boards/sama5d4ek/lowlevel.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boards/sama5d4_xplained/lowlevel.c b/arch/arm/boards/sama5d4_xplained/lowlevel.c index 0e25270142f2..8ae4e6e0d237 100644 --- a/arch/arm/boards/sama5d4_xplained/lowlevel.c +++ b/arch/arm/boards/sama5d4_xplained/lowlevel.c @@ -17,7 +17,7 @@ void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint { arm_cpu_lowlevel_init(); - arm_setup_stack(SAMA5D3_SRAM_BASE + SAMA5D3_SRAM_SIZE - 16); + arm_setup_stack(SAMA5D4_SRAM_BASE + SAMA5D4_SRAM_SIZE - 16); barebox_arm_entry(SAMA5_DDRCS, at91sama5_get_ddram_size(), NULL); } diff --git a/arch/arm/boards/sama5d4ek/lowlevel.c b/arch/arm/boards/sama5d4ek/lowlevel.c index 0e25270142f2..8ae4e6e0d237 100644 --- a/arch/arm/boards/sama5d4ek/lowlevel.c +++ b/arch/arm/boards/sama5d4ek/lowlevel.c @@ -17,7 +17,7 @@ void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint { arm_cpu_lowlevel_init(); - arm_setup_stack(SAMA5D3_SRAM_BASE + SAMA5D3_SRAM_SIZE - 16); + arm_setup_stack(SAMA5D4_SRAM_BASE + SAMA5D4_SRAM_SIZE - 16); barebox_arm_entry(SAMA5_DDRCS, at91sama5_get_ddram_size(), NULL); } -- 2.20.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3 7/9] ARM: at91: fix at91sama5_get_ddram_size for sama5d4 2019-05-23 15:39 [PATCH v3 0/9] ARM: at91: misc fixes and cleanup Ahmad Fatoum ` (5 preceding siblings ...) 2019-05-23 15:39 ` [PATCH v3 6/9] arm: sama5d4: fix stack setup Ahmad Fatoum @ 2019-05-23 15:39 ` Ahmad Fatoum 2019-05-23 15:39 ` [PATCH v3 8/9] ARM: at91: remove duplicate get_ddram_size code Ahmad Fatoum ` (3 subsequent siblings) 10 siblings, 0 replies; 12+ messages in thread From: Ahmad Fatoum @ 2019-05-23 15:39 UTC (permalink / raw) To: barebox; +Cc: sam at91sama5_get_ddram_size() is despite the name specific to the sama5d3 which it was added alongside of. sama5d4 board code continues to use it, but accessing SAMA5D3_BASE_MPDDRC (0xffffea00) on a sama5d4 should result in a Data Abort (Datasheet Figure 5-1).. Fix this by giving at91sama5_get_ddram_size the mpddrc base address as argument and migrate users to use one of two helpers that specify the base address. Tested-by: Sam Ravnborg <sam@ravnborg.org> [afa: Sam didn't test this exact change, but tested the use of the critical part: accessing a different register] Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> --- arch/arm/boards/sama5d3_xplained/lowlevel.c | 2 +- arch/arm/boards/sama5d3xek/lowlevel.c | 2 +- arch/arm/boards/sama5d4_xplained/lowlevel.c | 2 +- arch/arm/boards/sama5d4ek/lowlevel.c | 2 +- arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h | 13 +++++++++++-- arch/arm/mach-at91/sama5d3_devices.c | 2 +- arch/arm/mach-at91/sama5d4_devices.c | 2 +- 7 files changed, 17 insertions(+), 8 deletions(-) diff --git a/arch/arm/boards/sama5d3_xplained/lowlevel.c b/arch/arm/boards/sama5d3_xplained/lowlevel.c index 0e25270142f2..8492ae95fb74 100644 --- a/arch/arm/boards/sama5d3_xplained/lowlevel.c +++ b/arch/arm/boards/sama5d3_xplained/lowlevel.c @@ -19,5 +19,5 @@ void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint arm_setup_stack(SAMA5D3_SRAM_BASE + SAMA5D3_SRAM_SIZE - 16); - barebox_arm_entry(SAMA5_DDRCS, at91sama5_get_ddram_size(), NULL); + barebox_arm_entry(SAMA5_DDRCS, at91sama5d3_get_ddram_size(), NULL); } diff --git a/arch/arm/boards/sama5d3xek/lowlevel.c b/arch/arm/boards/sama5d3xek/lowlevel.c index 0e25270142f2..b6d793e29f13 100644 --- a/arch/arm/boards/sama5d3xek/lowlevel.c +++ b/arch/arm/boards/sama5d3xek/lowlevel.c @@ -19,5 +19,5 @@ void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint arm_setup_stack(SAMA5D3_SRAM_BASE + SAMA5D3_SRAM_SIZE - 16); - barebox_arm_entry(SAMA5_DDRCS, at91sama5_get_ddram_size(), NULL); + barebox_arm_entry(SAMA5_DDRCS, at91sama5d3(), NULL); } diff --git a/arch/arm/boards/sama5d4_xplained/lowlevel.c b/arch/arm/boards/sama5d4_xplained/lowlevel.c index 8ae4e6e0d237..e06e37d5fd3d 100644 --- a/arch/arm/boards/sama5d4_xplained/lowlevel.c +++ b/arch/arm/boards/sama5d4_xplained/lowlevel.c @@ -19,5 +19,5 @@ void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint arm_setup_stack(SAMA5D4_SRAM_BASE + SAMA5D4_SRAM_SIZE - 16); - barebox_arm_entry(SAMA5_DDRCS, at91sama5_get_ddram_size(), NULL); + barebox_arm_entry(SAMA5_DDRCS, at91sama5d4(), NULL); } diff --git a/arch/arm/boards/sama5d4ek/lowlevel.c b/arch/arm/boards/sama5d4ek/lowlevel.c index 8ae4e6e0d237..9021ef57c5de 100644 --- a/arch/arm/boards/sama5d4ek/lowlevel.c +++ b/arch/arm/boards/sama5d4ek/lowlevel.c @@ -19,5 +19,5 @@ void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint arm_setup_stack(SAMA5D4_SRAM_BASE + SAMA5D4_SRAM_SIZE - 16); - barebox_arm_entry(SAMA5_DDRCS, at91sama5_get_ddram_size(), NULL); + barebox_arm_entry(SAMA5_DDRCS, at91sama5d4_get_ddram_size(), NULL); } diff --git a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h index 835fdea259f2..604c38d7e46c 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h +++ b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h @@ -198,12 +198,11 @@ static inline u32 at91sam9n12_get_ddram_size(void) return at91_get_ddram_size(IOMEM(AT91SAM9N12_BASE_DDRSDRC0), true); } -static inline u32 at91sama5_get_ddram_size(void) +static inline u32 at91sama5_get_ddram_size(void __iomem *base) { u32 cr; u32 mdr; u32 size; - void * __iomem base = IOMEM(SAMA5D3_BASE_MPDDRC); cr = readl(base + AT91_DDRSDRC_CR); mdr = readl(base + AT91_DDRSDRC_MDR); @@ -228,6 +227,16 @@ static inline u32 at91sama5_get_ddram_size(void) return size; } +static inline u32 at91sama5d3_get_ddram_size(void) +{ + return at91sama5_get_ddram_size(IOMEM(SAMA5D3_BASE_MPDDRC)); +} + +static inline u32 at91sama5d4_get_ddram_size(void) +{ + return at91sama5_get_ddram_size(IOMEM(SAMA5D4_BASE_MPDDRC)); +} + #endif #endif diff --git a/arch/arm/mach-at91/sama5d3_devices.c b/arch/arm/mach-at91/sama5d3_devices.c index f5075b39374f..bf4a03d40407 100644 --- a/arch/arm/mach-at91/sama5d3_devices.c +++ b/arch/arm/mach-at91/sama5d3_devices.c @@ -28,7 +28,7 @@ void at91_add_device_sdram(u32 size) { if (!size) - size = at91sama5_get_ddram_size(); + size = at91sama5d3_get_ddram_size(); arm_add_mem_device("ram0", SAMA5_DDRCS, size); add_mem_device("sram0", SAMA5D3_SRAM_BASE, diff --git a/arch/arm/mach-at91/sama5d4_devices.c b/arch/arm/mach-at91/sama5d4_devices.c index 4064e4441f9f..5a1109dc0eab 100644 --- a/arch/arm/mach-at91/sama5d4_devices.c +++ b/arch/arm/mach-at91/sama5d4_devices.c @@ -29,7 +29,7 @@ void at91_add_device_sdram(u32 size) { if (!size) - size = at91sama5_get_ddram_size(); + size = at91sama5d4_get_ddram_size(); arm_add_mem_device("ram0", SAMA5_DDRCS, size); add_mem_device("sram0", SAMA5D4_SRAM_BASE, -- 2.20.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3 8/9] ARM: at91: remove duplicate get_ddram_size code 2019-05-23 15:39 [PATCH v3 0/9] ARM: at91: misc fixes and cleanup Ahmad Fatoum ` (6 preceding siblings ...) 2019-05-23 15:39 ` [PATCH v3 7/9] ARM: at91: fix at91sama5_get_ddram_size for sama5d4 Ahmad Fatoum @ 2019-05-23 15:39 ` Ahmad Fatoum 2019-05-23 15:39 ` [PATCH v3 9/9] clk: at91: fix warning about missing const-safety Ahmad Fatoum ` (2 subsequent siblings) 10 siblings, 0 replies; 12+ messages in thread From: Ahmad Fatoum @ 2019-05-23 15:39 UTC (permalink / raw) To: barebox; +Cc: sam Both at91_get_ddram_size and at91sama5_get_ddram_size are the same if is_sdram == false and is_nb == true. is_sdram is always false, because according to the sama5d{2,3,4} datasheets, the lowest possible value for AT91_DDRSDRC_MD is 3 (i.e. none of them supports SDR SDRAM). Therefore replace calls to at91sama5_get_ddram_size with at91_get_ddram_size while is_nb == true and remove the duplicate code. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Tested-by: Sam Ravnborg <sam@ravnborg.org> --- .../mach-at91/include/mach/at91sam9_ddrsdr.h | 34 ++----------------- 1 file changed, 3 insertions(+), 31 deletions(-) diff --git a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h index 604c38d7e46c..34b2eed057c0 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h +++ b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h @@ -149,6 +149,7 @@ static inline u32 at91_get_ddram_size(void * __iomem base, bool is_nb) cr = readl(base + AT91_DDRSDRC_CR); mdr = readl(base + AT91_DDRSDRC_MDR); + /* will always be false for sama5d2, sama5d3 or sama5d4 */ is_sdram = (mdr & AT91_DDRSDRC_MD) <= AT91_DDRSDRC_MD_LOW_POWER_SDR; /* Formula: @@ -198,43 +199,14 @@ static inline u32 at91sam9n12_get_ddram_size(void) return at91_get_ddram_size(IOMEM(AT91SAM9N12_BASE_DDRSDRC0), true); } -static inline u32 at91sama5_get_ddram_size(void __iomem *base) -{ - u32 cr; - u32 mdr; - u32 size; - - cr = readl(base + AT91_DDRSDRC_CR); - mdr = readl(base + AT91_DDRSDRC_MDR); - - /* Formula: - * size = bank << (col + row + 1); - * if (bandwidth == 32 bits) - * size <<= 1; - */ - size = 1; - /* COL */ - size += (cr & AT91_DDRSDRC_NC) + 9; - /* ROW */ - size += ((cr & AT91_DDRSDRC_NR) >> 2) + 11; - /* BANK */ - size = ((cr & AT91_DDRSDRC_NB) ? 8 : 4) << size; - - /* bandwidth */ - if (!(mdr & AT91_DDRSDRC_DBW)) - size <<= 1; - - return size; -} - static inline u32 at91sama5d3_get_ddram_size(void) { - return at91sama5_get_ddram_size(IOMEM(SAMA5D3_BASE_MPDDRC)); + return at91_get_ddram_size(IOMEM(SAMA5D3_BASE_MPDDRC), true); } static inline u32 at91sama5d4_get_ddram_size(void) { - return at91sama5_get_ddram_size(IOMEM(SAMA5D4_BASE_MPDDRC)); + return at91_get_ddram_size(IOMEM(SAMA5D4_BASE_MPDDRC), true); } #endif -- 2.20.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3 9/9] clk: at91: fix warning about missing const-safety 2019-05-23 15:39 [PATCH v3 0/9] ARM: at91: misc fixes and cleanup Ahmad Fatoum ` (7 preceding siblings ...) 2019-05-23 15:39 ` [PATCH v3 8/9] ARM: at91: remove duplicate get_ddram_size code Ahmad Fatoum @ 2019-05-23 15:39 ` Ahmad Fatoum 2019-05-23 16:36 ` [PATCH v3 0/9] ARM: at91: misc fixes and cleanup Sam Ravnborg 2019-05-24 6:17 ` Sascha Hauer 10 siblings, 0 replies; 12+ messages in thread From: Ahmad Fatoum @ 2019-05-23 15:39 UTC (permalink / raw) To: barebox; +Cc: sam compiling clk-main.c and clk-generated.c results in: warning: passing argument 1 of 'memcpy' discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers] memcpy(clkmain->clk.parent_names, parent_names, parents_array_size); ~~~~~~~~~~~~^~~~~~~~~~~~~ Avoid this by replacing the xzalloc+memcpy pair with xmemdup. Zero-initialization of the buffer isn't necessary, because memcpy spans the whole buffer. Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> --- drivers/clk/at91/clk-generated.c | 3 +-- drivers/clk/at91/clk-main.c | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/clk/at91/clk-generated.c b/drivers/clk/at91/clk-generated.c index 60516ca10f36..396c35f3a7b3 100644 --- a/drivers/clk/at91/clk-generated.c +++ b/drivers/clk/at91/clk-generated.c @@ -181,8 +181,7 @@ at91_clk_register_generated(struct regmap *regmap, gck->hw.ops = &generated_ops; parents_array_size = num_parents * sizeof(gck->hw.parent_names[0]); - gck->hw.parent_names = xzalloc(parents_array_size); - memcpy(gck->hw.parent_names, parent_names, parents_array_size); + gck->hw.parent_names = xmemdup(parent_names, parents_array_size); gck->hw.num_parents = num_parents; /* gck->hw.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; */ diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c index 4d4127dd0016..abae35566c2f 100644 --- a/drivers/clk/at91/clk-main.c +++ b/drivers/clk/at91/clk-main.c @@ -455,8 +455,7 @@ at91_clk_register_sam9x5_main(struct regmap *regmap, clkmain->clk.name = name; clkmain->clk.ops = &sam9x5_main_ops; parents_array_size = num_parents * sizeof (clkmain->clk.parent_names[0]); - clkmain->clk.parent_names = xzalloc(parents_array_size); - memcpy(clkmain->clk.parent_names, parent_names, parents_array_size); + clkmain->clk.parent_names = xmemdup(parent_names, parents_array_size); clkmain->clk.num_parents = num_parents; /* init.flags = CLK_SET_PARENT_GATE; */ -- 2.20.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 0/9] ARM: at91: misc fixes and cleanup 2019-05-23 15:39 [PATCH v3 0/9] ARM: at91: misc fixes and cleanup Ahmad Fatoum ` (8 preceding siblings ...) 2019-05-23 15:39 ` [PATCH v3 9/9] clk: at91: fix warning about missing const-safety Ahmad Fatoum @ 2019-05-23 16:36 ` Sam Ravnborg 2019-05-24 6:17 ` Sascha Hauer 10 siblings, 0 replies; 12+ messages in thread From: Sam Ravnborg @ 2019-05-23 16:36 UTC (permalink / raw) To: Ahmad Fatoum; +Cc: barebox Hi Ahmad. On Thu, May 23, 2019 at 05:39:34PM +0200, Ahmad Fatoum wrote: > The fixes are the same as in v2. The cleanup was made cleaner > a bit. > > Changes since v2: > - Collected Sam's Tested-by and Reviewed-by > - Reinstated *_get_ddram_size helpers, but without #ifdefs, > as suggested by Sascha > - While doing that, some more unnecessary #ifdef usage unraveled, > so added two patches for those as well > - Squashed in a fix for another const-safety warning, suggested by Sam Changes looks good. I did not test them this time. It will be a while before I get back to barebox hacking. All patches are now: Reviewed-by: Sam Ravnborg <sam@ravnborg.org> _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 0/9] ARM: at91: misc fixes and cleanup 2019-05-23 15:39 [PATCH v3 0/9] ARM: at91: misc fixes and cleanup Ahmad Fatoum ` (9 preceding siblings ...) 2019-05-23 16:36 ` [PATCH v3 0/9] ARM: at91: misc fixes and cleanup Sam Ravnborg @ 2019-05-24 6:17 ` Sascha Hauer 10 siblings, 0 replies; 12+ messages in thread From: Sascha Hauer @ 2019-05-24 6:17 UTC (permalink / raw) To: Ahmad Fatoum; +Cc: barebox, sam On Thu, May 23, 2019 at 05:39:34PM +0200, Ahmad Fatoum wrote: > The fixes are the same as in v2. The cleanup was made cleaner > a bit. > > Changes since v2: > - Collected Sam's Tested-by and Reviewed-by > - Reinstated *_get_ddram_size helpers, but without #ifdefs, > as suggested by Sascha > - While doing that, some more unnecessary #ifdef usage unraveled, > so added two patches for those as well > - Squashed in a fix for another const-safety warning, suggested by Sam > > Changes since v1: > - Collected Sam's Tested-by and Reviewed-by > - Included Sam's fix for the sama5d4 as patch 03 > - moved debug_ll base address defaults to common/Kconfig > - above also got rid of a typo in the base address constant name > - added patches 06-09 which remove board-specific helpers as suggested > by Sascha in the review of the sama5d3 first stage patchset > - added patch 10 with a fix for a warning I ran into in the newly > ported clock drivers > > Ahmad Fatoum (8): > ARM: at91: replace __raw_{readl,writel} of peripherals with > readl,writel > ARM: at91: debug_ll: make UART base address configurable > ARM: at91: remove references to non-existing CONFIG_ARCH_AT91* > ARM: at91: remove no-longer needed subarch #ifdefery > ARM: at91: remove #ifdefery around *_get_ddram_size helpers > ARM: at91: fix at91sama5_get_ddram_size for sama5d4 > ARM: at91: remove duplicate get_ddram_size code > clk: at91: fix warning about missing const-safety > > Sam Ravnborg (1): > arm: sama5d4: fix stack setup Applied, thanks Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 12+ messages in thread
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2019-05-23 15:39 [PATCH v3 0/9] ARM: at91: misc fixes and cleanup Ahmad Fatoum
2019-05-23 15:39 ` [PATCH v3 1/9] ARM: at91: replace __raw_{readl, writel} of peripherals with readl, writel Ahmad Fatoum
2019-05-23 15:39 ` [PATCH v3 2/9] ARM: at91: debug_ll: make UART base address configurable Ahmad Fatoum
2019-05-23 15:39 ` [PATCH v3 3/9] ARM: at91: remove references to non-existing CONFIG_ARCH_AT91* Ahmad Fatoum
2019-05-23 15:39 ` [PATCH v3 4/9] ARM: at91: remove no-longer needed subarch #ifdefery Ahmad Fatoum
2019-05-23 15:39 ` [PATCH v3 5/9] ARM: at91: remove #ifdefery around *_get_ddram_size helpers Ahmad Fatoum
2019-05-23 15:39 ` [PATCH v3 6/9] arm: sama5d4: fix stack setup Ahmad Fatoum
2019-05-23 15:39 ` [PATCH v3 7/9] ARM: at91: fix at91sama5_get_ddram_size for sama5d4 Ahmad Fatoum
2019-05-23 15:39 ` [PATCH v3 8/9] ARM: at91: remove duplicate get_ddram_size code Ahmad Fatoum
2019-05-23 15:39 ` [PATCH v3 9/9] clk: at91: fix warning about missing const-safety Ahmad Fatoum
2019-05-23 16:36 ` [PATCH v3 0/9] ARM: at91: misc fixes and cleanup Sam Ravnborg
2019-05-24 6:17 ` Sascha Hauer
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