* [RFC 0/4] riscv: add initial LiteX SoC support
@ 2019-06-02 7:30 Antony Pavlov
2019-06-02 7:30 ` [RFC 1/4] " Antony Pavlov
` (4 more replies)
0 siblings, 5 replies; 9+ messages in thread
From: Antony Pavlov @ 2019-06-02 7:30 UTC (permalink / raw)
To: barebox
This RFC patchseries adds initial LiteX RISC-V SoC support for barebox.
You can obtain this patchseries from github:
$ git clone -b 20190602.litex https://github.com/frantony/barebox
LiteX is a Migen-based System on Chip [1], supporting softcore VexRiscv CPU,
a 32-bits Linux Capable RISC-V CPU [2].
All the components used to create the LiteX SoC are open-source and
the flexibility of Spinal HDL/Migen allow targeting easily very various
FPGA devices/boards: Lattice, Altera, Xilinx, Microsemi FPGAs
with SDRAM/DDR/DDR2/DDR3/DDR4 RAMs, RMII/MII/RGMII/1000BASE-X Ethernet PHYs.
The LiteX SoC with VexRiscv CPU can be deployed on e.g. Digilent ARTY board [3]
or Terasic DE0-Nano board [4].
You can boot barebox from serial port using flterm [5]:, e.g.:
flterm --port /dev/ttyUSB0 --kernel <path_to_barebox.bin> --kernel-adr 0x40000000
TODO
====
* add pbl support for riscv barebox;
* add liteeth Ethernet core support [6] (tip: use ARTY board);
* fix issues (see the WIP commit);
* use barebox to start linux [2] and zephyr [7].
REFERENCES
==========
[1] https://github.com/enjoy-digital/litex
[2] https://github.com/enjoy-digital/linux-on-litex-vexriscv
[3] https://store.digilentinc.com/arty-a7-artix-7-fpga-development-board-for-makers-and-hobbyists/
[4] http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=593
[5] https://github.com/timvideos/flterm
[6] https://github.com/enjoy-digital/liteeth
[7] https://github.com/zephyrproject-rtos/zephyr/tree/master/boards/riscv32/litex_vexriscv
Antony Pavlov (4):
riscv: add initial LiteX SoC support
serial: add litex UART driver
WIP: make it work on litex
riscv: add litex_defconfig
arch/riscv/Kconfig | 6 +
arch/riscv/Makefile | 1 +
arch/riscv/boot/start.S | 2 -
arch/riscv/configs/litex_defconfig | 45 +++++++
arch/riscv/dts/litex-generic.dts | 17 +++
arch/riscv/dts/litex.dtsi | 36 +++++
arch/riscv/mach-litex/Kconfig | 11 ++
arch/riscv/mach-litex/Makefile | 3 +
arch/riscv/mach-litex/include/mach/debug_ll.h | 124 ++++++++++++++++++
common/bootm.c | 2 +
drivers/serial/Makefile | 1 +
drivers/serial/serial_litex.c | 99 ++++++++++++++
12 files changed, 345 insertions(+), 2 deletions(-)
create mode 100644 arch/riscv/configs/litex_defconfig
create mode 100644 arch/riscv/dts/litex-generic.dts
create mode 100644 arch/riscv/dts/litex.dtsi
create mode 100644 arch/riscv/mach-litex/Kconfig
create mode 100644 arch/riscv/mach-litex/Makefile
create mode 100644 arch/riscv/mach-litex/include/mach/debug_ll.h
create mode 100644 drivers/serial/serial_litex.c
--
2.20.1
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* [RFC 1/4] riscv: add initial LiteX SoC support
2019-06-02 7:30 [RFC 0/4] riscv: add initial LiteX SoC support Antony Pavlov
@ 2019-06-02 7:30 ` Antony Pavlov
2019-06-02 7:30 ` [RFC 2/4] serial: add litex UART driver Antony Pavlov
` (3 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Antony Pavlov @ 2019-06-02 7:30 UTC (permalink / raw)
To: barebox
LiteX is a Migen-based System on Chip, supporting softcore VexRiscv CPU,
a 32-bits Linux Capable RISC-V CPU.
See https://github.com/enjoy-digital/litex for details.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/riscv/Kconfig | 6 +
arch/riscv/Makefile | 1 +
arch/riscv/dts/litex-generic.dts | 17 +++
arch/riscv/dts/litex.dtsi | 36 +++++
arch/riscv/mach-litex/Kconfig | 11 ++
arch/riscv/mach-litex/Makefile | 3 +
arch/riscv/mach-litex/include/mach/debug_ll.h | 124 ++++++++++++++++++
7 files changed, 198 insertions(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 16c3eecce6..ca764d54d0 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -24,6 +24,11 @@ config MACH_ERIZO
select HAS_DEBUG_LL
select HAS_NMON
+config MACH_LITEX
+ bool "litex family"
+ select HAS_DEBUG_LL
+ select HAS_NMON
+
endchoice
choice
@@ -63,6 +68,7 @@ config BUILTIN_DTB_NAME
depends on BUILTIN_DTB
source "arch/riscv/mach-erizo/Kconfig"
+source "arch/riscv/mach-litex/Kconfig"
endmenu
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index 643c0bc8eb..955a10cecb 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -12,6 +12,7 @@ LDFLAGS += $(ldflags-y)
LDFLAGS_barebox += -nostdlib
machine-$(CONFIG_MACH_ERIZO) := erizo
+machine-$(CONFIG_MACH_LITEX) := litex
TEXT_BASE = $(CONFIG_TEXT_BASE)
CPPFLAGS += -DTEXT_BASE=$(CONFIG_TEXT_BASE)
diff --git a/arch/riscv/dts/litex-generic.dts b/arch/riscv/dts/litex-generic.dts
new file mode 100644
index 0000000000..7dc0fa6c79
--- /dev/null
+++ b/arch/riscv/dts/litex-generic.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "litex.dtsi"
+
+/ {
+ model = "LiteX VexRiscV";
+ compatible = "litex,vexriscv";
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x00800000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/riscv/dts/litex.dtsi b/arch/riscv/dts/litex.dtsi
new file mode 100644
index 0000000000..dfd3d83404
--- /dev/null
+++ b/arch/riscv/dts/litex.dtsi
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+/dts-v1/;
+
+/ {
+ compatible = "litex,vexriscv", "litex-dev";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ clocks {
+ ref_clk: ref_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <50000000>;
+ };
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "spinalhdl,vexriscv", "riscv";
+ clocks = <&ref_clk>;
+ reg = <0>;
+ };
+ };
+
+ uart0: serial@e0001800 {
+ compatible = "litex,uart";
+ reg = <0xe0001800 0x18>;
+ status = "disabled";
+ };
+};
diff --git a/arch/riscv/mach-litex/Kconfig b/arch/riscv/mach-litex/Kconfig
new file mode 100644
index 0000000000..ab6cd2fa01
--- /dev/null
+++ b/arch/riscv/mach-litex/Kconfig
@@ -0,0 +1,11 @@
+if MACH_LITEX
+
+choice
+ prompt "Board type"
+
+config BOARD_LITEX_GENERIC
+ bool "litex generic board"
+
+endchoice
+
+endif
diff --git a/arch/riscv/mach-litex/Makefile b/arch/riscv/mach-litex/Makefile
new file mode 100644
index 0000000000..d9c51e74c3
--- /dev/null
+++ b/arch/riscv/mach-litex/Makefile
@@ -0,0 +1,3 @@
+# just to build a built-in.o. Otherwise compilation fails when no o-files is
+# created.
+obj- += dummy.o
diff --git a/arch/riscv/mach-litex/include/mach/debug_ll.h b/arch/riscv/mach-litex/include/mach/debug_ll.h
new file mode 100644
index 0000000000..aaf9f0b855
--- /dev/null
+++ b/arch/riscv/mach-litex/include/mach/debug_ll.h
@@ -0,0 +1,124 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2019 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __MACH_LITEX_DEBUG_LL__
+#define __MACH_LITEX_DEBUG_LL__
+
+/** @file
+ * This File contains declaration for early output support
+ */
+
+#include <linux/kconfig.h>
+
+#define DEBUG_LL_UART_ADDR 0xe0001800
+#define UART_RXTX 0x00
+#define UART_TXFULL 0x04
+#define UART_RXEMPTY 0x08
+#define UART_EV_PENDING 0x10
+#define UART_EV_RX (1 << 1)
+#define UART_EV_ENABLE 0x14
+
+
+#ifndef __ASSEMBLY__
+
+/*
+ * C macros
+ */
+
+#include <asm/io.h>
+
+static inline void PUTC_LL(char ch)
+{
+#ifdef CONFIG_DEBUG_LL
+ /* wait for space */
+ while (__raw_readb((u8 *)DEBUG_LL_UART_ADDR + UART_TXFULL))
+ ;
+
+ __raw_writeb(ch, (u8 *)DEBUG_LL_UART_ADDR + UART_RXTX);
+#endif /* CONFIG_DEBUG_LL */
+}
+#else /* __ASSEMBLY__ */
+/*
+ * Macros for use in assembly language code
+ */
+
+/*
+ * output a character in a0
+ */
+.macro debug_ll_outc_a0
+#ifdef CONFIG_DEBUG_LL
+
+ li t0, DEBUG_LL_UART_ADDR
+
+201:
+ lbu t1, UART_TXFULL(t0) /* uart tx full ? */
+ andi t1, t1, 0xff
+ bnez t1, 201b /* try again */
+
+ sb a0, UART_RXTX(t0) /* write the character */
+
+#endif /* CONFIG_DEBUG_LL */
+.endm
+
+/*
+ * output a character
+ */
+.macro debug_ll_outc chr
+#ifdef CONFIG_DEBUG_LL
+ li a0, \chr
+ debug_ll_outc_a0
+#endif /* CONFIG_DEBUG_LL */
+.endm
+
+/*
+ * check character in input buffer
+ * return value:
+ * v0 = 0 no character in input buffer
+ * v0 != 0 character in input buffer
+ */
+.macro debug_ll_tstc
+#ifdef CONFIG_DEBUG_LL
+ li t0, DEBUG_LL_UART_ADDR
+
+ /* get line status and check for data present */
+ lbu s0, UART_RXEMPTY(t0)
+ bnez s0, 243f
+ li s0, 1
+ j 244f
+243: li s0, 0
+244: nop
+#endif /* CONFIG_DEBUG_LL */
+.endm
+
+/*
+ * get character to v0
+ */
+.macro debug_ll_getc
+#ifdef CONFIG_DEBUG_LL
+
+204:
+ debug_ll_tstc
+
+ /* try again */
+ beqz s0, 204b
+
+ /* read a character */
+ lb s0, UART_RXTX(t0)
+ li t1, UART_EV_RX
+ sb t1, UART_EV_PENDING(t0)
+
+#endif /* CONFIG_DEBUG_LL */
+.endm
+#endif /* __ASSEMBLY__ */
+
+#endif /* __MACH_LITEX_DEBUG_LL__ */
--
2.20.1
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* [RFC 2/4] serial: add litex UART driver
2019-06-02 7:30 [RFC 0/4] riscv: add initial LiteX SoC support Antony Pavlov
2019-06-02 7:30 ` [RFC 1/4] " Antony Pavlov
@ 2019-06-02 7:30 ` Antony Pavlov
2019-06-03 5:10 ` Ahmad Fatoum
2019-06-02 7:31 ` [RFC 3/4] WIP: make it work on litex Antony Pavlov
` (2 subsequent siblings)
4 siblings, 1 reply; 9+ messages in thread
From: Antony Pavlov @ 2019-06-02 7:30 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
drivers/serial/Makefile | 1 +
drivers/serial/serial_litex.c | 99 +++++++++++++++++++++++++++++++++++
2 files changed, 100 insertions(+)
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 4174cc1ffb..fa86aa8c05 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -23,3 +23,4 @@ obj-$(CONFIG_DRIVER_SERIAL_CADENCE) += serial_cadence.o
obj-$(CONFIG_DRIVER_SERIAL_EFI_STDIO) += efi-stdio.o
obj-$(CONFIG_DRIVER_SERIAL_DIGIC) += serial_digic.o
obj-$(CONFIG_DRIVER_SERIAL_LPUART) += serial_lpuart.o
+obj-$(CONFIG_MACH_LITEX) += serial_litex.o
diff --git a/drivers/serial/serial_litex.c b/drivers/serial/serial_litex.c
new file mode 100644
index 0000000000..4a23921ac7
--- /dev/null
+++ b/drivers/serial/serial_litex.c
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: GPL-2.
+/*
+ * Copyright (C) 2019 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <malloc.h>
+#include <io.h>
+
+#include <mach/debug_ll.h>
+
+static inline uint32_t litex_serial_readb(struct console_device *cdev,
+ uint32_t offset)
+{
+ void __iomem *base = cdev->dev->priv;
+
+ return readb(base + offset);
+}
+
+static inline void litex_serial_writeb(struct console_device *cdev,
+ uint32_t value, uint32_t offset)
+{
+ void __iomem *base = cdev->dev->priv;
+
+ writeb(value, base + offset);
+}
+
+static void litex_serial_putc(struct console_device *cdev, char c)
+{
+ while (litex_serial_readb(cdev, UART_TXFULL))
+ ;
+
+ litex_serial_writeb(cdev, c, UART_RXTX);
+}
+
+static int litex_serial_getc(struct console_device *cdev)
+{
+ int c;
+
+ while (litex_serial_readb(cdev, UART_RXEMPTY))
+ ;
+
+ c = litex_serial_readb(cdev, UART_RXTX);
+
+ /* refresh UART_RXEMPTY by writing UART_EV_RX to UART_EV_PENDING */
+ litex_serial_writeb(cdev, UART_EV_RX, UART_EV_PENDING);
+
+ return c;
+}
+
+static int litex_serial_tstc(struct console_device *cdev)
+{
+ if (litex_serial_readb(cdev, UART_RXEMPTY)) {
+ return 0;
+ }
+
+ return 1;
+}
+
+static int litex_serial_probe(struct device_d *dev)
+{
+ struct resource *iores;
+ struct console_device *cdev;
+
+ cdev = xzalloc(sizeof(struct console_device));
+ iores = dev_request_mem_resource(dev, 0);
+ if (IS_ERR(iores))
+ return PTR_ERR(iores);
+ dev->priv = IOMEM(iores->start);
+ cdev->dev = dev;
+ cdev->tstc = &litex_serial_tstc;
+ cdev->putc = &litex_serial_putc;
+ cdev->getc = &litex_serial_getc;
+ cdev->setbrg = NULL;
+
+ console_register(cdev);
+
+ return 0;
+}
+
+static __maybe_unused struct of_device_id litex_serial_dt_ids[] = {
+ {
+ .compatible = "litex,uart",
+ }, {
+ /* sentinel */
+ }
+};
+
+static struct driver_d litex_serial_driver = {
+ .name = "litex-uart",
+ .probe = litex_serial_probe,
+ .of_compatible = DRV_OF_COMPAT(litex_serial_dt_ids),
+};
+console_platform_driver(litex_serial_driver);
--
2.20.1
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^ permalink raw reply [flat|nested] 9+ messages in thread
* [RFC 3/4] WIP: make it work on litex
2019-06-02 7:30 [RFC 0/4] riscv: add initial LiteX SoC support Antony Pavlov
2019-06-02 7:30 ` [RFC 1/4] " Antony Pavlov
2019-06-02 7:30 ` [RFC 2/4] serial: add litex UART driver Antony Pavlov
@ 2019-06-02 7:31 ` Antony Pavlov
2019-06-07 7:11 ` Sascha Hauer
2019-06-02 7:31 ` [RFC 4/4] riscv: add litex_defconfig Antony Pavlov
2019-06-02 9:08 ` [RFC 0/4] riscv: add initial LiteX SoC support Sam Ravnborg
4 siblings, 1 reply; 9+ messages in thread
From: Antony Pavlov @ 2019-06-02 7:31 UTC (permalink / raw)
To: barebox
* litex platform does not use ns16550 at all
so debug_ll_ns16550_init should be eliminated;
* there is no IH_ARCH_RISCV definition in include/image.h
at the moment, so the error stops compiling:
common/bootm.c: In function 'bootm_open_os_uimage':
common/bootm.c:491:34: error: 'IH_ARCH' undeclared (first use in this
function)
if (data->os->header.ih_arch != IH_ARCH) {
^~~~~~~
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/riscv/boot/start.S | 2 --
common/bootm.c | 2 ++
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/boot/start.S b/arch/riscv/boot/start.S
index d1dbe48b7b..fab23e926f 100644
--- a/arch/riscv/boot/start.S
+++ b/arch/riscv/boot/start.S
@@ -28,8 +28,6 @@
.globl _start
_start:
- debug_ll_ns16550_init
-
riscv_nmon
li sp, STACK_BASE + STACK_SIZE
diff --git a/common/bootm.c b/common/bootm.c
index 36f6c41bbd..37379ef03f 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -487,11 +487,13 @@ static int bootm_open_os_uimage(struct image_data *data)
uimage_print_contents(data->os);
+#if 0
if (data->os->header.ih_arch != IH_ARCH) {
printf("Unsupported Architecture 0x%x\n",
data->os->header.ih_arch);
return -EINVAL;
}
+#endif
if (data->os_address == UIMAGE_SOME_ADDRESS)
data->os_address = data->os->header.ih_load;
--
2.20.1
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* [RFC 4/4] riscv: add litex_defconfig
2019-06-02 7:30 [RFC 0/4] riscv: add initial LiteX SoC support Antony Pavlov
` (2 preceding siblings ...)
2019-06-02 7:31 ` [RFC 3/4] WIP: make it work on litex Antony Pavlov
@ 2019-06-02 7:31 ` Antony Pavlov
2019-06-02 9:08 ` [RFC 0/4] riscv: add initial LiteX SoC support Sam Ravnborg
4 siblings, 0 replies; 9+ messages in thread
From: Antony Pavlov @ 2019-06-02 7:31 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/riscv/configs/litex_defconfig | 45 ++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/arch/riscv/configs/litex_defconfig b/arch/riscv/configs/litex_defconfig
new file mode 100644
index 0000000000..cc8404e4b1
--- /dev/null
+++ b/arch/riscv/configs/litex_defconfig
@@ -0,0 +1,45 @@
+CONFIG_MACH_LITEX=y
+CONFIG_BUILTIN_DTB=y
+CONFIG_BUILTIN_DTB_NAME="litex-generic"
+CONFIG_NMON=y
+CONFIG_NMON_HELP=y
+CONFIG_TEXT_BASE=0x40000000
+CONFIG_MEMORY_LAYOUT_FIXED=y
+CONFIG_STACK_BASE=0x400e0000
+CONFIG_STACK_SIZE=0x20000
+CONFIG_MALLOC_BASE=0x40100000
+CONFIG_MALLOC_SIZE=0x100000
+CONFIG_MALLOC_TLSF=y
+CONFIG_PANIC_HANG=y
+CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+# CONFIG_ERRNO_MESSAGES is not set
+# CONFIG_TIMESTAMP is not set
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
+CONFIG_POLLER=y
+CONFIG_DEBUG_LL=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_IMD=y
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_BOOTM is not set
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADY=y
+CONFIG_CMD_CMP=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_CMD_MSLEEP=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MM=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_OF_DUMP=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_OFDEVICE=y
+# CONFIG_SPI is not set
+CONFIG_CLOCKSOURCE_DUMMY_RATE=60000
+CONFIG_GPIO_GENERIC_PLATFORM=y
+# CONFIG_PINCTRL is not set
+CONFIG_DIGEST_CRC32_GENERIC=y
--
2.20.1
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* Re: [RFC 0/4] riscv: add initial LiteX SoC support
2019-06-02 7:30 [RFC 0/4] riscv: add initial LiteX SoC support Antony Pavlov
` (3 preceding siblings ...)
2019-06-02 7:31 ` [RFC 4/4] riscv: add litex_defconfig Antony Pavlov
@ 2019-06-02 9:08 ` Sam Ravnborg
4 siblings, 0 replies; 9+ messages in thread
From: Sam Ravnborg @ 2019-06-02 9:08 UTC (permalink / raw)
To: Antony Pavlov; +Cc: barebox
Hi Antony
Nice patch series, thanks for sharing.
On Sun, Jun 02, 2019 at 10:30:57AM +0300, Antony Pavlov wrote:
> This RFC patchseries adds initial LiteX RISC-V SoC support for barebox.
>
> You can obtain this patchseries from github:
>
> $ git clone -b 20190602.litex https://github.com/frantony/barebox
>
> LiteX is a Migen-based System on Chip [1], supporting softcore VexRiscv CPU,
> a 32-bits Linux Capable RISC-V CPU [2].
>
> All the components used to create the LiteX SoC are open-source and
> the flexibility of Spinal HDL/Migen allow targeting easily very various
> FPGA devices/boards: Lattice, Altera, Xilinx, Microsemi FPGAs
> with SDRAM/DDR/DDR2/DDR3/DDR4 RAMs, RMII/MII/RGMII/1000BASE-X Ethernet PHYs.
>
> The LiteX SoC with VexRiscv CPU can be deployed on e.g. Digilent ARTY board [3]
> or Terasic DE0-Nano board [4].
>
> You can boot barebox from serial port using flterm [5]:, e.g.:
>
> flterm --port /dev/ttyUSB0 --kernel <path_to_barebox.bin> --kernel-adr 0x40000000
Can you be persuaded to include the above in a .rst file in
Documentation, so others can find this info later?
Sam
>
>
> TODO
> ====
>
> * add pbl support for riscv barebox;
> * add liteeth Ethernet core support [6] (tip: use ARTY board);
> * fix issues (see the WIP commit);
> * use barebox to start linux [2] and zephyr [7].
>
>
> REFERENCES
> ==========
>
> [1] https://github.com/enjoy-digital/litex
> [2] https://github.com/enjoy-digital/linux-on-litex-vexriscv
> [3] https://store.digilentinc.com/arty-a7-artix-7-fpga-development-board-for-makers-and-hobbyists/
> [4] http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=593
> [5] https://github.com/timvideos/flterm
> [6] https://github.com/enjoy-digital/liteeth
> [7] https://github.com/zephyrproject-rtos/zephyr/tree/master/boards/riscv32/litex_vexriscv
>
>
> Antony Pavlov (4):
> riscv: add initial LiteX SoC support
> serial: add litex UART driver
> WIP: make it work on litex
> riscv: add litex_defconfig
>
> arch/riscv/Kconfig | 6 +
> arch/riscv/Makefile | 1 +
> arch/riscv/boot/start.S | 2 -
> arch/riscv/configs/litex_defconfig | 45 +++++++
> arch/riscv/dts/litex-generic.dts | 17 +++
> arch/riscv/dts/litex.dtsi | 36 +++++
> arch/riscv/mach-litex/Kconfig | 11 ++
> arch/riscv/mach-litex/Makefile | 3 +
> arch/riscv/mach-litex/include/mach/debug_ll.h | 124 ++++++++++++++++++
> common/bootm.c | 2 +
> drivers/serial/Makefile | 1 +
> drivers/serial/serial_litex.c | 99 ++++++++++++++
> 12 files changed, 345 insertions(+), 2 deletions(-)
> create mode 100644 arch/riscv/configs/litex_defconfig
> create mode 100644 arch/riscv/dts/litex-generic.dts
> create mode 100644 arch/riscv/dts/litex.dtsi
> create mode 100644 arch/riscv/mach-litex/Kconfig
> create mode 100644 arch/riscv/mach-litex/Makefile
> create mode 100644 arch/riscv/mach-litex/include/mach/debug_ll.h
> create mode 100644 drivers/serial/serial_litex.c
>
> --
> 2.20.1
>
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [RFC 2/4] serial: add litex UART driver
2019-06-02 7:30 ` [RFC 2/4] serial: add litex UART driver Antony Pavlov
@ 2019-06-03 5:10 ` Ahmad Fatoum
2019-06-03 5:13 ` Ahmad Fatoum
0 siblings, 1 reply; 9+ messages in thread
From: Ahmad Fatoum @ 2019-06-03 5:10 UTC (permalink / raw)
To: barebox
On 2/6/19 09:30, Antony Pavlov wrote:
> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
> ---
> drivers/serial/Makefile | 1 +
> drivers/serial/serial_litex.c | 99 +++++++++++++++++++++++++++++++++++
> 2 files changed, 100 insertions(+)
>
> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
> index 4174cc1ffb..fa86aa8c05 100644
> --- a/drivers/serial/Makefile
> +++ b/drivers/serial/Makefile
> @@ -23,3 +23,4 @@ obj-$(CONFIG_DRIVER_SERIAL_CADENCE) += serial_cadence.o
> obj-$(CONFIG_DRIVER_SERIAL_EFI_STDIO) += efi-stdio.o
> obj-$(CONFIG_DRIVER_SERIAL_DIGIC) += serial_digic.o
> obj-$(CONFIG_DRIVER_SERIAL_LPUART) += serial_lpuart.o
> +obj-$(CONFIG_MACH_LITEX) += serial_litex.o
> diff --git a/drivers/serial/serial_litex.c b/drivers/serial/serial_litex.c
> new file mode 100644
> index 0000000000..4a23921ac7
> --- /dev/null
> +++ b/drivers/serial/serial_litex.c
> @@ -0,0 +1,99 @@
> +// SPDX-License-Identifier: GPL-2.
Rest of the line is missing is here.
> +/*
> + * Copyright (C) 2019 Antony Pavlov <antonynpavlov@gmail.com>
> + *
> + * This file is part of barebox.
> + * See file CREDITS for list of people who contributed to this project.
> + *
> + */
> +
> +#include <common.h>
> +#include <init.h>
> +#include <malloc.h>
> +#include <io.h>
> +
> +#include <mach/debug_ll.h>
left-over header?
> +
> +static inline uint32_t litex_serial_readb(struct console_device *cdev,
> + uint32_t offset)
Not a problem here, but I find it strange to have a readb that returns uint32_t.
> +{
> + void __iomem *base = cdev->dev->priv;
> +
> + return readb(base + offset);
> +}
> +
> +static inline void litex_serial_writeb(struct console_device *cdev,
> + uint32_t value, uint32_t offset)
> +{
> + void __iomem *base = cdev->dev->priv;
> +
> + writeb(value, base + offset);
> +}
> +
> +static void litex_serial_putc(struct console_device *cdev, char c)
> +{
> + while (litex_serial_readb(cdev, UART_TXFULL))
> + ;
> +
> + litex_serial_writeb(cdev, c, UART_RXTX);
> +}
> +
> +static int litex_serial_getc(struct console_device *cdev)
> +{
> + int c;
> +
> + while (litex_serial_readb(cdev, UART_RXEMPTY))
> + ;
> +
> + c = litex_serial_readb(cdev, UART_RXTX);
> +
> + /* refresh UART_RXEMPTY by writing UART_EV_RX to UART_EV_PENDING */
> + litex_serial_writeb(cdev, UART_EV_RX, UART_EV_PENDING);
> +
> + return c;
> +}
> +
> +static int litex_serial_tstc(struct console_device *cdev)
> +{
> + if (litex_serial_readb(cdev, UART_RXEMPTY)) {
> + return 0;
> + }
> +
> + return 1;
return !litex_serial_readb(cdev, UART_RXEMPTY)); ?
> +}
> +
> +static int litex_serial_probe(struct device_d *dev)
> +{
> + struct resource *iores;
> + struct console_device *cdev;
> +
> + cdev = xzalloc(sizeof(struct console_device));
> + iores = dev_request_mem_resource(dev, 0);
> + if (IS_ERR(iores))
> + return PTR_ERR(iores);
> + dev->priv = IOMEM(iores->start);
> + cdev->dev = dev;
> + cdev->tstc = &litex_serial_tstc;
> + cdev->putc = &litex_serial_putc;
> + cdev->getc = &litex_serial_getc;
> + cdev->setbrg = NULL;
> +
> + console_register(cdev);
> +
> + return 0;
> +}
> +
> +static __maybe_unused struct of_device_id litex_serial_dt_ids[] = {
> + {
> + .compatible = "litex,uart",
> + }, {
> + /* sentinel */
> + }
> +};
> +
> +static struct driver_d litex_serial_driver = {
> + .name = "litex-uart",
> + .probe = litex_serial_probe,
> + .of_compatible = DRV_OF_COMPAT(litex_serial_dt_ids),
> +};
> +console_platform_driver(litex_serial_driver);
>
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [RFC 2/4] serial: add litex UART driver
2019-06-03 5:10 ` Ahmad Fatoum
@ 2019-06-03 5:13 ` Ahmad Fatoum
0 siblings, 0 replies; 9+ messages in thread
From: Ahmad Fatoum @ 2019-06-03 5:13 UTC (permalink / raw)
To: barebox
On 3/6/19 07:10, Ahmad Fatoum wrote:
> On 2/6/19 09:30, Antony Pavlov wrote:
>> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
>> ---
>> drivers/serial/Makefile | 1 +
>> drivers/serial/serial_litex.c | 99 +++++++++++++++++++++++++++++++++++
>> 2 files changed, 100 insertions(+)
>>
>> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
>> index 4174cc1ffb..fa86aa8c05 100644
>> --- a/drivers/serial/Makefile
>> +++ b/drivers/serial/Makefile
>> +
>> +#include <mach/debug_ll.h>
>
> left-over header?
Ah never mind, it's used for the register definitions.
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [RFC 3/4] WIP: make it work on litex
2019-06-02 7:31 ` [RFC 3/4] WIP: make it work on litex Antony Pavlov
@ 2019-06-07 7:11 ` Sascha Hauer
0 siblings, 0 replies; 9+ messages in thread
From: Sascha Hauer @ 2019-06-07 7:11 UTC (permalink / raw)
To: Antony Pavlov; +Cc: barebox
On Sun, Jun 02, 2019 at 10:31:00AM +0300, Antony Pavlov wrote:
> * litex platform does not use ns16550 at all
> so debug_ll_ns16550_init should be eliminated;
>
> * there is no IH_ARCH_RISCV definition in include/image.h
> at the moment, so the error stops compiling:
> common/bootm.c: In function 'bootm_open_os_uimage':
> common/bootm.c:491:34: error: 'IH_ARCH' undeclared (first use in this
> function)
> if (data->os->header.ih_arch != IH_ARCH) {
> ^~~~~~~
U-Boot has IH_ARCH_RISCV already, you can copy it there.
>
> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
> ---
> arch/riscv/boot/start.S | 2 --
> common/bootm.c | 2 ++
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/boot/start.S b/arch/riscv/boot/start.S
> index d1dbe48b7b..fab23e926f 100644
> --- a/arch/riscv/boot/start.S
> +++ b/arch/riscv/boot/start.S
> @@ -28,8 +28,6 @@
>
> .globl _start
> _start:
> - debug_ll_ns16550_init
> -
This should be done by board code.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2019-06-07 7:11 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-06-02 7:30 [RFC 0/4] riscv: add initial LiteX SoC support Antony Pavlov
2019-06-02 7:30 ` [RFC 1/4] " Antony Pavlov
2019-06-02 7:30 ` [RFC 2/4] serial: add litex UART driver Antony Pavlov
2019-06-03 5:10 ` Ahmad Fatoum
2019-06-03 5:13 ` Ahmad Fatoum
2019-06-02 7:31 ` [RFC 3/4] WIP: make it work on litex Antony Pavlov
2019-06-07 7:11 ` Sascha Hauer
2019-06-02 7:31 ` [RFC 4/4] riscv: add litex_defconfig Antony Pavlov
2019-06-02 9:08 ` [RFC 0/4] riscv: add initial LiteX SoC support Sam Ravnborg
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