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From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH 6/7] mfd: add support for STPMIC1
Date: Wed, 10 Jul 2019 22:11:11 +0200	[thread overview]
Message-ID: <20190710201112.9086-6-a.fatoum@pengutronix.de> (raw)
In-Reply-To: <20190710201112.9086-1-a.fatoum@pengutronix.de>

The PMIC is addressable over I2C and, besides power management,
integrates a watchdog, a user power on key handling and 64 bit of
non-volatile memory.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/mfd/Kconfig   |  6 +++
 drivers/mfd/Makefile  |  1 +
 drivers/mfd/stpmic1.c | 99 +++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 106 insertions(+)
 create mode 100644 drivers/mfd/stpmic1.c

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index d04431fbc86d..7d924cfca1eb 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -61,4 +61,10 @@ config RAVE_SP_CORE
 	  Select this to get support for the Supervisory Processor
 	  device found on several devices in RAVE line of hardware.
 
+config MFD_STPMIC1
+	depends on I2C
+	bool "STPMIC1 MFD driver"
+	help
+	  Select this to support communication with the STPMIC1.
+
 endmenu
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 8b23a1023eb3..16a74abd77f3 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_MFD_TWLCORE)	+= twl-core.o
 obj-$(CONFIG_MFD_TWL4030)	+= twl4030.o
 obj-$(CONFIG_MFD_TWL6030)	+= twl6030.o
 obj-$(CONFIG_RAVE_SP_CORE)	+= rave-sp.o
+obj-$(CONFIG_MFD_STPMIC1)	+= stpmic1.o
diff --git a/drivers/mfd/stpmic1.c b/drivers/mfd/stpmic1.c
new file mode 100644
index 000000000000..88c7921990fc
--- /dev/null
+++ b/drivers/mfd/stpmic1.c
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Ahmad Fatoum, Pengutronix
+ */
+
+#include <common.h>
+#include <driver.h>
+#include <errno.h>
+#include <i2c/i2c.h>
+#include <init.h>
+#include <malloc.h>
+#include <of.h>
+#include <regmap.h>
+#include <xfuncs.h>
+
+#define VERSION_SR		0x6
+
+struct stpmic1 {
+	struct device_d		*dev;
+	struct i2c_client	*client;
+};
+
+static int stpmic1_i2c_reg_read(void *ctx, unsigned int reg, unsigned int *val)
+{
+	struct stpmic1 *stpmic1 = ctx;
+	u8 buf[1];
+	int ret;
+
+	ret = i2c_read_reg(stpmic1->client, reg, buf, 1);
+	*val = buf[0];
+
+	return ret == 1 ? 0 : ret;
+}
+
+static int stpmic1_i2c_reg_write(void *ctx, unsigned int reg, unsigned int val)
+{
+	struct stpmic1 *stpmic1 = ctx;
+	u8 buf[] = {
+		val & 0xff,
+	};
+	int ret;
+
+	ret = i2c_write_reg(stpmic1->client, reg, buf, 1);
+
+	return ret == 1 ? 0 : ret;
+}
+
+static struct regmap_bus regmap_stpmic1_i2c_bus = {
+	.reg_write = stpmic1_i2c_reg_write,
+	.reg_read = stpmic1_i2c_reg_read,
+};
+
+static const struct regmap_config stpmic1_regmap_i2c_config = {
+	.reg_bits = 8,
+	.val_bits = 8,
+	.max_register = 0xB3,
+};
+
+static int __init stpmic1_probe(struct device_d *dev)
+{
+	struct stpmic1 *stpmic1;
+	struct regmap *regmap;
+	u32 reg;
+	int ret;
+
+	stpmic1 = xzalloc(sizeof(*stpmic1));
+	stpmic1->dev = dev;
+
+	stpmic1->client = to_i2c_client(dev);
+	regmap = regmap_init(dev, &regmap_stpmic1_i2c_bus,
+			     stpmic1, &stpmic1_regmap_i2c_config);
+	dev->priv = regmap;
+
+	ret = regmap_register_cdev(regmap, NULL);
+	if (ret)
+		return ret;
+
+	ret = regmap_read(regmap, VERSION_SR, &reg);
+	if (ret) {
+		dev_err(dev, "Unable to read PMIC version\n");
+		return ret;
+	}
+	dev_info(dev, "PMIC Chip Version: 0x%x\n", reg);
+
+	return of_platform_populate(dev->device_node, NULL, dev);
+}
+
+static __maybe_unused struct of_device_id stpmic1_dt_ids[] = {
+	{ .compatible = "st,stpmic1" },
+	{ /* sentinel */ }
+};
+
+static struct driver_d stpmic1_i2c_driver = {
+	.name		= "stpmic1-i2c",
+	.probe		= stpmic1_probe,
+	.of_compatible	= DRV_OF_COMPAT(stpmic1_dt_ids),
+};
+
+device_i2c_driver(stpmic1_i2c_driver);
-- 
2.20.1


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  parent reply	other threads:[~2019-07-10 20:11 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-10 20:11 [PATCH 1/7] gpio: allow for arch-specific ARCH_NR_GPIOS > 256 Ahmad Fatoum
2019-07-10 20:11 ` [PATCH 2/7] ARM: stm32mp: set CONFIG_ARCH_NR_GPIO = (26 * 16) Ahmad Fatoum
2019-07-10 20:11 ` [PATCH 3/7] ARM: dts: stm32mp157c: correct gpioz id Ahmad Fatoum
2019-07-10 20:11 ` [PATCH 4/7] reset: add reset controller driver for STM32 RCC Ahmad Fatoum
2019-07-10 21:28   ` [PATCH] fixup! " Ahmad Fatoum
2019-07-10 20:11 ` [PATCH 5/7] i2c: add stm32f7 I2C adapter driver Ahmad Fatoum
2019-07-12  5:09   ` Sascha Hauer
2019-07-10 20:11 ` Ahmad Fatoum [this message]
2019-07-10 20:11 ` [PATCH 7/7] watchdog: add support for STPMIC1 integrated watchdog Ahmad Fatoum
2019-07-15  6:42 ` [PATCH 1/7] gpio: allow for arch-specific ARCH_NR_GPIOS > 256 Sascha Hauer

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