[PATCH 08/10] ARM: stm32mp: add basic DDR controller driver

[Ahmad Fatoum <a.fatoum@pengutronix.de>]

The STM32MP DDR Controller has a very flexible way of mapping address
bits to columns/rows/banks. This is so far configured by the ARM TF-A
as part of the SDRAM setup, so we don't need to do this in barebox.

Nevertheless reading it out in barebox, allows us to determine unused
address bits and thus the total size of SDRAM configured.

Add a simple driver that parses the ddrctrl node and adds an appropriate
memory bank. This can later be used to remove explicit calls to
arm_add_mem_device in board code.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 arch/arm/mach-stm32mp/ddrctrl.c | 34 +++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm/mach-stm32mp/ddrctrl.c b/arch/arm/mach-stm32mp/ddrctrl.c
index 90fb5e8956d0..b959441455d5 100644
--- a/arch/arm/mach-stm32mp/ddrctrl.c
+++ b/arch/arm/mach-stm32mp/ddrctrl.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <mach/stm32.h>
 #include <mach/ddr_regs.h>
 #include <mach/entry.h>
@@ -119,3 +120,36 @@ void __noreturn stm32mp1_barebox_entry(void *boarddata)
 {
 	barebox_arm_entry(STM32_DDR_BASE, stm32mp1_ddrctrl_ramsize(), boarddata);
 }
+
+
+static int stm32_ddrctrl_probe(struct device_d *dev)
+{
+	struct resource *iores;
+	void __iomem *base;
+
+	iores = dev_request_mem_resource(dev, 0);
+	if (IS_ERR(iores))
+		return PTR_ERR(iores);
+	base = IOMEM(iores->start);
+
+	arm_add_mem_device("ram0", STM32_DDR_BASE, ddrctrl_ramsize(base));
+
+	return 0;
+}
+
+static __maybe_unused struct of_device_id stm32_ddrctrl_dt_ids[] = {
+	{ .compatible = "st,stm32-ddrctrl" },
+	{ /* sentinel */ }
+};
+
+static struct driver_d stm32_ddrctrl_driver = {
+	.name   = "stm32-ddrctrl",
+	.probe  = stm32_ddrctrl_probe,
+	.of_compatible = DRV_OF_COMPAT(stm32_ddrctrl_dt_ids),
+};
+
+static int stm32_ddrctrl_init(void)
+{
+	return platform_driver_register(&stm32_ddrctrl_driver);
+}
+mem_initcall(stm32_ddrctrl_init);
-- 
2.24.0.rc1


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