From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH 11/12] PCI: dwc: Return directly when num-lanes is not found
Date: Wed, 27 Nov 2019 12:20:50 +0100 [thread overview]
Message-ID: <20191127112051.9427-12-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20191127112051.9427-1-s.hauer@pengutronix.de>
Port of Linux commit 66de33f09fd97201847de7e1e2ec8a117242e1d6
The num-lanes is optional since it is not needed on some platforms
that bring up the link in firmware.
The link programming is based on the num-lanes properties (which is
optional); if it is not present code must return instead of fiddling
with the lanes value to print an error message.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/pci/pcie-designware.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pcie-designware.c b/drivers/pci/pcie-designware.c
index 72deeee4ed..e2007dba6d 100644
--- a/drivers/pci/pcie-designware.c
+++ b/drivers/pci/pcie-designware.c
@@ -295,8 +295,10 @@ void dw_pcie_setup(struct dw_pcie *pci)
ret = of_property_read_u32(np, "num-lanes", &lanes);
- if (ret)
- lanes = 0;
+ if (ret) {
+ dev_dbg(pci->dev, "property num-lanes isn't found\n");
+ return;
+ }
/* Set the number of lanes */
val = dw_pcie_readl_dbi(pci, PCIE_PORT_LINK_CONTROL);
--
2.24.0
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next prev parent reply other threads:[~2019-11-27 11:21 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-27 11:20 [PATCH 00/12] Designware PCIe updates and Layerscape support Sascha Hauer
2019-11-27 11:20 ` [PATCH 01/12] PCI: dwc: Don't hard-code DBI/ATU offset Sascha Hauer
2019-11-27 11:20 ` [PATCH 02/12] PCI: dwc: Make use of IS_ALIGNED() Sascha Hauer
2019-11-27 11:20 ` [PATCH 03/12] PCI: dwc: Add dw_pcie_disable_atu() Sascha Hauer
2019-11-27 11:20 ` [PATCH 04/12] PCI: dwc: Make use of BIT() in constant definitions Sascha Hauer
2019-11-27 11:20 ` [PATCH 05/12] PCI: dwc: Enable iATU unroll for endpoint too Sascha Hauer
2019-11-27 11:20 ` [PATCH 06/12] PCI: dwc: Fix ATU identification for designware version >= 4.80 Sascha Hauer
2019-11-27 11:20 ` [PATCH 07/12] PCI: dwc: imx6: Share PHY debug register definitions Sascha Hauer
2019-11-27 11:20 ` [PATCH 08/12] PCI: dwc: Cleanup DBI,ATU read and write APIs Sascha Hauer
2019-11-27 11:20 ` [PATCH 09/12] PCI: dwc: rename readl/writel_dbi ops to read/write_dbi Sascha Hauer
2019-11-27 11:20 ` [PATCH 10/12] PCI: dwc: Sync register definitions with Linux-5.4 Sascha Hauer
2019-11-27 11:20 ` Sascha Hauer [this message]
2019-11-27 11:20 ` [PATCH 12/12] PCI: Add layerscape PCIe driver Sascha Hauer
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