From: Sascha Hauer <s.hauer@pengutronix.de>
To: Ahmad Fatoum <ahmad@a3f.at>
Cc: barebox@lists.infradead.org, lst@pengutronix.de
Subject: Re: [RFC PATCH 3/5] mci: add first-stage at91-sdhci driver
Date: Wed, 8 Jan 2020 12:23:33 +0100 [thread overview]
Message-ID: <20200108112333.oq5phovukrcgwh2h@pengutronix.de> (raw)
In-Reply-To: <20200106173540.20367-4-ahmad@a3f.at>
On Mon, Jan 06, 2020 at 06:35:38PM +0100, Ahmad Fatoum wrote:
> diff --git a/drivers/mci/sdhci.h b/drivers/mci/sdhci.h
> index a307dc97cd9a..48dc3f36530c 100644
> --- a/drivers/mci/sdhci.h
> +++ b/drivers/mci/sdhci.h
> @@ -38,6 +38,7 @@
> #define SDHCI_RESPONSE_1 0x14
> #define SDHCI_RESPONSE_2 0x18
> #define SDHCI_RESPONSE_3 0x1c
> +#define SDHCI_RESPONSE(i) (SDHCI_RESPONSE_0 + 4 * (i))
> #define SDHCI_BUFFER 0x20
> #define SDHCI_PRESENT_STATE 0x24
> #define SDHCI_WRITE_PROTECT BIT(19)
> @@ -53,6 +54,7 @@
> #define SDHCI_CARD_DETECT_SIGNAL_SELECTION BIT(7)
> #define SDHCI_CARD_DETECT_TEST_LEVEL BIT(6)
> #define SDHCI_DATA_WIDTH_8BIT BIT(5)
> +#define SDHCI_DMASEL_ADMA32 BIT(4)
Have you verified that all bits you add in this file are valid for the
generic SDHCI controller? There shouldn't be any Atmel specific bits
between them.
Sascha
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next prev parent reply other threads:[~2020-01-08 11:23 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-06 17:35 [RFC PATCH 0/5] fs: fat: extend for in-PBL support Ahmad Fatoum
2020-01-06 17:35 ` [RFC PATCH 1/5] pbl: add block I/O API Ahmad Fatoum
2020-01-06 17:35 ` [RFC PATCH 2/5] fs: fat: extend for in-PBL support Ahmad Fatoum
2020-01-08 11:14 ` Sascha Hauer
2020-01-06 17:35 ` [RFC PATCH 3/5] mci: add first-stage at91-sdhci driver Ahmad Fatoum
2020-01-08 11:23 ` Sascha Hauer [this message]
2020-01-06 17:35 ` [RFC PATCH 4/5] ARM: at91: add helpers for MCI barebox chain-loading Ahmad Fatoum
2020-01-06 17:35 ` [RFC PATCH 5/5] [WIP] ARM: at91: sama5d27-som1: add first stage entry point Ahmad Fatoum
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