* [PATCH 1/2] ARM: at91: add support for SAM9 SoC reset
@ 2020-03-05 8:02 Ahmad Fatoum
2020-03-05 8:02 ` [PATCH 2/2] ARM: at91: add sama5d27-based Groboards Giant Board support Ahmad Fatoum
2020-03-05 20:29 ` [PATCH 1/2] ARM: at91: add support for SAM9 SoC reset Sam Ravnborg
0 siblings, 2 replies; 7+ messages in thread
From: Ahmad Fatoum @ 2020-03-05 8:02 UTC (permalink / raw)
To: barebox; +Cc: Ahmad Fatoum
System reset wasn't supported on the sama5 so far.
Add a driver to remedy this.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
arch/arm/mach-at91/Kconfig | 5 +++
arch/arm/mach-at91/Makefile | 1 +
arch/arm/mach-at91/at91sam9_rst.c | 74 +++++++++++++++++++++++++++++++
3 files changed, 80 insertions(+)
create mode 100644 arch/arm/mach-at91/at91sam9_rst.c
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 5267102bf94e..0eb5410664bb 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -41,12 +41,16 @@ config AT91SAM926X_BOARD_INIT
config AT91SAM9_SMC
bool
+config HAVE_AT91SAM9_RST
+ bool
+
config SOC_AT91SAM9
bool
select CPU_ARM926T
select AT91SAM9_SMC
select CLOCKSOURCE_ATMEL_PIT
select PINCTRL
+ select HAVE_AT91SAM9_RST
select HAVE_AT91_SMD
select HAVE_AT91_USB_CLK
select HAVE_AT91_UTMI
@@ -54,6 +58,7 @@ config SOC_AT91SAM9
config SOC_SAMA5
bool
+ select HAVE_AT91SAM9_RST
select CPU_V7
config SOC_SAMA5D2
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 66d0b700f61e..89aff54b8af7 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -13,6 +13,7 @@ obj-y += at91sam9_reset.o
obj-y += at91sam9g45_reset.o
obj-$(CONFIG_AT91SAM9_SMC) += sam9_smc.o
+obj-$(CONFIG_HAVE_AT91SAM9_RST) += at91sam9_rst.o
# CPU-specific support
obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
diff --git a/arch/arm/mach-at91/at91sam9_rst.c b/arch/arm/mach-at91/at91sam9_rst.c
new file mode 100644
index 000000000000..cd266052c98d
--- /dev/null
+++ b/arch/arm/mach-at91/at91sam9_rst.c
@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Pengutronix, Ahmad Fatoum <a.fatoum@pengutronix.de>
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <restart.h>
+#include <linux/clk.h>
+#include <mach/at91_rstc.h>
+
+struct at91sam9x_rst {
+ struct restart_handler restart;
+ void __iomem *base;
+};
+
+static void __noreturn at91sam9x_restart_soc(struct restart_handler *rst)
+{
+ struct at91sam9x_rst *priv = container_of(rst, struct at91sam9x_rst, restart);
+
+ writel(AT91_RSTC_PROCRST
+ | AT91_RSTC_PERRST
+ | AT91_RSTC_EXTRST
+ | AT91_RSTC_KEY,
+ priv->base + AT91_RSTC_CR);
+
+ hang();
+}
+
+static int at91sam9x_rst_probe(struct device_d *dev)
+{
+ struct at91sam9x_rst *priv;
+ struct resource *iores;
+ struct clk *clk;
+
+ iores = dev_request_mem_resource(dev, 0);
+ if (IS_ERR(iores)) {
+ dev_err(dev, "could not get reset memory region\n");
+ return PTR_ERR(iores);
+ }
+
+ priv = xzalloc(sizeof(*priv));
+ priv->base = IOMEM(iores->start);
+
+ clk = clk_get(dev, NULL);
+ if (IS_ERR(clk)) {
+ release_region(iores);
+ free(priv);
+ return PTR_ERR(clk);
+ }
+
+ clk_enable(clk);
+
+ priv->restart.name = "at91sam9x_rst";
+ priv->restart.restart = at91sam9x_restart_soc;
+
+ restart_handler_register(&priv->restart);
+
+ return 0;
+}
+
+static const __maybe_unused struct of_device_id at91sam9x_rst_dt_ids[] = {
+ { .compatible = "atmel,at91sam9g45-rstc", },
+ { .compatible = "atmel,sama5d3-rstc", },
+ { /* sentinel */ },
+};
+
+static struct driver_d at91sam9x_rst_driver = {
+ .name = "at91sam9x-rst",
+ .of_compatible = DRV_OF_COMPAT(at91sam9x_rst_dt_ids),
+ .probe = at91sam9x_rst_probe,
+};
+device_platform_driver(at91sam9x_rst_driver);
--
2.25.1
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^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 2/2] ARM: at91: add sama5d27-based Groboards Giant Board support
2020-03-05 8:02 [PATCH 1/2] ARM: at91: add support for SAM9 SoC reset Ahmad Fatoum
@ 2020-03-05 8:02 ` Ahmad Fatoum
2020-03-05 20:37 ` Sam Ravnborg
2020-03-05 20:29 ` [PATCH 1/2] ARM: at91: add support for SAM9 SoC reset Sam Ravnborg
1 sibling, 1 reply; 7+ messages in thread
From: Ahmad Fatoum @ 2020-03-05 8:02 UTC (permalink / raw)
To: barebox; +Cc: Ahmad Fatoum
The Groboards Giant Board is a ATSAMA5D27C-D1G SiP-based SBC.
The board features a 500MHz ARM Cortex-A5 and 128MB DDR2 SDRAM in the
SiP as well as a MicroSD slot on the PCB.
barebox doesn't yet support the sama5d2 SDHCI-variant, so board support
is limited to toggling the LED and interfacing with the UART, but add
this now till the rest may follow. Device tree is based on the vendor's
device-tree available at https://github.com/Groboards/giantboard-tools
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
arch/arm/boards/Makefile | 1 +
arch/arm/boards/sama5d27-giantboard/Makefile | 1 +
.../arm/boards/sama5d27-giantboard/lowlevel.c | 56 ++++
arch/arm/dts/Makefile | 1 +
arch/arm/dts/at91-sama5d27_giantboard.dts | 299 ++++++++++++++++++
arch/arm/mach-at91/Kconfig | 8 +
images/Makefile.at91 | 4 +
7 files changed, 370 insertions(+)
create mode 100644 arch/arm/boards/sama5d27-giantboard/Makefile
create mode 100644 arch/arm/boards/sama5d27-giantboard/lowlevel.c
create mode 100644 arch/arm/dts/at91-sama5d27_giantboard.dts
diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 14538af53bf6..9fe458e0a390 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -113,6 +113,7 @@ obj-$(CONFIG_MACH_RPI_COMMON) += raspberry-pi/
obj-$(CONFIG_MACH_SABRELITE) += freescale-mx6-sabrelite/
obj-$(CONFIG_MACH_SABRESD) += freescale-mx6-sabresd/
obj-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += freescale-mx6sx-sabresdb/
+obj-$(CONFIG_MACH_SAMA5D27_GIANTBOARD) += sama5d27-giantboard/
obj-$(CONFIG_MACH_SAMA5D27_SOM1) += sama5d27-som1/
obj-$(CONFIG_MACH_SAMA5D3XEK) += sama5d3xek/
obj-$(CONFIG_MACH_SAMA5D3_XPLAINED) += sama5d3_xplained/
diff --git a/arch/arm/boards/sama5d27-giantboard/Makefile b/arch/arm/boards/sama5d27-giantboard/Makefile
new file mode 100644
index 000000000000..b08c4a93ca27
--- /dev/null
+++ b/arch/arm/boards/sama5d27-giantboard/Makefile
@@ -0,0 +1 @@
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/sama5d27-giantboard/lowlevel.c b/arch/arm/boards/sama5d27-giantboard/lowlevel.c
new file mode 100644
index 000000000000..cd762bd9f053
--- /dev/null
+++ b/arch/arm/boards/sama5d27-giantboard/lowlevel.c
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2019 Ahmad Fatoum, Pengutronix
+ */
+
+#include <common.h>
+#include <init.h>
+
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+#include <mach/at91_pmc_ll.h>
+
+#include <mach/hardware.h>
+#include <mach/iomux.h>
+#include <debug_ll.h>
+#include <mach/at91_dbgu.h>
+
+/* PCK = 492MHz, MCK = 164MHz */
+#define MASTER_CLOCK 164000000
+
+#define sama5d2_pmc_enable_periph_clock(clk) \
+ at91_pmc_sam9x5_enable_periph_clock(IOMEM(SAMA5D2_BASE_PMC), clk)
+
+static __always_inline void dbgu_init(void)
+{
+ unsigned mck = MASTER_CLOCK / 2;
+
+ sama5d2_pmc_enable_periph_clock(SAMA5D2_ID_PIOD);
+
+ at91_mux_pio4_set_A_periph(IOMEM(SAMA5D2_BASE_PIOD),
+ pin_to_mask(AT91_PIN_PD3)); /* DBGU TXD */
+
+ sama5d2_pmc_enable_periph_clock(SAMA5D2_ID_UART1);
+
+ at91_dbgu_setup_ll(IOMEM(SAMA5D2_BASE_UART1), mck, 115200);
+
+ putc_ll('>');
+}
+
+extern char __dtb_z_at91_sama5d27_giantboard_start[];
+
+ENTRY_FUNCTION(start_sama5d27_giantboard, r0, r1, r2)
+{
+ void *fdt;
+
+ arm_cpu_lowlevel_init();
+
+ arm_setup_stack(SAMA5D2_SRAM_BASE + SAMA5D2_SRAM_SIZE - 16);
+
+ if (IS_ENABLED(CONFIG_DEBUG_LL))
+ dbgu_init();
+
+ fdt = __dtb_z_at91_sama5d27_giantboard_start + get_runtime_offset();
+
+ barebox_arm_entry(SAMA5_DDRCS, SZ_128M, fdt);
+}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b1c9a2c7903f..ddfe64e83bdf 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -138,6 +138,7 @@ lwl-dtb-$(CONFIG_MACH_ZII_VF610_DEV) += \
lwl-dtb-$(CONFIG_MACH_AT91SAM9263EK_DT) += at91sam9263ek.dtb.o
lwl-dtb-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) += at91-microchip-ksz9477-evb.dtb.o
lwl-dtb-$(CONFIG_MACH_SAMA5D27_SOM1) += at91-sama5d27_som1_ek.dtb.o
+lwl-dtb-$(CONFIG_MACH_SAMA5D27_GIANTBOARD) += at91-sama5d27_giantboard.dtb.o
lwl-dtb-$(CONFIG_MACH_AT91SAM9X5EK) += at91sam9x5ek.dtb.o
lwl-dtb-$(CONFIG_MACH_XILINX_ZCU104) += zynqmp-zcu104-revA.dtb.o
diff --git a/arch/arm/dts/at91-sama5d27_giantboard.dts b/arch/arm/dts/at91-sama5d27_giantboard.dts
new file mode 100644
index 000000000000..940379e43005
--- /dev/null
+++ b/arch/arm/dts/at91-sama5d27_giantboard.dts
@@ -0,0 +1,299 @@
+// SPDX-License-Identifer: GPL-2.0-or-later OR X11
+/*
+ * at91-sama5d27_giantboard.dts - Device Tree file for SAMA5D27 Giant Board
+ *
+ * Copyright (c) 2017, Microchip Technology Inc.
+ * 2016 Nicolas Ferre <nicolas.ferre@atmel.com>
+ * 2017 Cristian Birsan <cristian.birsan@microchip.com>
+ * 2017 Claudiu Beznea <claudiu.beznea@microchip.com>
+ * 2019 Ahmad Fatoum <a.fatoum@pengutronix.de>
+ */
+
+/dts-v1/;
+
+#include <arm/sama5d2.dtsi>
+#include <arm/sama5d2-pinfunc.h>
+#include <dt-bindings/mfd/atmel-flexcom.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/regulator/active-semi,8945a-regulator.h>
+
+/ {
+ model = "Giant Board";
+ compatible = "groboards,sama5d27-giantboard", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
+
+ chosen {
+ stdout-path = &uart1;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_led_gpio_default>;
+
+ orange {
+ label = "orange";
+ gpios = <&pioA PIN_PA6 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
+ };
+ };
+
+ memory {
+ reg = <0x20000000 0x8000000>;
+ };
+};
+
+&slow_xtal {
+ clock-frequency = <32768>;
+};
+
+&main_xtal {
+ clock-frequency = <24000000>;
+};
+
+&usb0 {
+ status = "okay";
+};
+
+&sdmmc1 {
+ bus-width = <4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdmmc1_default>;
+ status = "okay";
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi0_default>;
+ status = "disabled";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1_default>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ status = "okay";
+};
+
+&shutdown_controller {
+ atmel,shdwc-debouncer = <976>;
+ atmel,wakeup-rtc-timer;
+
+ input@0 {
+ reg = <0>;
+ atmel,wakeup-type = "low";
+ };
+};
+
+&watchdog {
+ status = "okay";
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0_default>;
+ dmas = <0>, <0>;
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_default>;
+ dmas = <0>, <0>;
+ i2c-sda-hold-time-ns = <350>;
+ status = "okay";
+
+ pmic@5b {
+ compatible = "active-semi,act8945a";
+ reg = <0x5b>;
+ active-semi,vsel-low;
+
+ regulators {
+ vdd_1v8_reg: REG_DCDC1 {
+ regulator-name = "VDD_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+
+ regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_FIXED>,
+ <ACT8945A_REGULATOR_MODE_LOWPOWER>;
+ regulator-initial-mode = <ACT8945A_REGULATOR_MODE_FIXED>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-min-microvolt=<1850000>;
+ regulator-suspend-max-microvolt=<1850000>;
+ regulator-changeable-in-suspend;
+ regulator-mode=<ACT8945A_REGULATOR_MODE_LOWPOWER>;
+ };
+ };
+
+ vdd_1v2_reg: REG_DCDC2 {
+ regulator-name = "VDD_1V2";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_FIXED>,
+ <ACT8945A_REGULATOR_MODE_LOWPOWER>;
+ regulator-initial-mode = <ACT8945A_REGULATOR_MODE_FIXED>;
+ regulator-always-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_3v3_reg: REG_DCDC3 {
+ regulator-name = "VDD_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_FIXED>,
+ <ACT8945A_REGULATOR_MODE_LOWPOWER>;
+ regulator-initial-mode = <ACT8945A_REGULATOR_MODE_FIXED>;
+ regulator-always-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_fuse_reg: REG_LDO1 {
+ regulator-name = "VDD_FUSE";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>,
+ <ACT8945A_REGULATOR_MODE_LOWPOWER>;
+ regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>;
+ regulator-always-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_3v3_lp_reg: REG_LDO2 {
+ regulator-name = "VDD_3V3_LP";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>,
+ <ACT8945A_REGULATOR_MODE_LOWPOWER>;
+ regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>;
+ regulator-always-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_led_reg: REG_LDO3 {
+ regulator-name = "VDD_LED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>,
+ <ACT8945A_REGULATOR_MODE_LOWPOWER>;
+ regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>;
+ regulator-always-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_sdhc_1v8_reg: REG_LDO4 {
+ regulator-name = "VDD_SDHC_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>,
+ <ACT8945A_REGULATOR_MODE_LOWPOWER>;
+ regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>;
+ regulator-always-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+
+ charger {
+ compatible = "active-semi,act8945a-charger";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_charger_chglev &pinctrl_charger_lbo &pinctrl_charger_irq>;
+ interrupt-parent = <&pioA>;
+ interrupts = <PIN_PB13 IRQ_TYPE_EDGE_RISING>;
+
+ active-semi,chglev-gpios = <&pioA PIN_PA12 GPIO_ACTIVE_HIGH>;
+ active-semi,lbo-gpios = <&pioA PIN_PC8 GPIO_ACTIVE_LOW>;
+ active-semi,input-voltage-threshold-microvolt = <6600>;
+ active-semi,precondition-timeout = <40>;
+ active-semi,total-timeout = <3>;
+ };
+ };
+};
+
+&adc {
+ vddana-supply = <&vdd_3v3_reg>;
+ vref-supply = <&vdd_3v3_reg>;
+ status = "disabled";
+};
+
+&pioA {
+ pinctrl_i2c0_default: i2c0_default {
+ pinmux = <PIN_PB31__TWD0>,
+ <PIN_PC0__TWCK0>;
+ bias-disable;
+ };
+
+ pinctrl_i2c1_default: i2c1_default {
+ pinmux = <PIN_PD4__TWD1>,
+ <PIN_PD5__TWCK1>;
+ bias-disable;
+ };
+
+ pinctrl_led_gpio_default: led_gpio_default {
+ pinmux = <PIN_PA6__GPIO>;
+ bias-pull-down;
+ };
+
+ pinctrl_sdmmc1_default: sdmmc1_default {
+ cmd_data {
+ pinmux = <PIN_PA28__SDMMC1_CMD>,
+ <PIN_PA18__SDMMC1_DAT0>,
+ <PIN_PA19__SDMMC1_DAT1>,
+ <PIN_PA20__SDMMC1_DAT2>,
+ <PIN_PA21__SDMMC1_DAT3>;
+ bias-pull-up;
+ };
+
+ conf-ck_cd {
+ pinmux = <PIN_PA22__SDMMC1_CK>,
+ <PIN_PA30__SDMMC1_CD>;
+ bias-disable;
+ };
+ };
+
+ pinctrl_spi0_default: spi0_default {
+ pinmux = <PIN_PA14__SPI0_SPCK>,
+ <PIN_PA15__SPI0_MOSI>,
+ <PIN_PA16__SPI0_MISO>;
+ bias-disable;
+ };
+
+ pinctrl_uart1_default: uart1_default {
+ pinmux = <PIN_PD2__URXD1>,
+ <PIN_PD3__UTXD1>;
+ bias-disable;
+ };
+
+ pinctrl_charger_chglev: charger_chglev {
+ pinmux = <PIN_PA12__GPIO>;
+ bias-disable;
+ };
+
+ pinctrl_charger_irq: charger_irq {
+ pinmux = <PIN_PB13__GPIO>;
+ bias-disable;
+ };
+
+ pinctrl_charger_lbo: charger_lbo {
+ pinmux = <PIN_PC8__GPIO>;
+ bias-pull-up;
+ };
+};
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 0eb5410664bb..eb14cd2c28da 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -587,6 +587,14 @@ config MACH_SAMA5D27_SOM1
help
Select this if you are using Microchip's sama5d27 SoM evaluation kit
+config MACH_SAMA5D27_GIANTBOARD
+ bool "Groboards SAMA5D27 Giant Board"
+ select SOC_SAMA5D2
+ select OFDEVICE
+ select COMMON_CLK_OF_PROVIDER
+ help
+ Select this if you are using the Groboards sama5d27 Giantboard
+
endif
comment "AT91 Board Options"
diff --git a/images/Makefile.at91 b/images/Makefile.at91
index f321bdec3696..448d71fb981d 100644
--- a/images/Makefile.at91
+++ b/images/Makefile.at91
@@ -17,3 +17,7 @@ image-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) += barebox-microchip-ksz9477-evb.img
pblb-$(CONFIG_MACH_SAMA5D27_SOM1) += start_sama5d27_som1_ek
FILE_barebox-sama5d27-som1-ek.img = start_sama5d27_som1_ek.pblb
image-$(CONFIG_MACH_SAMA5D27_SOM1) += barebox-sama5d27-som1-ek.img
+
+pblb-$(CONFIG_MACH_SAMA5D27_GIANTBOARD) += start_sama5d27_giantboard
+FILE_barebox-groboards-sama5d27-giantboard.img = start_sama5d27_giantboard.pblb
+image-$(CONFIG_MACH_SAMA5D27_GIANTBOARD) += barebox-groboards-sama5d27-giantboard.img
--
2.25.1
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] ARM: at91: add support for SAM9 SoC reset
2020-03-05 8:02 [PATCH 1/2] ARM: at91: add support for SAM9 SoC reset Ahmad Fatoum
2020-03-05 8:02 ` [PATCH 2/2] ARM: at91: add sama5d27-based Groboards Giant Board support Ahmad Fatoum
@ 2020-03-05 20:29 ` Sam Ravnborg
2020-03-06 6:00 ` Ahmad Fatoum
1 sibling, 1 reply; 7+ messages in thread
From: Sam Ravnborg @ 2020-03-05 20:29 UTC (permalink / raw)
To: Ahmad Fatoum; +Cc: barebox
Hi Ahmad.
On Thu, Mar 05, 2020 at 09:02:24AM +0100, Ahmad Fatoum wrote:
> System reset wasn't supported on the sama5 so far.
> Add a driver to remedy this.
>
> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Looked through the patch - everything looked good.
One question below.
With the question considered:
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Sam
> ---
> arch/arm/mach-at91/Kconfig | 5 +++
> arch/arm/mach-at91/Makefile | 1 +
> arch/arm/mach-at91/at91sam9_rst.c | 74 +++++++++++++++++++++++++++++++
> 3 files changed, 80 insertions(+)
> create mode 100644 arch/arm/mach-at91/at91sam9_rst.c
>
> diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
> index 5267102bf94e..0eb5410664bb 100644
> --- a/arch/arm/mach-at91/Kconfig
> +++ b/arch/arm/mach-at91/Kconfig
> @@ -41,12 +41,16 @@ config AT91SAM926X_BOARD_INIT
> config AT91SAM9_SMC
> bool
>
> +config HAVE_AT91SAM9_RST
> + bool
> +
> config SOC_AT91SAM9
> bool
> select CPU_ARM926T
> select AT91SAM9_SMC
> select CLOCKSOURCE_ATMEL_PIT
> select PINCTRL
> + select HAVE_AT91SAM9_RST
> select HAVE_AT91_SMD
> select HAVE_AT91_USB_CLK
> select HAVE_AT91_UTMI
> @@ -54,6 +58,7 @@ config SOC_AT91SAM9
>
> config SOC_SAMA5
> bool
> + select HAVE_AT91SAM9_RST
> select CPU_V7
>
> config SOC_SAMA5D2
> diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
> index 66d0b700f61e..89aff54b8af7 100644
> --- a/arch/arm/mach-at91/Makefile
> +++ b/arch/arm/mach-at91/Makefile
> @@ -13,6 +13,7 @@ obj-y += at91sam9_reset.o
> obj-y += at91sam9g45_reset.o
>
> obj-$(CONFIG_AT91SAM9_SMC) += sam9_smc.o
> +obj-$(CONFIG_HAVE_AT91SAM9_RST) += at91sam9_rst.o
>
> # CPU-specific support
> obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
> diff --git a/arch/arm/mach-at91/at91sam9_rst.c b/arch/arm/mach-at91/at91sam9_rst.c
> new file mode 100644
> index 000000000000..cd266052c98d
> --- /dev/null
> +++ b/arch/arm/mach-at91/at91sam9_rst.c
> @@ -0,0 +1,74 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2019 Pengutronix, Ahmad Fatoum <a.fatoum@pengutronix.de>
> + */
> +
> +#include <common.h>
> +#include <init.h>
> +#include <io.h>
> +#include <restart.h>
> +#include <linux/clk.h>
> +#include <mach/at91_rstc.h>
> +
> +struct at91sam9x_rst {
> + struct restart_handler restart;
> + void __iomem *base;
> +};
> +
> +static void __noreturn at91sam9x_restart_soc(struct restart_handler *rst)
> +{
> + struct at91sam9x_rst *priv = container_of(rst, struct at91sam9x_rst, restart);
> +
> + writel(AT91_RSTC_PROCRST
> + | AT91_RSTC_PERRST
> + | AT91_RSTC_EXTRST
> + | AT91_RSTC_KEY,
> + priv->base + AT91_RSTC_CR);
> +
> + hang();
> +}
> +
> +static int at91sam9x_rst_probe(struct device_d *dev)
> +{
> + struct at91sam9x_rst *priv;
> + struct resource *iores;
> + struct clk *clk;
> +
> + iores = dev_request_mem_resource(dev, 0);
> + if (IS_ERR(iores)) {
> + dev_err(dev, "could not get reset memory region\n");
> + return PTR_ERR(iores);
> + }
> +
> + priv = xzalloc(sizeof(*priv));
> + priv->base = IOMEM(iores->start);
> +
> + clk = clk_get(dev, NULL);
> + if (IS_ERR(clk)) {
> + release_region(iores);
> + free(priv);
> + return PTR_ERR(clk);
> + }
> +
> + clk_enable(clk);
> +
> + priv->restart.name = "at91sam9x_rst";
Or the driver name:
at91sam9x-rst?
> + priv->restart.restart = at91sam9x_restart_soc;
> +
> + restart_handler_register(&priv->restart);
> +
> + return 0;
> +}
> +
> +static const __maybe_unused struct of_device_id at91sam9x_rst_dt_ids[] = {
> + { .compatible = "atmel,at91sam9g45-rstc", },
> + { .compatible = "atmel,sama5d3-rstc", },
> + { /* sentinel */ },
> +};
> +
> +static struct driver_d at91sam9x_rst_driver = {
> + .name = "at91sam9x-rst",
> + .of_compatible = DRV_OF_COMPAT(at91sam9x_rst_dt_ids),
> + .probe = at91sam9x_rst_probe,
> +};
> +device_platform_driver(at91sam9x_rst_driver);
> --
> 2.25.1
>
>
> _______________________________________________
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] ARM: at91: add sama5d27-based Groboards Giant Board support
2020-03-05 8:02 ` [PATCH 2/2] ARM: at91: add sama5d27-based Groboards Giant Board support Ahmad Fatoum
@ 2020-03-05 20:37 ` Sam Ravnborg
2020-03-06 6:06 ` Ahmad Fatoum
0 siblings, 1 reply; 7+ messages in thread
From: Sam Ravnborg @ 2020-03-05 20:37 UTC (permalink / raw)
To: Ahmad Fatoum; +Cc: barebox
Hi Ahmad.
On Thu, Mar 05, 2020 at 09:02:25AM +0100, Ahmad Fatoum wrote:
> The Groboards Giant Board is a ATSAMA5D27C-D1G SiP-based SBC.
> The board features a 500MHz ARM Cortex-A5 and 128MB DDR2 SDRAM in the
> SiP as well as a MicroSD slot on the PCB.
>
> barebox doesn't yet support the sama5d2 SDHCI-variant, so board support
> is limited to toggling the LED and interfacing with the UART, but add
> this now till the rest may follow. Device tree is based on the vendor's
> device-tree available at https://github.com/Groboards/giantboard-tools
>
> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Browsed the patch - everything looked good.
A few nit for you to consider.
With the nits considered, and not necessarily any changes:
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Sam
> ---
> arch/arm/boards/Makefile | 1 +
> arch/arm/boards/sama5d27-giantboard/Makefile | 1 +
> .../arm/boards/sama5d27-giantboard/lowlevel.c | 56 ++++
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/at91-sama5d27_giantboard.dts | 299 ++++++++++++++++++
> arch/arm/mach-at91/Kconfig | 8 +
> images/Makefile.at91 | 4 +
> 7 files changed, 370 insertions(+)
> create mode 100644 arch/arm/boards/sama5d27-giantboard/Makefile
> create mode 100644 arch/arm/boards/sama5d27-giantboard/lowlevel.c
> create mode 100644 arch/arm/dts/at91-sama5d27_giantboard.dts
>
> diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
> index 14538af53bf6..9fe458e0a390 100644
> --- a/arch/arm/boards/Makefile
> +++ b/arch/arm/boards/Makefile
> @@ -113,6 +113,7 @@ obj-$(CONFIG_MACH_RPI_COMMON) += raspberry-pi/
> obj-$(CONFIG_MACH_SABRELITE) += freescale-mx6-sabrelite/
> obj-$(CONFIG_MACH_SABRESD) += freescale-mx6-sabresd/
> obj-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += freescale-mx6sx-sabresdb/
> +obj-$(CONFIG_MACH_SAMA5D27_GIANTBOARD) += sama5d27-giantboard/
> obj-$(CONFIG_MACH_SAMA5D27_SOM1) += sama5d27-som1/
> obj-$(CONFIG_MACH_SAMA5D3XEK) += sama5d3xek/
> obj-$(CONFIG_MACH_SAMA5D3_XPLAINED) += sama5d3_xplained/
> diff --git a/arch/arm/boards/sama5d27-giantboard/Makefile b/arch/arm/boards/sama5d27-giantboard/Makefile
> new file mode 100644
> index 000000000000..b08c4a93ca27
> --- /dev/null
> +++ b/arch/arm/boards/sama5d27-giantboard/Makefile
> @@ -0,0 +1 @@
> +lwl-y += lowlevel.o
> diff --git a/arch/arm/boards/sama5d27-giantboard/lowlevel.c b/arch/arm/boards/sama5d27-giantboard/lowlevel.c
> new file mode 100644
> index 000000000000..cd762bd9f053
> --- /dev/null
> +++ b/arch/arm/boards/sama5d27-giantboard/lowlevel.c
> @@ -0,0 +1,56 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) 2019 Ahmad Fatoum, Pengutronix
> + */
> +
> +#include <common.h>
> +#include <init.h>
> +
> +#include <asm/barebox-arm-head.h>
> +#include <asm/barebox-arm.h>
> +#include <mach/at91_pmc_ll.h>
> +
> +#include <mach/hardware.h>
> +#include <mach/iomux.h>
> +#include <debug_ll.h>
> +#include <mach/at91_dbgu.h>
> +
> +/* PCK = 492MHz, MCK = 164MHz */
> +#define MASTER_CLOCK 164000000
> +
> +#define sama5d2_pmc_enable_periph_clock(clk) \
> + at91_pmc_sam9x5_enable_periph_clock(IOMEM(SAMA5D2_BASE_PMC), clk)
I see no point in this macro. It is not that this can change or will be
reused by others.
> +
> +static __always_inline void dbgu_init(void)
> +{
> + unsigned mck = MASTER_CLOCK / 2;
> +
> + sama5d2_pmc_enable_periph_clock(SAMA5D2_ID_PIOD);
> +
> + at91_mux_pio4_set_A_periph(IOMEM(SAMA5D2_BASE_PIOD),
> + pin_to_mask(AT91_PIN_PD3)); /* DBGU TXD */
> +
> + sama5d2_pmc_enable_periph_clock(SAMA5D2_ID_UART1);
> +
> + at91_dbgu_setup_ll(IOMEM(SAMA5D2_BASE_UART1), mck, 115200);
> +
> + putc_ll('>');
> +}
> +
> +extern char __dtb_z_at91_sama5d27_giantboard_start[];
> +
> +ENTRY_FUNCTION(start_sama5d27_giantboard, r0, r1, r2)
> +{
> + void *fdt;
> +
> + arm_cpu_lowlevel_init();
> +
> + arm_setup_stack(SAMA5D2_SRAM_BASE + SAMA5D2_SRAM_SIZE - 16);
This " - 16" is it cargo cult copied from somewhere else?
Or does it really matter?
> +
> + if (IS_ENABLED(CONFIG_DEBUG_LL))
> + dbgu_init();
> +
> + fdt = __dtb_z_at91_sama5d27_giantboard_start + get_runtime_offset();
> +
> + barebox_arm_entry(SAMA5_DDRCS, SZ_128M, fdt);
> +}
The rest looked fine to me.
Sam
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] ARM: at91: add support for SAM9 SoC reset
2020-03-05 20:29 ` [PATCH 1/2] ARM: at91: add support for SAM9 SoC reset Sam Ravnborg
@ 2020-03-06 6:00 ` Ahmad Fatoum
0 siblings, 0 replies; 7+ messages in thread
From: Ahmad Fatoum @ 2020-03-06 6:00 UTC (permalink / raw)
To: Sam Ravnborg; +Cc: barebox
Hello Sam,
On 3/5/20 9:29 PM, Sam Ravnborg wrote:
>> + priv->restart.name = "at91sam9x_rst";
> Or the driver name:
> at91sam9x-rst?
Sounds good. Will change in v2.
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] ARM: at91: add sama5d27-based Groboards Giant Board support
2020-03-05 20:37 ` Sam Ravnborg
@ 2020-03-06 6:06 ` Ahmad Fatoum
2020-03-08 21:38 ` Sam Ravnborg
0 siblings, 1 reply; 7+ messages in thread
From: Ahmad Fatoum @ 2020-03-06 6:06 UTC (permalink / raw)
To: Sam Ravnborg; +Cc: barebox
Hi Sam,
On 3/5/20 9:37 PM, Sam Ravnborg wrote:
>> +#define sama5d2_pmc_enable_periph_clock(clk) \
>> + at91_pmc_sam9x5_enable_periph_clock(IOMEM(SAMA5D2_BASE_PMC), clk)
> I see no point in this macro. It is not that this can change or will be
> reused by others.
It makes the code less verbose IMO.
>> + arm_setup_stack(SAMA5D2_SRAM_BASE + SAMA5D2_SRAM_SIZE - 16);
> This " - 16" is it cargo cult copied from somewhere else?
> Or does it really matter?
It's cargo cult. Will remove it. I wrote the patch few months ago, Sascha
has since removed other instances of this cargo cult.
> The rest looked fine to me.
Thanks for taking the time to look though :-)
Cheers,
Ahmad
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] ARM: at91: add sama5d27-based Groboards Giant Board support
2020-03-06 6:06 ` Ahmad Fatoum
@ 2020-03-08 21:38 ` Sam Ravnborg
0 siblings, 0 replies; 7+ messages in thread
From: Sam Ravnborg @ 2020-03-08 21:38 UTC (permalink / raw)
To: Ahmad Fatoum; +Cc: barebox
Hi Ahmad.
On Fri, Mar 06, 2020 at 07:06:26AM +0100, Ahmad Fatoum wrote:
> Hi Sam,
>
> On 3/5/20 9:37 PM, Sam Ravnborg wrote:
> >> +#define sama5d2_pmc_enable_periph_clock(clk) \
> >> + at91_pmc_sam9x5_enable_periph_clock(IOMEM(SAMA5D2_BASE_PMC), clk)
> > I see no point in this macro. It is not that this can change or will be
> > reused by others.
>
> It makes the code less verbose IMO.
Had this been a static inline function I would not have commented on
this.
But a define is not the way to do this, a define is something you revert
to if there is no better wyas to do it.
Or so I am teached at least.
Anyway - this is becoming pure bikeshed.
So if I did not do so then with the cargo cult stuff fixed:
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Sam
>
> >> + arm_setup_stack(SAMA5D2_SRAM_BASE + SAMA5D2_SRAM_SIZE - 16);
> > This " - 16" is it cargo cult copied from somewhere else?
> > Or does it really matter?
>
> It's cargo cult. Will remove it. I wrote the patch few months ago, Sascha
> has since removed other instances of this cargo cult.
>
> > The rest looked fine to me.
>
> Thanks for taking the time to look though :-)
>
> Cheers,
> Ahmad
>
> --
> Pengutronix e.K. | |
> Steuerwalder Str. 21 | http://www.pengutronix.de/ |
> 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
> Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2020-03-08 21:38 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
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2020-03-05 8:02 [PATCH 1/2] ARM: at91: add support for SAM9 SoC reset Ahmad Fatoum
2020-03-05 8:02 ` [PATCH 2/2] ARM: at91: add sama5d27-based Groboards Giant Board support Ahmad Fatoum
2020-03-05 20:37 ` Sam Ravnborg
2020-03-06 6:06 ` Ahmad Fatoum
2020-03-08 21:38 ` Sam Ravnborg
2020-03-05 20:29 ` [PATCH 1/2] ARM: at91: add support for SAM9 SoC reset Sam Ravnborg
2020-03-06 6:00 ` Ahmad Fatoum
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