[PATCH 1/8] ARM: stm32mp: init: don't cast signed error to unsigned

[PATCH 1/8] ARM: stm32mp: init: don't cast signed error to unsigned

[Ahmad Fatoum]

bsec_read_field returns a negative value on error, pass it along
signed. This doesn't matter now, because we ignore the error code, but
it's the correct thing to do.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
---
 arch/arm/mach-stm32mp/init.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-stm32mp/init.c b/arch/arm/mach-stm32mp/init.c
index 7bad989a609b..6280d94da69f 100644
--- a/arch/arm/mach-stm32mp/init.c
+++ b/arch/arm/mach-stm32mp/init.c
@@ -155,7 +155,7 @@ static inline u32 read_idc(void)
 }
 
 /* Get Device Part Number (RPN) from OTP */
-static u32 get_cpu_rpn(u32 *rpn)
+static int get_cpu_rpn(u32 *rpn)
 {
 	int ret = bsec_read_field(BSEC_OTP_RPN, rpn);
 	if (ret)
@@ -170,7 +170,7 @@ static u32 get_cpu_revision(void)
 	return (read_idc() & DBGMCU_IDC_REV_ID_MASK) >> DBGMCU_IDC_REV_ID_SHIFT;
 }
 
-static u32 get_cpu_type(u32 *type)
+static int get_cpu_type(u32 *type)
 {
 	u32 id;
 	int ret = get_cpu_rpn(type);
-- 
2.20.1


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[PATCH 2/8] ARM: stm32mp: init: detect Revision Z and 800 MHz profiles

[Ahmad Fatoum]

Revision A was 0x1000 and B was 0x2000, so I assumed the next would
be revision C valued 0x3000. Alas, it's revision Z with 0x2001...

Change the code accordingly and add detection for the new 800Mhz
profiles.

Code taken from U-Boot commit
cf0818b477 ("stm32mp1: support of STM32MP15x Rev.Z") and
Patch[1] "stm32mp1: add 800 MHz profile support".

[1]: https://st-md-mailman.stormreply.com/pipermail/uboot-stm32/2020-February/002170.html

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
---
 arch/arm/mach-stm32mp/include/mach/revision.h | 18 +++++++-
 arch/arm/mach-stm32mp/init.c                  | 41 ++++++++++++++++---
 2 files changed, 53 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-stm32mp/include/mach/revision.h b/arch/arm/mach-stm32mp/include/mach/revision.h
index 387201421de7..2eb4d44b3368 100644
--- a/arch/arm/mach-stm32mp/include/mach/revision.h
+++ b/arch/arm/mach-stm32mp/include/mach/revision.h
@@ -6,17 +6,33 @@
 #ifndef __MACH_CPUTYPE_H__
 #define __MACH_CPUTYPE_H__
 
-/* ID = Device Version (bit31:16) + Device Part Number (RPN) (bit15:0)*/
+
+/* ID = Device Version (bit31:16) + Device Part Number (RPN) (bit7:0)
+ * 157X: 2x Cortex-A7, Cortex-M4, CAN FD, GPU, DSI
+ * 153X: 2x Cortex-A7, Cortex-M4, CAN FD
+ * 151X: 1x Cortex-A7, Cortex-M4
+ * XXXA: Cortex-A7 @ 650 MHz
+ * XXXC: Cortex-A7 @ 650 MHz + Secure Boot + HW Crypto
+ * XXXD: Cortex-A7 @ 800 MHz
+ * XXXF: Cortex-A7 @ 800 MHz + Secure Boot + HW Crypto
+ */
 #define CPU_STM32MP157Cxx	0x05000000
 #define CPU_STM32MP157Axx	0x05000001
 #define CPU_STM32MP153Cxx	0x05000024
 #define CPU_STM32MP153Axx	0x05000025
 #define CPU_STM32MP151Cxx	0x0500002E
 #define CPU_STM32MP151Axx	0x0500002F
+#define CPU_STM32MP157Fxx	0x05000080
+#define CPU_STM32MP157Dxx	0x05000081
+#define CPU_STM32MP153Fxx	0x050000A4
+#define CPU_STM32MP153Dxx	0x050000A5
+#define CPU_STM32MP151Fxx	0x050000AE
+#define CPU_STM32MP151Dxx	0x050000AF
 
 /* silicon revisions */
 #define CPU_REV_A	0x1000
 #define CPU_REV_B	0x2000
+#define CPU_REV_Z	0x2001
 
 int stm32mp_silicon_revision(void);
 int stm32mp_cputype(void);
diff --git a/arch/arm/mach-stm32mp/init.c b/arch/arm/mach-stm32mp/init.c
index 6280d94da69f..8a50657664b1 100644
--- a/arch/arm/mach-stm32mp/init.c
+++ b/arch/arm/mach-stm32mp/init.c
@@ -194,17 +194,29 @@ static int get_cpu_package(u32 *pkg)
 
 static int setup_cpu_type(void)
 {
-	const char *cputypestr;
-	const char *cpupkgstr;
+	const char *cputypestr, *cpupkgstr, *cpurevstr;
+	u32 pkg;
 
 	get_cpu_type(&__stm32mp_cputype);
 	switch (__stm32mp_cputype) {
+	case CPU_STM32MP157Fxx:
+		cputypestr = "157F";
+		break;
+	case CPU_STM32MP157Dxx:
+		cputypestr = "157D";
+		break;
 	case CPU_STM32MP157Cxx:
 		cputypestr = "157C";
 		break;
 	case CPU_STM32MP157Axx:
 		cputypestr = "157A";
 		break;
+	case CPU_STM32MP153Fxx:
+		cputypestr = "153F";
+		break;
+	case CPU_STM32MP153Dxx:
+		cputypestr = "153D";
+		break;
 	case CPU_STM32MP153Cxx:
 		cputypestr = "153C";
 		break;
@@ -217,6 +229,12 @@ static int setup_cpu_type(void)
 	case CPU_STM32MP151Axx:
 		cputypestr = "151A";
 		break;
+	case CPU_STM32MP151Fxx:
+		cputypestr = "151F";
+		break;
+	case CPU_STM32MP151Dxx:
+		cputypestr = "151D";
+		break;
 	default:
 		cputypestr = "????";
 		break;
@@ -242,11 +260,24 @@ static int setup_cpu_type(void)
 	}
 
 	__stm32mp_silicon_revision = get_cpu_revision();
+	switch (__stm32mp_silicon_revision) {
+	case CPU_REV_A:
+		cpurevstr = "A";
+		break;
+	case CPU_REV_B:
+		cpurevstr = "B";
+		break;
+	case CPU_REV_Z:
+		cpurevstr = "Z";
+		break;
+	default:
+		cpurevstr = "?";
+	}
 
 	pr_debug("cputype = 0x%x, package = 0x%x, revision = 0x%x\n",
-		 __stm32mp_cputype, __stm32mp_package, __stm32mp_silicon_revision);
-	pr_info("detected STM32MP%s%s Rev.%c\n", cputypestr, cpupkgstr,
-		(__stm32mp_silicon_revision >> 12) + 'A' - 1);
+		 __stm32mp_cputype, pkg, __stm32mp_silicon_revision);
+	pr_info("detected STM32MP%s%s Rev.%s\n", cputypestr, cpupkgstr, cpurevstr);
+
 	return 0;
 }
 
-- 
2.20.1


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[PATCH 3/8] ARM: stm32mp: init: fix up CPU device tree nodes

[Ahmad Fatoum]

To facilitate using the same barebox binary for multiple variants of the
STM32MP15x, have it fix up the CPU device tree nodes.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
---
 arch/arm/mach-stm32mp/init.c | 45 ++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/arch/arm/mach-stm32mp/init.c b/arch/arm/mach-stm32mp/init.c
index 8a50657664b1..d687e44af1ff 100644
--- a/arch/arm/mach-stm32mp/init.c
+++ b/arch/arm/mach-stm32mp/init.c
@@ -75,6 +75,9 @@
 #define TAMP_BOOT_FORCED_MASK           GENMASK(7, 0)
 #define TAMP_BOOT_DEBUG_ON              BIT(16)
 
+#define FIXUP_CPU_MASK(num, mhz) (((num) << 16) | (mhz))
+#define FIXUP_CPU_NUM(mask) ((mask) >> 16)
+#define FIXUP_CPU_HZ(mask) (((mask) & GENMASK(15, 0)) * 1000UL * 1000UL)
 
 static enum stm32mp_forced_boot_mode __stm32mp_forced_boot_mode;
 enum stm32mp_forced_boot_mode st32mp_get_forced_boot_mode(void)
@@ -192,48 +195,87 @@ static int get_cpu_package(u32 *pkg)
 	return 0;
 }
 
+static int stm32mp15_fixup_cpus(struct device_node *root, void *_ctx)
+{
+	unsigned long ctx = (unsigned long)_ctx;
+	struct device_node *cpus_node, *np, *tmp;
+
+	cpus_node = of_find_node_by_name(root, "cpus");
+	if (!cpus_node)
+		return 0;
+
+	for_each_child_of_node_safe(cpus_node, tmp, np) {
+		u32 cpu_index;
+
+		if (of_property_read_u32(np, "reg", &cpu_index))
+			continue;
+
+		if (cpu_index >= FIXUP_CPU_NUM(ctx)) {
+			of_delete_node(np);
+			continue;
+		}
+
+		of_property_write_u32(np, "clock-frequency", FIXUP_CPU_HZ(ctx));
+	}
+
+	return 0;
+}
+
 static int setup_cpu_type(void)
 {
 	const char *cputypestr, *cpupkgstr, *cpurevstr;
+	unsigned long fixupctx = 0;
 	u32 pkg;
 
 	get_cpu_type(&__stm32mp_cputype);
 	switch (__stm32mp_cputype) {
 	case CPU_STM32MP157Fxx:
 		cputypestr = "157F";
+		fixupctx = FIXUP_CPU_MASK(2, 800);
 		break;
 	case CPU_STM32MP157Dxx:
 		cputypestr = "157D";
+		fixupctx = FIXUP_CPU_MASK(2, 800);
 		break;
 	case CPU_STM32MP157Cxx:
 		cputypestr = "157C";
+		fixupctx = FIXUP_CPU_MASK(2, 650);
 		break;
 	case CPU_STM32MP157Axx:
 		cputypestr = "157A";
+		fixupctx = FIXUP_CPU_MASK(2, 650);
 		break;
 	case CPU_STM32MP153Fxx:
 		cputypestr = "153F";
+		fixupctx = FIXUP_CPU_MASK(2, 800);
 		break;
 	case CPU_STM32MP153Dxx:
 		cputypestr = "153D";
+		fixupctx = FIXUP_CPU_MASK(2, 800);
 		break;
 	case CPU_STM32MP153Cxx:
 		cputypestr = "153C";
+		fixupctx = FIXUP_CPU_MASK(2, 650);
 		break;
 	case CPU_STM32MP153Axx:
 		cputypestr = "153A";
+		fixupctx = FIXUP_CPU_MASK(2, 650);
 		break;
 	case CPU_STM32MP151Cxx:
 		cputypestr = "151C";
+		fixupctx = FIXUP_CPU_MASK(1, 650);
 		break;
 	case CPU_STM32MP151Axx:
 		cputypestr = "151A";
+		fixupctx = FIXUP_CPU_MASK(1, 650);
 		break;
 	case CPU_STM32MP151Fxx:
 		cputypestr = "151F";
+		fixupctx = FIXUP_CPU_MASK(1, 800);
 		break;
 	case CPU_STM32MP151Dxx:
 		cputypestr = "151D";
+		fixupctx = FIXUP_CPU_MASK(1, 800);
 		break;
 	default:
 		cputypestr = "????";
@@ -278,6 +320,9 @@ static int setup_cpu_type(void)
 		 __stm32mp_cputype, pkg, __stm32mp_silicon_revision);
 	pr_info("detected STM32MP%s%s Rev.%s\n", cputypestr, cpupkgstr, cpurevstr);
 
+	if (fixupctx)
+		return of_register_fixup(stm32mp15_fixup_cpus, (void*)fixupctx);
+
 	return 0;
 }
 
-- 
2.20.1


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[PATCH 4/8] nvmem: bsec: allow reads at unaligned offsets

[Ahmad Fatoum]

Setting the NVMEM stride to 4 means we can't have nvmem cells pointing
at odd addresses. Linux sets it to 1 instead and handles reads at
unaligned addresses by splitting them up to aligned chunks. Copy over
the code to do the same. Unaligned writes remain illegal.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
---
 drivers/nvmem/bsec.c | 42 ++++++++++++++++++++++++++++++++++++++----
 1 file changed, 38 insertions(+), 4 deletions(-)

diff --git a/drivers/nvmem/bsec.c b/drivers/nvmem/bsec.c
index d772d0b7af92..209c50dc7010 100644
--- a/drivers/nvmem/bsec.c
+++ b/drivers/nvmem/bsec.c
@@ -77,15 +77,49 @@ static int stm32_bsec_write(struct device_d *dev, int offset,
 {
 	struct bsec_priv *priv = dev->parent->priv;
 
+	/* Allow only writing complete 32-bits aligned words */
+	if ((bytes % 4) || (offset % 4))
+		return -EINVAL;
+
 	return regmap_bulk_write(priv->map, offset, val, bytes);
 }
 
 static int stm32_bsec_read(struct device_d *dev, int offset,
-			   void *val, int bytes)
+			   void *buf, int bytes)
 {
 	struct bsec_priv *priv = dev->parent->priv;
+	u32 roffset, rbytes, val;
+	u8 *buf8 = buf, *val8 = (u8 *)&val;
+	int i, j = 0, ret, skip_bytes, size;
+
+	/* Round unaligned access to 32-bits */
+	roffset = rounddown(offset, 4);
+	skip_bytes = offset & 0x3;
+	rbytes = roundup(bytes + skip_bytes, 4);
+
+	if (roffset + rbytes > priv->config.size)
+		return -EINVAL;
+
+	for (i = roffset; i < roffset + rbytes; i += 4) {
+		ret = regmap_bulk_read(priv->map, i, &val, 4);
+		if (ret) {
+			dev_err(dev, "Can't read data%d (%d)\n", i, ret);
+			return ret;
+		}
+
+		/* skip first bytes in case of unaligned read */
+		if (skip_bytes)
+			size = min(bytes, 4 - skip_bytes);
+		else
+			size = min(bytes, 4);
+
+		memcpy(&buf8[j], &val8[skip_bytes], size);
+		bytes -= size;
+		j += size;
+		skip_bytes = 0;
+	}
 
-	return regmap_bulk_read(priv->map, offset, val, bytes);
+	return 0;
 }
 
 static const struct nvmem_bus stm32_bsec_nvmem_bus = {
@@ -185,8 +219,8 @@ static int stm32_bsec_probe(struct device_d *dev)
 
 	priv->config.name = "stm32-bsec";
 	priv->config.dev = dev;
-	priv->config.stride = 4;
-	priv->config.word_size = 4;
+	priv->config.stride = 1;
+	priv->config.word_size = 1;
 	priv->config.size = data->num_regs;
 	priv->config.bus = &stm32_bsec_nvmem_bus;
 	dev->priv = priv;
-- 
2.20.1


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[PATCH 5/8] nvmem: bsec: remove wrongly named bsec_field type

[Ahmad Fatoum]

BSEC_SMC_READ_SHADOW and BSEC_SMC_WRITE_SHADOW aren't fields, but
operations to apply on fields. Rename it accordingly and fix up instances
where it was used wrongly.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
---
 arch/arm/mach-stm32mp/include/mach/bsec.h | 6 +++---
 drivers/nvmem/bsec.c                      | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-stm32mp/include/mach/bsec.h b/arch/arm/mach-stm32mp/include/mach/bsec.h
index 559faaa2bac3..d3cb91b1fdb1 100644
--- a/arch/arm/mach-stm32mp/include/mach/bsec.h
+++ b/arch/arm/mach-stm32mp/include/mach/bsec.h
@@ -17,7 +17,7 @@ enum bsec_smc {
 };
 
 /* Service for BSEC */
-enum bsec_field {
+enum bsec_op {
 	BSEC_SMC_READ_SHADOW	= 1,
 	BSEC_SMC_PROG_OTP	= 2,
 	BSEC_SMC_WRITE_SHADOW	= 3,
@@ -26,13 +26,13 @@ enum bsec_field {
 	BSEC_SMC_WRITE_ALL	= 6,
 };
 
-static inline enum bsec_smc bsec_read_field(enum bsec_field field, unsigned *val)
+static inline enum bsec_smc bsec_read_field(unsigned field, unsigned *val)
 {
 	return stm32mp_smc(STM32_SMC_BSEC, BSEC_SMC_READ_SHADOW,
 			   field, 0, val);
 }
 
-static inline enum bsec_smc bsec_write_field(enum bsec_field field, unsigned val)
+static inline enum bsec_smc bsec_write_field(unsigned field, unsigned val)
 {
 	return stm32mp_smc(STM32_SMC_BSEC, BSEC_SMC_WRITE_SHADOW,
 			   field, val, NULL);
diff --git a/drivers/nvmem/bsec.c b/drivers/nvmem/bsec.c
index 209c50dc7010..836e62ecbcc7 100644
--- a/drivers/nvmem/bsec.c
+++ b/drivers/nvmem/bsec.c
@@ -33,7 +33,7 @@ struct stm32_bsec_data {
 	int num_regs;
 };
 
-static int bsec_smc(struct bsec_priv *priv, u8 op, enum bsec_field field,
+static int bsec_smc(struct bsec_priv *priv, enum bsec_op op, u32 field,
 		    unsigned data2, unsigned *val)
 {
 	enum bsec_smc ret = stm32mp_smc(priv->svc_id, op, field / 4, data2, val);
-- 
2.20.1


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[PATCH 6/8] pinctrl: stm32: fix up st,package into stm32mp nodes

[Ahmad Fatoum]

Since Linux v5.1, the pinctrl driver can use the st,package property
if provided to validate whether the ball to be configured exists
on the package. Have barebox supply this property.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
---
 arch/arm/dts/stm32mp151.dtsi    | 16 ++++++++
 drivers/pinctrl/pinctrl-stm32.c | 67 +++++++++++++++++++++++++++++++++
 2 files changed, 83 insertions(+)

diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi
index 8f8249dbc479..2a70a747e76e 100644
--- a/arch/arm/dts/stm32mp151.dtsi
+++ b/arch/arm/dts/stm32mp151.dtsi
@@ -37,4 +37,20 @@
 
 &bsec {
 	barebox,provide-mac-address = <&ethernet0 0x39>;
+
+	soc_package: soc-package@43 {
+		reg = <0x43 1>;
+		bits = <3 3>;
+		read-only;
+	};
+};
+
+&pinctrl {
+	nvmem-cells = <&soc_package>;
+	nvmem-cell-names = "soc-package";
+};
+
+&pinctrl_z {
+	nvmem-cells = <&soc_package>;
+	nvmem-cell-names = "soc-package";
 };
diff --git a/drivers/pinctrl/pinctrl-stm32.c b/drivers/pinctrl/pinctrl-stm32.c
index cdaed510c564..e760ce875774 100644
--- a/drivers/pinctrl/pinctrl-stm32.c
+++ b/drivers/pinctrl/pinctrl-stm32.c
@@ -16,11 +16,25 @@
 #include <malloc.h>
 #include <linux/clk.h>
 #include <soc/stm32/gpio.h>
+#include <dt-bindings/pinctrl/stm32-pinfunc.h>
+#include <linux/nvmem-consumer.h>
 
 #define STM32_PIN_NO(x) ((x) << 8)
 #define STM32_GET_PIN_NO(x) ((x) >> 8)
 #define STM32_GET_PIN_FUNC(x) ((x) & 0xff)
 
+/*
+ * - 100: LBGA448  (FFI) => AA = LFBGA 18x18mm 448 balls p. 0.8mm
+ * - 011: LBGA354  (LCI) => AB = LFBGA 16x16mm 359 balls p. 0.8mm
+ * - 010: TFBGA361 (FFC) => AC = TFBGA 12x12mm 361 balls p. 0.5mm
+ * - 001: TFBGA257 (LCC) => AD = TFBGA 10x10mm 257 balls p. 0.5mm
+ * - others: Reserved
+ */
+#define PKG_AA_LBGA448	4
+#define PKG_AB_LBGA354	3
+#define PKG_AC_TFBGA361	2
+#define PKG_AD_TFBGA257	1
+
 struct stm32_gpio_bank {
 	void __iomem *base;
 	struct gpio_chip chip;
@@ -369,6 +383,57 @@ static int stm32_gpiochip_add(struct stm32_gpio_bank *bank,
 	return gpiochip_add(&bank->chip);
 }
 
+static int fixup_pinctrl(struct device_node *root, const char *compat, u32 pkg)
+{
+	struct device_node *np = of_find_compatible_node(root, NULL, compat);
+	if (!np)
+		return -ENODEV;
+
+	return of_property_write_u32(np, "st,package", pkg);
+}
+
+static u8 stm32_package_xlate(u8 pkg)
+{
+	switch (pkg) {
+	case PKG_AA_LBGA448:
+		return STM32MP_PKG_AA;
+	case PKG_AB_LBGA354:
+		return STM32MP_PKG_AB;
+	case PKG_AC_TFBGA361:
+		return STM32MP_PKG_AC;
+	case PKG_AD_TFBGA257:
+		return STM32MP_PKG_AD;
+	default:
+		return 0;
+	}
+}
+
+static int stm32_fixup_package(struct device_node *root, void *_dev)
+{
+	struct device_d *dev = _dev;
+	u8 *cell, pkg, pkg_raw;
+	int ret;
+
+	cell = nvmem_cell_get_and_read(dev->device_node, "soc-package", 1);
+	if (IS_ERR(cell))
+		return 0;
+
+	pkg_raw = *cell;
+	free(cell);
+
+	pkg = stm32_package_xlate(pkg_raw);
+	if (!pkg) {
+		dev_dbg(dev, "Unknown package: %01x\n", pkg_raw);
+		return 0;
+	}
+
+	ret = fixup_pinctrl(root, "st,stm32mp157-pinctrl", pkg);
+	if (ret)
+		return ret;
+
+	return fixup_pinctrl(root, "st,stm32mp157-z-pinctrl", pkg);
+}
+
 static struct pinctrl_ops stm32_pinctrl_ops = {
 	.set_state = stm32_pinctrl_set_state,
 };
@@ -419,6 +484,8 @@ static int stm32_pinctrl_probe(struct device_d *dev)
 		}
 	}
 
+	of_register_fixup(stm32_fixup_package, dev);
+
 	dev_dbg(dev, "pinctrl/gpio driver registered\n");
 
 	return 0;
-- 
2.20.1


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[PATCH 7/8] ARM: stm32mp: init: don't query package type

[Ahmad Fatoum]

Now that we have a nvmem cell describing the package, we don't need to
provide a stm32mp_package() function for querying it. Displaying the
package type on every boot is also not that useful, especially when some
SoCs don't even have the bsec field populated.

As the code has now become duplicate (it's used in the stm32-pinctrl
driver), remove it.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
---
 arch/arm/mach-stm32mp/include/mach/revision.h |  1 -
 arch/arm/mach-stm32mp/init.c                  | 60 ++-----------------
 2 files changed, 4 insertions(+), 57 deletions(-)

diff --git a/arch/arm/mach-stm32mp/include/mach/revision.h b/arch/arm/mach-stm32mp/include/mach/revision.h
index 2eb4d44b3368..d930bfe836a7 100644
--- a/arch/arm/mach-stm32mp/include/mach/revision.h
+++ b/arch/arm/mach-stm32mp/include/mach/revision.h
@@ -36,7 +36,6 @@
 
 int stm32mp_silicon_revision(void);
 int stm32mp_cputype(void);
-int stm32mp_package(void);
 
 #define cpu_is_stm32mp157c() (stm32mp_cputype() == CPU_STM32MP157Cxx)
 #define cpu_is_stm32mp157a() (stm32mp_cputype() == CPU_STM32MP157Axx)
diff --git a/arch/arm/mach-stm32mp/init.c b/arch/arm/mach-stm32mp/init.c
index d687e44af1ff..3e22490190ec 100644
--- a/arch/arm/mach-stm32mp/init.c
+++ b/arch/arm/mach-stm32mp/init.c
@@ -28,27 +28,11 @@
 
 /* BSEC OTP index */
 #define BSEC_OTP_RPN	1
-#define BSEC_OTP_PKG	16
 
 /* Device Part Number (RPN) = OTP_DATA1 lower 8 bits */
 #define RPN_SHIFT	0
 #define RPN_MASK	GENMASK(7, 0)
 
-/* Package = bit 27:29 of OTP16
- * - 100: LBGA448  (FFI) => AA = LFBGA 18x18mm 448 balls p. 0.8mm
- * - 011: LBGA354  (LCI) => AB = LFBGA 16x16mm 359 balls p. 0.8mm
- * - 010: TFBGA361 (FFC) => AC = TFBGA 12x12mm 361 balls p. 0.5mm
- * - 001: TFBGA257 (LCC) => AD = TFBGA 10x10mm 257 balls p. 0.5mm
- * - others: Reserved
- */
-#define PKG_SHIFT	27
-#define PKG_MASK	GENMASK(2, 0)
-
-#define PKG_AA_LBGA448	4
-#define PKG_AB_LBGA354	3
-#define PKG_AC_TFBGA361	2
-#define PKG_AD_TFBGA257	1
-
 /*
  * enumerated for boot interface from Bootrom, used in TAMP_BOOT_CONTEXT
  * - boot device = bit 8:4
@@ -145,12 +129,6 @@ int stm32mp_silicon_revision(void)
 	return __stm32mp_silicon_revision;
 }
 
-static int __stm32mp_package;
-int stm32mp_package(void)
-{
-	return __stm32mp_package;
-}
-
 static inline u32 read_idc(void)
 {
 	setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
@@ -185,16 +163,6 @@ static int get_cpu_type(u32 *type)
 	return 0;
 }
 
-static int get_cpu_package(u32 *pkg)
-{
-	int ret = bsec_read_field(BSEC_OTP_PKG, pkg);
-	if (ret)
-		return ret;
-
-	*pkg = (*pkg >> PKG_SHIFT) & PKG_MASK;
-	return 0;
-}
-
 static int stm32mp15_fixup_cpus(struct device_node *root, void *_ctx)
 {
 	unsigned long ctx = (unsigned long)_ctx;
@@ -223,9 +191,8 @@ static int stm32mp15_fixup_cpus(struct device_node *root, void *_ctx)
 
 static int setup_cpu_type(void)
 {
-	const char *cputypestr, *cpupkgstr, *cpurevstr;
+	const char *cputypestr, *cpurevstr;
 	unsigned long fixupctx = 0;
-	u32 pkg;
 
 	get_cpu_type(&__stm32mp_cputype);
 	switch (__stm32mp_cputype) {
@@ -282,25 +249,6 @@ static int setup_cpu_type(void)
 		break;
 	}
 
-	get_cpu_package(&__stm32mp_package );
-	switch (__stm32mp_package) {
-	case PKG_AA_LBGA448:
-		cpupkgstr = "AA";
-		break;
-	case PKG_AB_LBGA354:
-		cpupkgstr = "AB";
-		break;
-	case PKG_AC_TFBGA361:
-		cpupkgstr = "AC";
-		break;
-	case PKG_AD_TFBGA257:
-		cpupkgstr = "AD";
-		break;
-	default:
-		cpupkgstr = "??";
-		break;
-	}
-
 	__stm32mp_silicon_revision = get_cpu_revision();
 	switch (__stm32mp_silicon_revision) {
 	case CPU_REV_A:
@@ -316,9 +264,9 @@ static int setup_cpu_type(void)
 		cpurevstr = "?";
 	}
 
-	pr_debug("cputype = 0x%x, package = 0x%x, revision = 0x%x\n",
-		 __stm32mp_cputype, pkg, __stm32mp_silicon_revision);
-	pr_info("detected STM32MP%s%s Rev.%s\n", cputypestr, cpupkgstr, cpurevstr);
+	pr_debug("cputype = 0x%x, revision = 0x%x\n",
+		 __stm32mp_cputype, __stm32mp_silicon_revision);
+	pr_info("detected STM32MP%s Rev.%s\n", cputypestr, cpurevstr);
 
 	if (fixupctx)
 		return of_register_fixup(stm32mp15_fixup_cpus, (void*)fixupctx);
-- 
2.20.1


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[PATCH 8/8] ARM: stm32mp: add support for STM32MP157-EV1 board

[Ahmad Fatoum]

The STM32MP157A-EV1 and STM32MP157C-EV1 Evaluation boards are the
full-feature demonstration and development platforms for the STM32MP1.

The C suffix indicates that crypto and secure boot are supported.
They can be handled the same for now. Later on, when the crypto cores
get device tree nodes, we'll want barebox to patch them out.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
---
 arch/arm/boards/Makefile                  |  1 +
 arch/arm/boards/stm32mp157-ev1/Makefile   |  2 ++
 arch/arm/boards/stm32mp157-ev1/board.c    | 30 +++++++++++++++++++++++
 arch/arm/boards/stm32mp157-ev1/lowlevel.c | 26 ++++++++++++++++++++
 arch/arm/dts/Makefile                     |  1 +
 arch/arm/dts/stm32mp157c-ev1.dts          | 18 ++++++++++++++
 arch/arm/mach-stm32mp/Kconfig             |  4 +++
 images/Makefile.stm32mp                   |  5 ++++
 8 files changed, 87 insertions(+)
 create mode 100644 arch/arm/boards/stm32mp157-ev1/Makefile
 create mode 100644 arch/arm/boards/stm32mp157-ev1/board.c
 create mode 100644 arch/arm/boards/stm32mp157-ev1/lowlevel.c
 create mode 100644 arch/arm/dts/stm32mp157c-ev1.dts

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 9fe458e0a390..d558c4cf8607 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -129,6 +129,7 @@ obj-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT)	+= terasic-sockit/
 obj-$(CONFIG_MACH_SOLIDRUN_CUBOX)		+= solidrun-cubox/
 obj-$(CONFIG_MACH_SOLIDRUN_MICROSOM)		+= solidrun-microsom/
 obj-$(CONFIG_MACH_STM32MP157C_DK2)		+= stm32mp157c-dk2/
+obj-$(CONFIG_MACH_STM32MP157_EV1)		+= stm32mp157-ev1/
 obj-$(CONFIG_MACH_TECHNEXION_PICO_HOBBIT)	+= technexion-pico-hobbit/
 obj-$(CONFIG_MACH_TECHNEXION_WANDBOARD)		+= technexion-wandboard/
 obj-$(CONFIG_MACH_TNY_A9260)			+= tny-a926x/
diff --git a/arch/arm/boards/stm32mp157-ev1/Makefile b/arch/arm/boards/stm32mp157-ev1/Makefile
new file mode 100644
index 000000000000..092c31d6b28d
--- /dev/null
+++ b/arch/arm/boards/stm32mp157-ev1/Makefile
@@ -0,0 +1,2 @@
+lwl-y += lowlevel.o
+obj-y += board.o
diff --git a/arch/arm/boards/stm32mp157-ev1/board.c b/arch/arm/boards/stm32mp157-ev1/board.c
new file mode 100644
index 000000000000..5ab10568ac78
--- /dev/null
+++ b/arch/arm/boards/stm32mp157-ev1/board.c
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <bootsource.h>
+#include <common.h>
+#include <init.h>
+#include <mach/bbu.h>
+
+static int ev1_device_init(void)
+{
+	int flags;
+
+	if (!of_machine_is_compatible("st,stm32mp157c-ev1"))
+		return 0;
+
+	flags = bootsource_get_instance() == 0 ? BBU_HANDLER_FLAG_DEFAULT : 0;
+	stm32mp_bbu_mmc_register_handler("sd", "/dev/mmc0.ssbl", flags);
+
+	flags = bootsource_get_instance() == 1 ? BBU_HANDLER_FLAG_DEFAULT : 0;
+	stm32mp_bbu_mmc_register_handler("emmc", "/dev/mmc1.ssbl", flags);
+
+	if (bootsource_get_instance() == 0)
+		of_device_enable_path("/chosen/environment-sd");
+	else
+		of_device_enable_path("/chosen/environment-emmc");
+
+	barebox_set_model("STM32MP157-EV1");
+
+	return 0;
+}
+device_initcall(ev1_device_init);
diff --git a/arch/arm/boards/stm32mp157-ev1/lowlevel.c b/arch/arm/boards/stm32mp157-ev1/lowlevel.c
new file mode 100644
index 000000000000..0f62cd438224
--- /dev/null
+++ b/arch/arm/boards/stm32mp157-ev1/lowlevel.c
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0+
+#include <common.h>
+#include <mach/entry.h>
+#include <debug_ll.h>
+
+extern char __dtb_z_stm32mp157c_ev1_start[];
+
+static void setup_uart(void)
+{
+	/* first stage has set up the UART, so nothing to do here */
+	putc_ll('>');
+}
+
+ENTRY_FUNCTION(start_stm32mp157_ev1, r0, r1, r2)
+{
+	void *fdt;
+
+	stm32mp_cpu_lowlevel_init();
+
+	if (IS_ENABLED(CONFIG_DEBUG_LL))
+		setup_uart();
+
+	fdt = __dtb_z_stm32mp157c_ev1_start + get_runtime_offset();
+
+	stm32mp1_barebox_entry(fdt);
+}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ddfe64e83bdf..38ce1d4e0812 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -94,6 +94,7 @@ lwl-dtb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += imx6dl-hummingboard.dtb.o imx6q-humm
 				imx6dl-hummingboard2.dtb.o imx6q-hummingboard2.dtb.o \
 				imx6q-h100.dtb.o
 lwl-dtb-$(CONFIG_MACH_STM32MP157C_DK2) += stm32mp157c-dk2.dtb.o
+lwl-dtb-$(CONFIG_MACH_STM32MP157_EV1) += stm32mp157c-ev1.dtb.o
 lwl-dtb-$(CONFIG_MACH_SCB9328) += imx1-scb9328.dtb.o
 lwl-dtb-$(CONFIG_MACH_TECHNEXION_WANDBOARD) += imx6q-wandboard.dtb.o imx6dl-wandboard.dtb.o
 lwl-dtb-$(CONFIG_MACH_TECHNEXION_PICO_HOBBIT) += imx6ul-pico-hobbit.dtb.o
diff --git a/arch/arm/dts/stm32mp157c-ev1.dts b/arch/arm/dts/stm32mp157c-ev1.dts
new file mode 100644
index 000000000000..6140b7479d27
--- /dev/null
+++ b/arch/arm/dts/stm32mp157c-ev1.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR X11)
+
+#include <arm/stm32mp157c-ev1.dts>
+#include "stm32mp151.dtsi"
+
+/ {
+	chosen {
+		environment-sd {
+			compatible = "barebox,environment";
+			device-path = &sdmmc1, "partname:barebox-environment";
+		};
+
+		environment-emmc {
+			compatible = "barebox,environment";
+			device-path = &sdmmc2, "partname:barebox-environment";
+		};
+	};
+};
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index 9b55a3d21843..7bcbae2849b0 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -12,4 +12,8 @@ config MACH_STM32MP157C_DK2
 	select ARCH_STM32MP157
 	bool "STM32MP157C-DK2 board"
 
+config MACH_STM32MP157_EV1
+	select ARCH_STM32MP157
+	bool "STM32MP157A-EV1 and STM32MP157C-EV1 board"
+
 endif
diff --git a/images/Makefile.stm32mp b/images/Makefile.stm32mp
index 910e029a5b66..be413c260e2d 100644
--- a/images/Makefile.stm32mp
+++ b/images/Makefile.stm32mp
@@ -17,3 +17,8 @@ pblb-$(CONFIG_MACH_STM32MP157C_DK2) += start_stm32mp157c_dk2
 FILE_barebox-stm32mp157c-dk2.img = start_stm32mp157c_dk2.pblb.stm32
 OPTS_start_stm32mp157c_dk2.pblb.stm32 = $(STM32MP1_OPTS)
 image-$(CONFIG_MACH_STM32MP157C_DK2) += barebox-stm32mp157c-dk2.img
+
+pblb-$(CONFIG_MACH_STM32MP157_EV1) += start_stm32mp157_ev1
+FILE_barebox-stm32mp157-ev1.img = start_stm32mp157_ev1.pblb.stm32
+OPTS_start_stm32mp157_ev1.pblb.stm32 = $(STM32MP1_OPTS)
+image-$(CONFIG_MACH_STM32MP157_EV1) += barebox-stm32mp157-ev1.img
-- 
2.20.1


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Re: [PATCH 6/8] pinctrl: stm32: fix up st,package into stm32mp nodes

[Sascha Hauer]

On Mon, Mar 30, 2020 at 04:39:13PM +0200, Ahmad Fatoum wrote:
> Since Linux v5.1, the pinctrl driver can use the st,package property
> if provided to validate whether the ball to be configured exists
> on the package. Have barebox supply this property.
> 
> Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
> ---
>  arch/arm/dts/stm32mp151.dtsi    | 16 ++++++++
>  drivers/pinctrl/pinctrl-stm32.c | 67 +++++++++++++++++++++++++++++++++
>  2 files changed, 83 insertions(+)
> 
> diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi
> index 8f8249dbc479..2a70a747e76e 100644
> --- a/arch/arm/dts/stm32mp151.dtsi
> +++ b/arch/arm/dts/stm32mp151.dtsi
> @@ -37,4 +37,20 @@
>  
>  &bsec {
>  	barebox,provide-mac-address = <&ethernet0 0x39>;
> +
> +	soc_package: soc-package@43 {
> +		reg = <0x43 1>;
> +		bits = <3 3>;
> +		read-only;
> +	};
> +};
> +
> +&pinctrl {
> +	nvmem-cells = <&soc_package>;
> +	nvmem-cell-names = "soc-package";
> +};
> +
> +&pinctrl_z {
> +	nvmem-cells = <&soc_package>;
> +	nvmem-cell-names = "soc-package";
>  };

Why this detour over device tree? We already have get_cpu_package() and
could use it here.

Sascha

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Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
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Re: [PATCH 6/8] pinctrl: stm32: fix up st,package into stm32mp nodes

[Ahmad Fatoum]

Hi,

On 3/31/20 7:45 AM, Sascha Hauer wrote:
> On Mon, Mar 30, 2020 at 04:39:13PM +0200, Ahmad Fatoum wrote:
>> Since Linux v5.1, the pinctrl driver can use the st,package property
>> if provided to validate whether the ball to be configured exists
>> on the package. Have barebox supply this property.
>>
>> Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
>> ---
>>  arch/arm/dts/stm32mp151.dtsi    | 16 ++++++++
>>  drivers/pinctrl/pinctrl-stm32.c | 67 +++++++++++++++++++++++++++++++++
>>  2 files changed, 83 insertions(+)
>>
>> diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi
>> index 8f8249dbc479..2a70a747e76e 100644
>> --- a/arch/arm/dts/stm32mp151.dtsi
>> +++ b/arch/arm/dts/stm32mp151.dtsi
>> @@ -37,4 +37,20 @@
>>  
>>  &bsec {
>>  	barebox,provide-mac-address = <&ethernet0 0x39>;
>> +
>> +	soc_package: soc-package@43 {
>> +		reg = <0x43 1>;
>> +		bits = <3 3>;
>> +		read-only;
>> +	};
>> +};
>> +
>> +&pinctrl {
>> +	nvmem-cells = <&soc_package>;
>> +	nvmem-cell-names = "soc-package";
>> +};
>> +
>> +&pinctrl_z {
>> +	nvmem-cells = <&soc_package>;
>> +	nvmem-cell-names = "soc-package";
>>  };
> 
> Why this detour over device tree? We already have get_cpu_package() and
> could use it here.

The pinctrl driver should also be compatible to the STM32 MCUs, which don't
have this property. I tried calling get_cpu_package at first, but the ifdefery
needed to keep the driver independent on CONFIG_ARCH_STM32MP looked ugly.

Making it a device property solves this nicely IMO.

Cheers
Ahmad

> 
> Sascha
> 

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Re: [PATCH 6/8] pinctrl: stm32: fix up st,package into stm32mp nodes

[Sascha Hauer]

On Tue, Mar 31, 2020 at 07:50:32AM +0200, Ahmad Fatoum wrote:
> Hi,
> 
> On 3/31/20 7:45 AM, Sascha Hauer wrote:
> > On Mon, Mar 30, 2020 at 04:39:13PM +0200, Ahmad Fatoum wrote:
> >> Since Linux v5.1, the pinctrl driver can use the st,package property
> >> if provided to validate whether the ball to be configured exists
> >> on the package. Have barebox supply this property.
> >>
> >> Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
> >> ---
> >>  arch/arm/dts/stm32mp151.dtsi    | 16 ++++++++
> >>  drivers/pinctrl/pinctrl-stm32.c | 67 +++++++++++++++++++++++++++++++++
> >>  2 files changed, 83 insertions(+)
> >>
> >> diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi
> >> index 8f8249dbc479..2a70a747e76e 100644
> >> --- a/arch/arm/dts/stm32mp151.dtsi
> >> +++ b/arch/arm/dts/stm32mp151.dtsi
> >> @@ -37,4 +37,20 @@
> >>  
> >>  &bsec {
> >>  	barebox,provide-mac-address = <&ethernet0 0x39>;
> >> +
> >> +	soc_package: soc-package@43 {
> >> +		reg = <0x43 1>;
> >> +		bits = <3 3>;
> >> +		read-only;
> >> +	};
> >> +};
> >> +
> >> +&pinctrl {
> >> +	nvmem-cells = <&soc_package>;
> >> +	nvmem-cell-names = "soc-package";
> >> +};
> >> +
> >> +&pinctrl_z {
> >> +	nvmem-cells = <&soc_package>;
> >> +	nvmem-cell-names = "soc-package";
> >>  };
> > 
> > Why this detour over device tree? We already have get_cpu_package() and
> > could use it here.
> 
> The pinctrl driver should also be compatible to the STM32 MCUs, which don't
> have this property. I tried calling get_cpu_package at first, but the ifdefery
> needed to keep the driver independent on CONFIG_ARCH_STM32MP looked ugly.

The fixup for the device tree nodes doesn't necessarily have to be in
the pinctrl driver, it could be somewhere where you know get_cpu_package
is present and valid.

> 
> Making it a device property solves this nicely IMO.

I might agree if there wasn't the nvmem binding involved.

Sascha

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Re: [PATCH 6/8] pinctrl: stm32: fix up st,package into stm32mp nodes

[Ahmad Fatoum]

Hi,

On 3/31/20 8:55 AM, Sascha Hauer wrote:
> On Tue, Mar 31, 2020 at 07:50:32AM +0200, Ahmad Fatoum wrote:
>> Hi,
>>
>> On 3/31/20 7:45 AM, Sascha Hauer wrote:
>>> On Mon, Mar 30, 2020 at 04:39:13PM +0200, Ahmad Fatoum wrote:
>>>> Since Linux v5.1, the pinctrl driver can use the st,package property
>>>> if provided to validate whether the ball to be configured exists
>>>> on the package. Have barebox supply this property.
>>>>
>>>> Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
>>>> ---
>>>>  arch/arm/dts/stm32mp151.dtsi    | 16 ++++++++
>>>>  drivers/pinctrl/pinctrl-stm32.c | 67 +++++++++++++++++++++++++++++++++
>>>>  2 files changed, 83 insertions(+)
>>>>
>>>> diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi
>>>> index 8f8249dbc479..2a70a747e76e 100644
>>>> --- a/arch/arm/dts/stm32mp151.dtsi
>>>> +++ b/arch/arm/dts/stm32mp151.dtsi
>>>> @@ -37,4 +37,20 @@
>>>>  
>>>>  &bsec {
>>>>  	barebox,provide-mac-address = <&ethernet0 0x39>;
>>>> +
>>>> +	soc_package: soc-package@43 {
>>>> +		reg = <0x43 1>;
>>>> +		bits = <3 3>;
>>>> +		read-only;
>>>> +	};
>>>> +};
>>>> +
>>>> +&pinctrl {
>>>> +	nvmem-cells = <&soc_package>;
>>>> +	nvmem-cell-names = "soc-package";
>>>> +};
>>>> +
>>>> +&pinctrl_z {
>>>> +	nvmem-cells = <&soc_package>;
>>>> +	nvmem-cell-names = "soc-package";
>>>>  };
>>>
>>> Why this detour over device tree? We already have get_cpu_package() and
>>> could use it here.
>>
>> The pinctrl driver should also be compatible to the STM32 MCUs, which don't
>> have this property. I tried calling get_cpu_package at first, but the ifdefery
>> needed to keep the driver independent on CONFIG_ARCH_STM32MP looked ugly.
> 
> The fixup for the device tree nodes doesn't necessarily have to be in
> the pinctrl driver, it could be somewhere where you know get_cpu_package
> is present and valid.

It's the most natural place though..

>> Making it a device property solves this nicely IMO.
> 
> I might agree if there wasn't the nvmem binding involved.

The bsec driver is a nvmem driver anyway. How else I am supposed to access nvmem
devices?

The current code in arch/arm/mach-stm32mp/init.c issues direct secure monitor calls
to read the bsec OTP. I'd prefer to get rid of this and have everything go
through the bsec driver.

Cheers
Ahmad

> 
> Sascha
> 

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Re: [PATCH 6/8] pinctrl: stm32: fix up st,package into stm32mp nodes

[Ahmad Fatoum]

Hello Sascha,

On 3/31/20 7:45 AM, Sascha Hauer wrote:
> Why this detour over device tree? We already have get_cpu_package() and
> could use it here.

The first 5 patches could be applied independently of the rest, which
I'll rework. Can you do so?

Thanks
Ahmad

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Re: [PATCH 6/8] pinctrl: stm32: fix up st,package into stm32mp nodes

[Ahmad Fatoum]

On 4/15/20 11:38 AM, Ahmad Fatoum wrote:
> Hello Sascha,
> 
> On 3/31/20 7:45 AM, Sascha Hauer wrote:
>> Why this detour over device tree? We already have get_cpu_package() and
>> could use it here.
> 
> The first 5 patches could be applied independently of the rest, which
> I'll rework. Can you do so?

Gentle ping.

> 
> Thanks
> Ahmad
> 

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Re: [PATCH 5/8] nvmem: bsec: remove wrongly named bsec_field type

[Sascha Hauer]

On Mon, Mar 30, 2020 at 04:39:12PM +0200, Ahmad Fatoum wrote:
> BSEC_SMC_READ_SHADOW and BSEC_SMC_WRITE_SHADOW aren't fields, but
> operations to apply on fields. Rename it accordingly and fix up instances
> where it was used wrongly.
> 
> Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
> ---
>  arch/arm/mach-stm32mp/include/mach/bsec.h | 6 +++---
>  drivers/nvmem/bsec.c                      | 2 +-
>  2 files changed, 4 insertions(+), 4 deletions(-)

Applied this series up to this patch.

Sascha


-- 
Pengutronix e.K.                           |                             |
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