* bug report: fail to boot barebox in marvell 6281 board
@ 2020-03-31 16:12 you xiaojie
2020-04-01 6:08 ` Sascha Hauer
0 siblings, 1 reply; 9+ messages in thread
From: you xiaojie @ 2020-03-31 16:12 UTC (permalink / raw)
To: barebox
I ported barebox to a new board similar to guruplug, but it could not boot,
only show a line of barebox 2020.03.0-....., and I try official guruplug also
stopped. the devicetree is ok under linux 5.4 and the kwbimage.cfg is ok I
think, according to the 6281's datasheet and compared with the original
register value of machine.
so any can try guruplug's barebox? this is my porting patch, is there
something wrong?
From f2381a9855ae9db312aed52b1ab4d7343181e3b4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E5=B0=A4=E6=99=93=E6=9D=B0?= <yxj790222@163.com>
Date: Mon, 30 Mar 2020 01:32:31 +0800
Subject: [PATCH] Add support for Huanshuo HS-50A
---
arch/arm/boards/Makefile | 1 +
arch/arm/boards/huanshuo-hs50a/Makefile | 2 +
arch/arm/boards/huanshuo-hs50a/board.c | 17 +
arch/arm/boards/huanshuo-hs50a/kwbimage.cfg | 27 ++
arch/arm/boards/huanshuo-hs50a/lowlevel.c | 35 ++
arch/arm/configs/mvebu_defconfig | 1 +
arch/arm/dts/Makefile | 1 +
arch/arm/dts/kirkwood-huanshuo-hs50a-bb.dts | 16 +
arch/arm/mach-mvebu/Kconfig | 4 +
dts/src/arm/kirkwood-huanshuo-hs50a.dts | 348 ++++++++++++++++++++
images/Makefile.mvebu | 8 +
11 files changed, 460 insertions(+)
create mode 100644 arch/arm/boards/huanshuo-hs50a/Makefile
create mode 100644 arch/arm/boards/huanshuo-hs50a/board.c
create mode 100644 arch/arm/boards/huanshuo-hs50a/kwbimage.cfg
create mode 100644 arch/arm/boards/huanshuo-hs50a/lowlevel.c
create mode 100644 arch/arm/dts/kirkwood-huanshuo-hs50a-bb.dts
create mode 100644 dts/src/arm/kirkwood-huanshuo-hs50a.dts
diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 9fe458e0a..009dbd801 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -61,6 +61,7 @@ obj-$(CONFIG_MACH_GUF_VINCELL)
+= guf-vincell/
obj-$(CONFIG_MACH_GW_VENTANA) += gateworks-ventana/
obj-$(CONFIG_MACH_HABA_KNX_LITE) += haba-knx/
obj-$(CONFIG_MACH_HIGHBANK) += highbank/
+obj-$(CONFIG_MACH_HUANSHUO_HS50A) += huanshuo-hs50a/
obj-$(CONFIG_MACH_IMX21ADS) += freescale-mx21-ads/
obj-$(CONFIG_MACH_IMX233_OLINUXINO) += imx233-olinuxino/
obj-$(CONFIG_MACH_IMX27ADS) += freescale-mx27-ads/
diff --git a/arch/arm/boards/huanshuo-hs50a/Makefile b/arch/arm/boards/huanshuo-
hs50a/Makefile
new file mode 100644
index 000000000..01c7a259e
--- /dev/null
+++ b/arch/arm/boards/huanshuo-hs50a/Makefile
@@ -0,0 +1,2 @@
+obj-y += board.o
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/huanshuo-hs50a/board.c b/arch/arm/boards/huanshuo-
hs50a/board.c
new file mode 100644
index 000000000..9c800c541
--- /dev/null
+++ b/arch/arm/boards/huanshuo-hs50a/board.c
@@ -0,0 +1,17 @@
+/*
+ * Copyright
+ * (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+/* empty */
diff --git a/arch/arm/boards/huanshuo-hs50a/kwbimage.cfg b/arch/arm/boards/
huanshuo-hs50a/kwbimage.cfg
new file mode 100644
index 000000000..d0f3bdb01
--- /dev/null
+++ b/arch/arm/boards/huanshuo-hs50a/kwbimage.cfg
@@ -0,0 +1,27 @@
+VERSION 0
+BOOT_FROM nand
+NAND_ECCMODE default
+NAND_PAGESZ 00000800
+DATA ffd100e0 1b1b9b9b
+DATA ffd01400 43000c30
+DATA ffd01404 37543000
+DATA ffd01408 22125451
+DATA ffd0140c 00000a33
+DATA ffd01410 000000cc
+DATA ffd01414 00000000
+DATA ffd01418 00000000
+DATA ffd0141c 00000c52
+DATA ffd01420 00000040
+DATA ffd01424 0000f17f
+DATA ffd01428 00085520
+DATA ffd0147c 00008552
+DATA ffd01500 00000000
+DATA ffd01504 0ffffff1
+DATA ffd01508 10000000
+DATA ffd0150c 0ffffff5
+DATA ffd01514 00000000
+DATA ffd0151c 00000000
+DATA ffd01494 00030000
+DATA ffd01498 00000000
+DATA ffd0149c 0000e803
+DATA ffd01480 00000001
diff --git a/arch/arm/boards/huanshuo-hs50a/lowlevel.c b/arch/arm/boards/
huanshuo-hs50a/lowlevel.c
new file mode 100644
--- /dev/null
+++ b/arch/arm/boards/huanshuo-hs50a/lowlevel.c
@@ -0,0 +1,35 @@
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+#include <linux/sizes.h>
+#include <asm/barebox-arm.h>
+#include <asm/barebox-arm-head.h>
+#include <mach/lowlevel.h>
+
+extern char __dtb_kirkwood_huanshuo_hs50a_bb_start[];
+
+ENTRY_FUNCTION(start_huanshuo_hs50a, r0, r1, r2)
+{
+ void *fdt;
+
+ arm_cpu_lowlevel_init();
+
+ fdt = __dtb_kirkwood_huanshuo_hs50a_bb_start +
+ get_runtime_offset();
+
+ kirkwood_barebox_entry(fdt);
+}
diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig
index c830cf2f0..2aff89a02 100644
--- a/arch/arm/configs/mvebu_defconfig
+++ b/arch/arm/configs/mvebu_defconfig
@@ -9,6 +9,7 @@ CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3=y
CONFIG_MACH_TURRIS_OMNIA=y
CONFIG_MACH_SOLIDRUN_CUBOX=y
CONFIG_MACH_GLOBALSCALE_GURUPLUG=y
+CONFIG_MACH_HUANSHUO_HS50A=y
CONFIG_MACH_PLATHOME_OPENBLOCKS_A6=y
CONFIG_MACH_USI_TOPKICK=y
CONFIG_AEABI=y
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ddfe64e83..b3bd5cdc4 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -30,6 +30,7 @@ lwl-dtb-$(CONFIG_MACH_GRINN_LITEBOARD) += imx6ul-
liteboard.dtb.o
lwl-dtb-$(CONFIG_MACH_GUF_SANTARO) += imx6q-guf-santaro.dtb.o
lwl-dtb-$(CONFIG_MACH_GUF_VINCELL) += imx53-guf-vincell.dtb.o imx53-guf-
vincell-lt.dtb.o
lwl-dtb-$(CONFIG_MACH_GW_VENTANA) += imx6q-gw54xx.dtb.o
+lwl-dtb-$(CONFIG_MACH_HUANSHUO_HS50A) += kirkwood-huanshuo-hs50a-bb.dtb.o
lwl-dtb-$(CONFIG_MACH_KONTRON_SAMX6I) += imx6q-samx6i.dtb.o \
imx6dl-samx6i.dtb.o
lwl-dtb-$(CONFIG_MACH_LENOVO_IX4_300D) += armada-xp-lenovo-ix4-300d-bb.dtb.o
diff --git a/arch/arm/dts/kirkwood-huanshuo-hs50a-bb.dts b/arch/arm/dts/
kirkwood-huanshuo-hs50a-bb.dts
new file mode 100644
--- /dev/null
+++ b/arch/arm/dts/kirkwood-huanshuo-hs50a-bb.dts
@@ -0,0 +1,16 @@
+ * Barebox specific DT overlay for HuanShuo HS-50A
+ * You Xiaojie <yxj790222@163.com>
+ */
+ gpio-leds {
+ health-r {
+ barebox,default-trigger = "heartbeat";
+ };
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index bab22f07f..9bd72dddb 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -102,6 +102,10 @@ config MACH_GLOBALSCALE_GURUPLUG
bool "Guruplug"
select ARCH_KIRKWOOD
+config MACH_HUANSHUO_HS50A
+ bool "Huanshuo HS-50A"
+ select ARCH_KIRKWOOD
+
config MACH_PLATHOME_OPENBLOCKS_A6
bool "PlatHome OpenBlocks A6"
select ARCH_KIRKWOOD
diff --git a/dts/src/arm/kirkwood-huanshuo-hs50a.dts b/dts/src/arm/kirkwood-
huanshuo-hs50a.dts
new file mode 100644
--- /dev/null
+++ b/dts/src/arm/kirkwood-huanshuo-hs50a.dts
@@ -0,0 +1,348 @@
+/* Device tree file for the HuanShuo HS-50A box.
+ *
+ * Copyright (c) 2019-2020 you_xiaojie <yxj790222@163.com>
+ * Based on Marvell RD88F6181 A Board descrition
+ * Andrew Lunn <andrew@lunn.ch>
+*/
+ model = "Huanshuo hs-50a";
+ compatible = "huanshuo,hs50a","marvell,rd88f6281-a",
"marvell,rd88f6281","marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+ bootargs = "console=ttyS0,115200n8 earlyprintk";
+ stdout-path = &uart0;
+ stdin-path = &uart0;
+ };
+ device_type = "memory";
+ reg = <0x00000000 0x20000000>; /* 512 MB */
+ pinctrl-0 = <&pmx_usben>;
+ pinctrl-names = "default";
+
+ usb_power: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+ };
+ compatible = "marvell,dsa";
+ #address-cells = <2>;
+ dsa,ethernet = <ð0port>;
+ dsa,mii-bus = <&mdio>;
+
+ reg = <10 0>; /* MDIO address 0x0a, switch 0
in tree */
+ label = "lan1";
+ };
+ label = "lan2";
+ };
+ label = "lan3";
+ };
+ label = "lan4";
+ };
+ label = "cpu";
+ fixed-link {
+ &nand {
+ status = "okay";
+ label = "ubi";
+ reg = <0x0400000 0x3c00000>;
+ &mdio {
+ status = "okay";
+ switch0: switch@11 {
+ status = "okay";
+ compatible = "marvell,mv88e6085";
+ pinctrl-0 = <&pmx_sw_irq_n>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
IRQ_TYPE_LEVEL_LOW>;
+ interrupt-parent = <&gpio1>;
+ interrupt-controller;
"lan1";
+ phy-handle =
<&sw0phy0>;
+ phy-mode =
"rgmii-id"; //optional rgmii is ok
+ };
"lan2";
+ phy-handle =
<&sw0phy1>;
+ phy-mode =
"rgmii-id"; //optional rgmii is ok
+ };
"lan3";
+ phy-handle =
<&sw0phy2>;
+ phy-mode =
"rgmii-id"; //optional rgmii is ok
+ };
"lan4";
+ phy-handle =
<&sw0phy3>;
+ phy-mode =
"rgmii-id"; //optional rgmii is ok
+ };
+ phy-handle =
<&sw0phy4>;
+ phy-mode =
"rgmii-id"; //optional rgmii is ok
+ };
"cpu";
+ ethernet =
<ð1port>;
+ phy-mode =
"rgmii-id"; //must set, otherwise no rx package
+ fixed-link {
+ ethernet =
<ð0port>;
+ phy-mode =
"rgmii-id"; //optional, set to rgmii no rx package
+ fixed-link {
+ mdio {
+ #address-cells = <1>;
+ sw0phy0: switch0phy0@0
{
<0 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ sw0phy1: switch0phy1@1
{
<1 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ sw0phy2: switch0phy2@2
{
<2 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ sw0phy3: switch0phy3@3
{
<3 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ sw0phy4: switch0phy4@4
{
"ethernet-phy-id0141.0e70"; //, ethernet-phy-ieee802.3-c22";
+ reg = <4>;
parent = <&switch0>;
+ interrupts =
<4 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ &pinctrl {
+ pinctrl-names = "default";
+
+ pmx_mpps:pmx-mpps {
+ marvell,pins = "mpp28", "mpp29",
"mpp36", "mpp39", "mpp45", "mpp47", "mpp48", "mpp49";
+ marvell,function = "gpio";
+ };
+ pmx_sysrsto_n:pmx-sysrstout-n {
+ marvell,pins = "mpp6";
+ marvell,function = "sysrst";
+ };
+ pmx_sata1_n:pmx-sata1-act-n {
+ marvell,pins = "mpp34";
+ marvell,function = "sata1";
+ };
+ pmx_sata0_n:pmx-sata0-act-n {
+ marvell,pins = "mpp35";
+ marvell,function = "sata0";
+ };
+ pmx_usben:pmx-usb-pwrenable {
+ marvell,pins = "mpp37";
+ marvell,function = "gpio";
+ };
+ pmx_sw_irq_n:pmx-switcher-irq-n {
+ marvell,pins = "mpp38";
+ marvell,function = "gpio";
+ };
+ pmx_fs_n:pmx-fanspeed-n {
+ marvell,pins = "mpp40";
+ marvell,function = "gpio";
+ };
+ pmx_usboc:pmx-usb-pwroc {
+ marvell,pins = "mpp41";
+ marvell,function = "gpio";
+ };
+ pmx_sdwp:pmx-sdio-wp {
+ marvell,pins = "mpp42";
+ marvell,function = "gpio";
+ };
+ pmx_sdcd_n:pmx-sdio-cd-n {
+ marvell,pins = "mpp43";
+ marvell,function = "gpio";
+ };
+ pmx_nfbusy_n:pmx-nfrb {
+ marvell,pins = "mpp44";
+ marvell,function = "gpio";
+ };
+ pmx_mpps:pmx-mpps {
+ marvell,pins = "mpp46";
+ marvell,function = "gpio";
+ };
+ &gpio0 {
+ gpio-line-names = "NF_IO2", "NF_IO3",
"NF_IO4", "NF_IO5", "NF_IO6", "NF_IO7", "SYSRST_On", "", "TW_SDA", "TW_SCK",
"UA0_TXD", "UA0_RXD", "SD_CLK", "SD_CMD", "SD_D0", "SD_D1", "SD_D2", "SD_D3",
"NF_IO0", "NF_IO1", "RGMII1_TXD0", "RGMII1_TXD1", "RGMII1_TXD2",
"RGMII1_TXD3", "RGMII1_RXD0", "RGMII1_RXD1", "RGMII1_RXD2", "RGMII1_RXD3", "",
"", "RGMII1_RXCTL", "RGMII1_RXCLK";
+ };
+ &gpio1 {
+ gpio-line-names = "RGMII1_TXCLKOUT",
"RGMII1_TXCTL", "SATA1_ACTn", "SATA0_ACTn", "", "USB_EN", "SWITCH_IRQn", "",
"FAN_SPEEDn", "USB_OC", "SDWP", "SDCDn", "NFRB", "", "", "", "", "";
+ };
+ &i2c0 {
+ status = "okay";
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ pagesize = <32>;
+ };
+ &sdio {
+ status = "okay";
+ pinctrl-0 = <&pmx_sdio &pmx_sdcd_n
&pmx_sdwp>;
+ pinctrl-names = "default";
+ cd-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+ };
+ &sata {
+ status = "okay";
+ pinctrl-0 = <&pmx_sata0_n &pmx_sata1_n>;
+ nr-ports = <2>;
+ };
+ &uart0 {
+ status = "okay";
+ &pciec {
+ status = "okay";
+ &pcie0 {
+ status = "okay";
+ compatible = "pci168c,abcd";
+ reg = <0x7000 0 0 0 0x1000>;
+ qca,no-eeprom;
+ };
+ /* eth0 is connected to a Marvell 88E6171 switch,
without a PHY. So set
+ * fixed speed and duplex.
+ ð0 {
+ status = "okay";
+ ð0port {
+ speed = <1000>;
+ ð1 {
+ status = "okay";
+ ð1port {
+ speed = <1000>;
diff --git a/images/Makefile.mvebu b/images/Makefile.mvebu
index 112227424..2d8f66407 100644
--- a/images/Makefile.mvebu
+++ b/images/Makefile.mvebu
@@ -110,6 +110,14 @@ pblb-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) +=
start_globalscale_guruplug
image-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) += barebox-globalscale-guruplug.img
image-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) += barebox-globalscale-
guruplug-2nd.img
+HUANSHUO_HS50A_KWBOPTS = ${KWBOPTS} -i $(board)/huanshuo-hs50a/kwbimage.cfg
+OPTS_start_huanshuo_hs50a.pblb.kwbimg = $(HUANSHUO_HS50A_KWBOPTS)
+FILE_barebox-huanshuo-hs50a.img = start_huanshuo_hs50a.pblb.kwbimg
+FILE_barebox-huanshuo-hs50a-2nd.img = start_huanshuo_hs50a.pblb
+pblb-$(CONFIG_MACH_HUANSHUO_HS50A) += start_huanshuo_hs50a
+image-$(CONFIG_MACH_HUANSHUO_HS50A) += barebox-huanshuo-hs50a.img
+image-$(CONFIG_MACH_HUANSHUO_HS50A) += barebox-huanshuo-hs50a-2nd.img
+
PLATHOME_OPENBLOCKS_A6_KWBOPTS = ${KWBOPTS} -i $(board)/plathome-openblocks-
a6/kwbimage.cfg
OPTS_start_plathome_openblocks_a6.pblb.kwbimg = $
(PLATHOME_OPENBLOCKS_A6_KWBOPTS)
FILE_barebox-plathome-openblocks-a6.img =
start_plathome_openblocks_a6.pblb.kwbimg
--
2.26.0.rc2
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: bug report: fail to boot barebox in marvell 6281 board
2020-03-31 16:12 bug report: fail to boot barebox in marvell 6281 board you xiaojie
@ 2020-04-01 6:08 ` Sascha Hauer
0 siblings, 0 replies; 9+ messages in thread
From: Sascha Hauer @ 2020-04-01 6:08 UTC (permalink / raw)
To: you xiaojie; +Cc: barebox
Hi,
On Wed, Apr 01, 2020 at 12:12:12AM +0800, you xiaojie wrote:
> I ported barebox to a new board similar to guruplug, but it could not boot,
> only show a line of barebox 2020.03.0-....., and I try official guruplug also
> stopped. the devicetree is ok under linux 5.4 and the kwbimage.cfg is ok I
> think, according to the 6281's datasheet and compared with the original
> register value of machine.
>
> so any can try guruplug's barebox? this is my porting patch, is there
> something wrong?
The patch looks good from a first glance.
If you have an old version that works on the Guruplug then you could try
bisecting the problem.
Otherwise, the CONFIG_DEBUG_INITCALLS option helps you see where it
stops.
There's also early printing support which you can enable with
CONFIG_DEBUG_LL (Also set CONFIG_MVEBU_CONSOLE_UART correctly then).
I am not sure where it stops, when you see the barebox banner then this
seems to suggest that you already have a working console, so this might
not be needed.
Sascha
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: bug report: fail to boot barebox in marvell 6281 board
2020-04-02 9:25 ` Sascha Hauer
@ 2020-04-02 10:58 ` you xiaojie
0 siblings, 0 replies; 9+ messages in thread
From: you xiaojie @ 2020-04-02 10:58 UTC (permalink / raw)
To: barebox
On Thursday, April 2, 2020 5:25:10 PM CST Sascha Hauer wrote:
> +Cc Marvell expert <ukl@pengutronix.de>
>
> On Thu, Apr 02, 2020 at 04:02:57PM +0800, you xiaojie wrote:
> > On Thursday, April 2, 2020 3:41:54 PM CST Sascha Hauer wrote:
> > > On Thu, Apr 02, 2020 at 03:03:41PM +0800, you xiaojie wrote:
> > > > the debugging message.
> > > >
> > > > allan@allan-home:/media/allan/c6293bbf-6fa1-49ca-9b01-24855a810e0e/bar
> > > > ebox
> > > > -
> > > > test/barebox$ ./scripts/kwboot -b ./images/barebox-huanshuo-hs50a.img
> > > > -n
> > > > 15 -B 115200 -t /dev/ttyUSB0
> > > > Sending boot message. Please reboot the target...
> > > > Got expected NAKs
> > > > Sending boot image...
> > > >
> > > > 86 %
> > > > [....................................................................
> > > > ..]
> > > > 89 %
> > > > [....................................................................
> > > > ..]
> > > > 91 %
> > > > [....................................................................
> > > > ..]
> > > > 93 %
> > > > [....................................................................
> > > > ..]
> > > > 96 %
> > > > [....................................................................
> > > > ..]
> > > > 98 % [.............................................]
> > > >
> > > > [Type Ctrl-\ + c to quit]
> > > > uncompress.c: memory at 0x00000000, size 0x20000000
> > > > uncompress.c: enabling MMU, ttb @ 0x1ffe4000
> > > > uncompress.c: uncompressing barebox binary at 0x010053e0 (size
> > > > 0x00057dfe)
> > > > to 0x1fe00000 (uncompressed size: 0x000a4ee0)
> > > > uncompress.c: jumping to uncompressed image at 0x1fe00000
> > > > start.c: memory at 0x00000000, size 0x20000000
> > > > start.c: found DTB in boarddata, copying to 0x1fdfcc40
> > > > start.c: initializing malloc pool at 0x0fefe620 (size 0x0fefe620)
> > > > start.c: starting barebox...
> > > > initcall-> globalvar_init+0x0/0x48
> > >
> > > This looks all perfectly fine until here. I have no idea what goes wrong
> > > here. You need a binary.0 file for this board, right? Are you sure that
> > > works? Did you extract it from some working U-Boot?
> > > It might also be a toolchain related issue. Which toolchain are you
> > > using?
> > >
> > > Sascha
> >
> > binary.0? no I don't think so.for armada 370, need. for
> > kirkwood,kwbimage.cfg complete such memory initialisation work. so there
> > is no need binary.0 file. that is to see in images/Makefile.
> > this is kwbimage from uboot setting registry for mem init. also in 6281
> > datasheet (publicly available on internet)
>
> Ok, I am not very familiar with these SoCs. I thought there generally is
> a binary.0 file necessary.
>
> > DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled
> > DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled
> >
> > DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low)
> > DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
> > # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
> > # bit3-2: 01, ODT1 active NEVER!
> > # bit31-4: zero, required
> >
> > DATA 0xFFD0149C 0x0000E803 # CPU ODT Control
> > DATA 0xFFD01480 0x00000001 # DDR Initialization Control
> > #bit0=1, enable DDR init upon this register write
> >
> >
> > what is the register's base mem address for uboot or barebox?
> > where to define 0xffd00000 base address?
>
> I am a bit confused. In arch/arm/mach-mvebu/common.c we have:
>
> /*
> * All MVEBU SoCs start with internal registers at 0xd0000000.
> * To get more contiguous address space and as Linux expects them
> * there, we remap them early to 0xf1000000.
> */
>
> It seems this is not true for Kirkwood??
>
> Sascha
I also noticed: barebox/arch/arm/mach-mvebu/include/mach/common.h
#ifndef __MACH_COMMON_H__
#define __MACH_COMMON_H__
#include <asm/sections.h>
#include <asm/unaligned.h>
#define MVEBU_BOOTUP_INT_REG_BASE 0xd0000000
#define MVEBU_REMAP_INT_REG_BASE 0xf1000000
/* #including <asm/barebox-arm.h> yields a circle, so we need a forward decl
*/
unsigned long get_runtime_offset(void);
static inline void __iomem *mvebu_get_initial_int_reg_base(void)
{
#ifdef __PBL__
u32 base = __get_unaligned_le32(_text + get_runtime_offset() +
0x30);
return (void __force __iomem *)base;
#else
return (void __force __iomem *)MVEBU_REMAP_INT_REG_BASE;
#endif
}
#endif
take this as example DATA 0xFFD0149C 0x0000E803,
in datasheet,
Table 189:DDR Controller ODT Control Register
Offset: 0x0149C
.......(omitted)
so what is 0xffd00000? in uboot could not find barbox is also not find .
strange value.
however this file should work in uboot. I try again for sure.
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: bug report: fail to boot barebox in marvell 6281 board
2020-04-02 8:02 ` you xiaojie
@ 2020-04-02 9:25 ` Sascha Hauer
2020-04-02 10:58 ` you xiaojie
0 siblings, 1 reply; 9+ messages in thread
From: Sascha Hauer @ 2020-04-02 9:25 UTC (permalink / raw)
To: you xiaojie; +Cc: barebox, Uwe Kleine-Koenig
+Cc Marvell expert <ukl@pengutronix.de>
On Thu, Apr 02, 2020 at 04:02:57PM +0800, you xiaojie wrote:
> On Thursday, April 2, 2020 3:41:54 PM CST Sascha Hauer wrote:
> > On Thu, Apr 02, 2020 at 03:03:41PM +0800, you xiaojie wrote:
> > > the debugging message.
> > >
> > > allan@allan-home:/media/allan/c6293bbf-6fa1-49ca-9b01-24855a810e0e/barebox
> > > -
> > > test/barebox$ ./scripts/kwboot -b ./images/barebox-huanshuo-hs50a.img -n
> > > 15 -B 115200 -t /dev/ttyUSB0
> > > Sending boot message. Please reboot the target...
> > > Got expected NAKs
> > > Sending boot image...
> > >
> > > 86 %
> > > [......................................................................]
> > > 89 %
> > > [......................................................................]
> > > 91 %
> > > [......................................................................]
> > > 93 %
> > > [......................................................................]
> > > 96 %
> > > [......................................................................]
> > > 98 % [.............................................]
> > >
> > > [Type Ctrl-\ + c to quit]
> > > uncompress.c: memory at 0x00000000, size 0x20000000
> > > uncompress.c: enabling MMU, ttb @ 0x1ffe4000
> > > uncompress.c: uncompressing barebox binary at 0x010053e0 (size 0x00057dfe)
> > > to 0x1fe00000 (uncompressed size: 0x000a4ee0)
> > > uncompress.c: jumping to uncompressed image at 0x1fe00000
> > > start.c: memory at 0x00000000, size 0x20000000
> > > start.c: found DTB in boarddata, copying to 0x1fdfcc40
> > > start.c: initializing malloc pool at 0x0fefe620 (size 0x0fefe620)
> > > start.c: starting barebox...
> > > initcall-> globalvar_init+0x0/0x48
> >
> > This looks all perfectly fine until here. I have no idea what goes wrong
> > here. You need a binary.0 file for this board, right? Are you sure that
> > works? Did you extract it from some working U-Boot?
> > It might also be a toolchain related issue. Which toolchain are you
> > using?
> >
> > Sascha
> binary.0? no I don't think so.for armada 370, need. for kirkwood,kwbimage.cfg
> complete such memory initialisation work. so there is no need binary.0 file.
> that is to see in images/Makefile.
> this is kwbimage from uboot setting registry for mem init. also in 6281
> datasheet (publicly available on internet)
Ok, I am not very familiar with these SoCs. I thought there generally is
a binary.0 file necessary.
> DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled
> DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled
>
> DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low)
> DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
> # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
> # bit3-2: 01, ODT1 active NEVER!
> # bit31-4: zero, required
>
> DATA 0xFFD0149C 0x0000E803 # CPU ODT Control
> DATA 0xFFD01480 0x00000001 # DDR Initialization Control
> #bit0=1, enable DDR init upon this register write
>
>
> what is the register's base mem address for uboot or barebox?
> where to define 0xffd00000 base address?
I am a bit confused. In arch/arm/mach-mvebu/common.c we have:
/*
* All MVEBU SoCs start with internal registers at 0xd0000000.
* To get more contiguous address space and as Linux expects them
* there, we remap them early to 0xf1000000.
*/
It seems this is not true for Kirkwood??
Sascha
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: bug report: fail to boot barebox in marvell 6281 board
2020-04-02 7:41 ` Sascha Hauer
@ 2020-04-02 8:02 ` you xiaojie
2020-04-02 9:25 ` Sascha Hauer
0 siblings, 1 reply; 9+ messages in thread
From: you xiaojie @ 2020-04-02 8:02 UTC (permalink / raw)
To: barebox
On Thursday, April 2, 2020 3:41:54 PM CST Sascha Hauer wrote:
> On Thu, Apr 02, 2020 at 03:03:41PM +0800, you xiaojie wrote:
> > the debugging message.
> >
> > allan@allan-home:/media/allan/c6293bbf-6fa1-49ca-9b01-24855a810e0e/barebox
> > -
> > test/barebox$ ./scripts/kwboot -b ./images/barebox-huanshuo-hs50a.img -n
> > 15 -B 115200 -t /dev/ttyUSB0
> > Sending boot message. Please reboot the target...
> > Got expected NAKs
> > Sending boot image...
> >
> > 86 %
> > [......................................................................]
> > 89 %
> > [......................................................................]
> > 91 %
> > [......................................................................]
> > 93 %
> > [......................................................................]
> > 96 %
> > [......................................................................]
> > 98 % [.............................................]
> >
> > [Type Ctrl-\ + c to quit]
> > uncompress.c: memory at 0x00000000, size 0x20000000
> > uncompress.c: enabling MMU, ttb @ 0x1ffe4000
> > uncompress.c: uncompressing barebox binary at 0x010053e0 (size 0x00057dfe)
> > to 0x1fe00000 (uncompressed size: 0x000a4ee0)
> > uncompress.c: jumping to uncompressed image at 0x1fe00000
> > start.c: memory at 0x00000000, size 0x20000000
> > start.c: found DTB in boarddata, copying to 0x1fdfcc40
> > start.c: initializing malloc pool at 0x0fefe620 (size 0x0fefe620)
> > start.c: starting barebox...
> > initcall-> globalvar_init+0x0/0x48
>
> This looks all perfectly fine until here. I have no idea what goes wrong
> here. You need a binary.0 file for this board, right? Are you sure that
> works? Did you extract it from some working U-Boot?
> It might also be a toolchain related issue. Which toolchain are you
> using?
>
> Sascha
binary.0? no I don't think so.for armada 370, need. for kirkwood,kwbimage.cfg
complete such memory initialisation work. so there is no need binary.0 file.
that is to see in images/Makefile.
this is kwbimage from uboot setting registry for mem init. also in 6281
datasheet (publicly available on internet)
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2009
# Marvell Semiconductor <www.marvell.com>
# Written-by: Siddarth Gore <gores@marvell.com>
# Refer doc/README.kwbimage for more details about how-to configure
# and create kirkwood boot image
#
# Boot Media configurations
BOOT_FROM nand
NAND_ECC_MODE default
NAND_PAGE_SIZE 0x0800
# SOC registers configuration using bootrom header extension
# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
# Configure RGMII-0/1 interface pad voltage to 1.8V
DATA 0xFFD100e0 0x1b1b9b9b
#Dram initalization for SINGLE x16 CL=5 @ 400MHz
DATA 0xFFD01400 0x43000c30 # DDR Configuration register
# bit13-0: 0xc30 (3120 DDR2 clks refresh rate)
# bit23-14: zero
# bit24: 1= enable exit self refresh mode on DDR access
# bit25: 1 required
# bit29-26: zero
# bit31-30: 01
DATA 0xFFD01404 0x37543000 # DDR Controller Control Low
# bit 4: 0=addr/cmd in smame cycle
# bit 5: 0=clk is driven during self refresh, we don't care for APX
# bit 6: 0=use recommended falling edge of clk for addr/cmd
# bit14: 0=input buffer always powered up
# bit18: 1=cpu lock transaction enabled
# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0
# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered
DIMM
# bit30-28: 3 required
# bit31: 0=no additional STARTBURST delay
DATA 0xFFD01408 0x22125451 # DDR Timing (Low) (active cycles value +1)
# bit3-0: TRAS lsbs
# bit7-4: TRCD
# bit11- 8: TRP
# bit15-12: TWR
# bit19-16: TWTR
# bit20: TRAS msb
# bit23-21: 0x0
# bit27-24: TRRD
# bit31-28: TRTP
DATA 0xFFD0140C 0x00000a33 # DDR Timing (High)
# bit6-0: TRFC
# bit8-7: TR2R
# bit10-9: TR2W
# bit12-11: TW2W
# bit31-13: zero required
DATA 0xFFD01410 0x000000cc # DDR Address Control
# bit1-0: 01, Cs0width=x8
# bit3-2: 10, Cs0size=1Gb
# bit5-4: 01, Cs1width=x8
# bit7-6: 10, Cs1size=1Gb
# bit9-8: 00, Cs2width=nonexistent
# bit11-10: 00, Cs2size =nonexistent
# bit13-12: 00, Cs3width=nonexistent
# bit15-14: 00, Cs3size =nonexistent
# bit16: 0, Cs0AddrSel
# bit17: 0, Cs1AddrSel
# bit18: 0, Cs2AddrSel
# bit19: 0, Cs3AddrSel
# bit31-20: 0 required
DATA 0xFFD01414 0x00000000 # DDR Open Pages Control
# bit0: 0, OpenPage enabled
# bit31-1: 0 required
DATA 0xFFD01418 0x00000000 # DDR Operation
# bit3-0: 0x0, DDR cmd
# bit31-4: 0 required
DATA 0xFFD0141C 0x00000C52 # DDR Mode
# bit2-0: 2, BurstLen=2 required
# bit3: 0, BurstType=0 required
# bit6-4: 4, CL=5
# bit7: 0, TestMode=0 normal
# bit8: 0, DLL reset=0 normal
# bit11-9: 6, auto-precharge write recovery ????????????
# bit12: 0, PD must be zero
# bit31-13: 0 required
DATA 0xFFD01420 0x00000040 # DDR Extended Mode
# bit0: 0, DDR DLL enabled
# bit1: 0, DDR drive strenght normal
# bit2: 0, DDR ODT control lsd (disabled)
# bit5-3: 000, required
# bit6: 1, DDR ODT control msb, (disabled)
# bit9-7: 000, required
# bit10: 0, differential DQS enabled
# bit11: 0, required
# bit12: 0, DDR output buffer enabled
# bit31-13: 0 required
DATA 0xFFD01424 0x0000F17F # DDR Controller Control High
# bit2-0: 111, required
# bit3 : 1 , MBUS Burst Chop disabled
# bit6-4: 111, required
# bit7 : 0
# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz
# bit9 : 0 , no half clock cycle addition to dataout
# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals
# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
# bit15-12: 1111 required
# bit31-16: 0 required
DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values)
DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0
DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size
# bit0: 1, Window enabled
# bit1: 0, Write Protect disabled
# bit3-2: 00, CS0 hit selected
# bit23-4: ones, required
# bit31-24: 0x0F, Size (i.e. 256MB)
DATA 0xFFD01508 0x10000000 # CS[1]n Base address to 256Mb
DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1
DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled
DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled
DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low)
DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
# bit1-0: 00, ODT0 controlled by ODT Control (low) register above
# bit3-2: 01, ODT1 active NEVER!
# bit31-4: zero, required
DATA 0xFFD0149C 0x0000E803 # CPU ODT Control
DATA 0xFFD01480 0x00000001 # DDR Initialization Control
#bit0=1, enable DDR init upon this register write
what is the register's base mem address for uboot or barebox?
where to define 0xffd00000 base address?
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: bug report: fail to boot barebox in marvell 6281 board
2020-04-02 7:03 ` you xiaojie
@ 2020-04-02 7:41 ` Sascha Hauer
2020-04-02 8:02 ` you xiaojie
0 siblings, 1 reply; 9+ messages in thread
From: Sascha Hauer @ 2020-04-02 7:41 UTC (permalink / raw)
To: you xiaojie; +Cc: barebox
On Thu, Apr 02, 2020 at 03:03:41PM +0800, you xiaojie wrote:
> the debugging message.
>
> allan@allan-home:/media/allan/c6293bbf-6fa1-49ca-9b01-24855a810e0e/barebox-
> test/barebox$ ./scripts/kwboot -b ./images/barebox-huanshuo-hs50a.img -n 15 -B
> 115200 -t /dev/ttyUSB0
> Sending boot message. Please reboot the target...
> Got expected NAKs
> Sending boot image...
> 86 % [......................................................................]
> 89 % [......................................................................]
> 91 % [......................................................................]
> 93 % [......................................................................]
> 96 % [......................................................................]
> 98 % [.............................................]
> [Type Ctrl-\ + c to quit]
> uncompress.c: memory at 0x00000000, size 0x20000000
> uncompress.c: enabling MMU, ttb @ 0x1ffe4000
> uncompress.c: uncompressing barebox binary at 0x010053e0 (size 0x00057dfe) to
> 0x1fe00000 (uncompressed size: 0x000a4ee0)
> uncompress.c: jumping to uncompressed image at 0x1fe00000
> start.c: memory at 0x00000000, size 0x20000000
> start.c: found DTB in boarddata, copying to 0x1fdfcc40
> start.c: initializing malloc pool at 0x0fefe620 (size 0x0fefe620)
> start.c: starting barebox...
> initcall-> globalvar_init+0x0/0x48
This looks all perfectly fine until here. I have no idea what goes wrong
here. You need a binary.0 file for this board, right? Are you sure that
works? Did you extract it from some working U-Boot?
It might also be a toolchain related issue. Which toolchain are you
using?
Sascha
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: bug report: fail to boot barebox in marvell 6281 board
2020-03-31 16:30 youxiaojie
@ 2020-04-02 7:03 ` you xiaojie
2020-04-02 7:41 ` Sascha Hauer
0 siblings, 1 reply; 9+ messages in thread
From: you xiaojie @ 2020-04-02 7:03 UTC (permalink / raw)
To: barebox
the debugging message.
allan@allan-home:/media/allan/c6293bbf-6fa1-49ca-9b01-24855a810e0e/barebox-
test/barebox$ ./scripts/kwboot -b ./images/barebox-huanshuo-hs50a.img -n 15 -B
115200 -t /dev/ttyUSB0
Sending boot message. Please reboot the target...
Got expected NAKs
Sending boot image...
0 % [S.....................................................................]
2 % [......................................................................]
4 % [......................................................................]
7 % [......................................................................]
9 % [......................................................................]
11 % [......................................................................]
14 % [......................................................................]
16 % [......................................................................]
18 % [......................................................................]
21 % [......................................................................]
23 % [......................................................................]
25 % [......................................................................]
28 % [......................................................................]
30 % [......................................................................]
32 % [......................................................................]
35 % [......................................................................]
37 % [......................................................................]
39 % [......................................................................]
42 % [......................................................................]
44 % [......................................................................]
46 % [......................................................................]
49 % [......................................................................]
51 % [......................................................................]
53 % [......................................................................]
56 % [......................................................................]
58 % [......................................................................]
60 % [......................................................................]
63 % [......................................................................]
65 % [......................................................................]
68 % [......................................................................]
70 % [......................................................................]
72 % [......................................................................]
75 % [......................................................................]
77 % [......................................................................]
79 % [......................................................................]
82 % [......................................................................]
84 % [......................................................................]
86 % [......................................................................]
89 % [......................................................................]
91 % [......................................................................]
93 % [......................................................................]
96 % [......................................................................]
98 % [.............................................]
[Type Ctrl-\ + c to quit]
uncompress.c: memory at 0x00000000, size 0x20000000
uncompress.c: enabling MMU, ttb @ 0x1ffe4000
uncompress.c: uncompressing barebox binary at 0x010053e0 (size 0x00057dfe) to
0x1fe00000 (uncompressed size: 0x000a4ee0)
uncompress.c: jumping to uncompressed image at 0x1fe00000
start.c: memory at 0x00000000, size 0x20000000
start.c: found DTB in boarddata, copying to 0x1fdfcc40
start.c: initializing malloc pool at 0x0fefe620 (size 0x0fefe620)
start.c: starting barebox...
initcall-> globalvar_init+0x0/0x48
allan@allan-home:/media/allan/c6293bbf-6fa1-49ca-9b01-24855a810e0e/barebox-
test/barebox$ scripts/kwboot -b images/barebox-globalscale-guruplug.img -n 15
-B 115200 -t /dev/ttyUSB0
Sending boot message. Please reboot the
target...w\xbb\xbbw\xddww\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbbU\xbb\xddww\xbb\xbb\xddw\xdd\xbb\xdd\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddw\xdd\xbb\xdd\xbb\xbbU\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddww\xbb\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddww\xbb\xbb\xbb\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xddww\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xddw\xdd\xbb\xbbU\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xddw\xdd\xbb\xbbU\xbb\xddww\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbbU\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xddw\xdd\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xddww\xbb\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xddww\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbbU\xbb\xddww\xbb\xbb\xddw\xdd\xbb\xdd\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbbw\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xddww\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddww\xbb\xbb\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddww\xbb\xbb\xbb\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddw\xdd\xbb\xdd\xbb\xddww\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xddww\xbb\xbb\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbbUww\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xddww\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddww\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddww\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xddw\xdd\xbb\xbbU\xbb\xddww\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xddw\xbb\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbbw\xbb\xbbU\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddw\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbbU\xddU\xbb\xddww\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xddww\xbb\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddww\xbb\xbb\xbb\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xddw\xdd\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xddww\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xddww\xbb\xbb\xbb\xbb\xbb\xbb\xbbwU\xbb\xddw\xbb\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xddwU\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xdd\xbbU\xbb\xddww\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xddw\xdd\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xddww\xbb\xbb\xbb\xbbU\xbb\xddww\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddww\xbb\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xddww\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xddww\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xddw\xdd\xbb\xdd\xbb\xddww\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xbb\xddw\xdd\xbb\xdd\xbb\xdd\xbb\xdd\xbb\xbbU\xbb\xdd^C
allan@allan-home:/media/allan/c6293bbf-6fa1-49ca-9b01-24855a810e0e/barebox-
test/barebox$ scripts/kwboot -b images/barebox-globalscale-guruplug.img -n 15
-B 115200 -t /dev/ttyUSB0
Sending boot message. Please reboot the target...
Got expected NAKs
Sending boot image...
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[Type Ctrl-\ + c to quit]
uncompress.c: memory at 0x00000000, size 0x20000000
uncompress.c: enabling MMU, ttb @ 0x1ffe4000
uncompress.c: uncompressing barebox binary at 0x01004820 (size 0x00057dfe) to
0x1fe00000 (uncompressed size: 0x000a4ee0)
uncompress.c: jumping to uncompressed image at 0x1fe00000
start.c: memory at 0x00000000, size 0x20000000
start.c: found DTB in boarddata, copying to 0x1fdfd800
start.c: initializing malloc pool at 0x0fefec00 (size 0x0fefec00)
start.c: starting barebox...
initcall-> globalvar_init+0x0/0x48
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 9+ messages in thread
* bug report: fail to boot barebox in marvell 6281 board
@ 2020-03-31 16:30 youxiaojie
2020-04-02 7:03 ` you xiaojie
0 siblings, 1 reply; 9+ messages in thread
From: youxiaojie @ 2020-03-31 16:30 UTC (permalink / raw)
To: barebox
I ported barebox to a new board similar to guruplug, but it could not boot,
only show a line of barebox 2020.03.0-....., and I try official guruplug also
stopped. the devicetree is ok under linux 5.4 and the kwbimage.cfg is ok I
think, according to the 6281's datasheet and compared with the original
register value of machine.
so any can try guruplug's barebox? this is my porting patch, is there
something wrong?
From f2381a9855ae9db312aed52b1ab4d7343181e3b4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E5=B0=A4=E6=99=93=E6=9D=B0?= <yxj790222@163.com>
Date: Mon, 30 Mar 2020 01:32:31 +0800
Subject: [PATCH] Add support for Huanshuo HS-50A
---
arch/arm/boards/Makefile | 1 +
arch/arm/boards/huanshuo-hs50a/Makefile | 2 +
arch/arm/boards/huanshuo-hs50a/board.c | 17 +
arch/arm/boards/huanshuo-hs50a/kwbimage.cfg | 27 ++
arch/arm/boards/huanshuo-hs50a/lowlevel.c | 35 ++
arch/arm/configs/mvebu_defconfig | 1 +
arch/arm/dts/Makefile | 1 +
arch/arm/dts/kirkwood-huanshuo-hs50a-bb.dts | 16 +
arch/arm/mach-mvebu/Kconfig | 4 +
dts/src/arm/kirkwood-huanshuo-hs50a.dts | 348 ++++++++++++++++++++
images/Makefile.mvebu | 8 +
11 files changed, 460 insertions(+)
create mode 100644 arch/arm/boards/huanshuo-hs50a/Makefile
create mode 100644 arch/arm/boards/huanshuo-hs50a/board.c
create mode 100644 arch/arm/boards/huanshuo-hs50a/kwbimage.cfg
create mode 100644 arch/arm/boards/huanshuo-hs50a/lowlevel.c
create mode 100644 arch/arm/dts/kirkwood-huanshuo-hs50a-bb.dts
create mode 100644 dts/src/arm/kirkwood-huanshuo-hs50a.dts
diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 9fe458e0a..009dbd801 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -61,6 +61,7 @@ obj-$(CONFIG_MACH_GUF_VINCELL)
+= guf-vincell/
obj-$(CONFIG_MACH_GW_VENTANA) += gateworks-ventana/
obj-$(CONFIG_MACH_HABA_KNX_LITE) += haba-knx/
obj-$(CONFIG_MACH_HIGHBANK) += highbank/
+obj-$(CONFIG_MACH_HUANSHUO_HS50A) += huanshuo-hs50a/
obj-$(CONFIG_MACH_IMX21ADS) += freescale-mx21-ads/
obj-$(CONFIG_MACH_IMX233_OLINUXINO) += imx233-olinuxino/
obj-$(CONFIG_MACH_IMX27ADS) += freescale-mx27-ads/
diff --git a/arch/arm/boards/huanshuo-hs50a/Makefile b/arch/arm/boards/huanshuo-
hs50a/Makefile
new file mode 100644
index 000000000..01c7a259e
--- /dev/null
+++ b/arch/arm/boards/huanshuo-hs50a/Makefile
@@ -0,0 +1,2 @@
+obj-y += board.o
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/huanshuo-hs50a/board.c b/arch/arm/boards/huanshuo-
hs50a/board.c
new file mode 100644
index 000000000..9c800c541
--- /dev/null
+++ b/arch/arm/boards/huanshuo-hs50a/board.c
@@ -0,0 +1,17 @@
+/*
+ * Copyright
+ * (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+/* empty */
diff --git a/arch/arm/boards/huanshuo-hs50a/kwbimage.cfg b/arch/arm/boards/
huanshuo-hs50a/kwbimage.cfg
new file mode 100644
index 000000000..d0f3bdb01
--- /dev/null
+++ b/arch/arm/boards/huanshuo-hs50a/kwbimage.cfg
@@ -0,0 +1,27 @@
+VERSION 0
+BOOT_FROM nand
+NAND_ECCMODE default
+NAND_PAGESZ 00000800
+DATA ffd100e0 1b1b9b9b
+DATA ffd01400 43000c30
+DATA ffd01404 37543000
+DATA ffd01408 22125451
+DATA ffd0140c 00000a33
+DATA ffd01410 000000cc
+DATA ffd01414 00000000
+DATA ffd01418 00000000
+DATA ffd0141c 00000c52
+DATA ffd01420 00000040
+DATA ffd01424 0000f17f
+DATA ffd01428 00085520
+DATA ffd0147c 00008552
+DATA ffd01500 00000000
+DATA ffd01504 0ffffff1
+DATA ffd01508 10000000
+DATA ffd0150c 0ffffff5
+DATA ffd01514 00000000
+DATA ffd0151c 00000000
+DATA ffd01494 00030000
+DATA ffd01498 00000000
+DATA ffd0149c 0000e803
+DATA ffd01480 00000001
diff --git a/arch/arm/boards/huanshuo-hs50a/lowlevel.c b/arch/arm/boards/
huanshuo-hs50a/lowlevel.c
new file mode 100644
--- /dev/null
+++ b/arch/arm/boards/huanshuo-hs50a/lowlevel.c
@@ -0,0 +1,35 @@
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+#include <linux/sizes.h>
+#include <asm/barebox-arm.h>
+#include <asm/barebox-arm-head.h>
+#include <mach/lowlevel.h>
+
+extern char __dtb_kirkwood_huanshuo_hs50a_bb_start[];
+
+ENTRY_FUNCTION(start_huanshuo_hs50a, r0, r1, r2)
+{
+ void *fdt;
+
+ arm_cpu_lowlevel_init();
+
+ fdt = __dtb_kirkwood_huanshuo_hs50a_bb_start +
+ get_runtime_offset();
+
+ kirkwood_barebox_entry(fdt);
+}
diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig
index c830cf2f0..2aff89a02 100644
--- a/arch/arm/configs/mvebu_defconfig
+++ b/arch/arm/configs/mvebu_defconfig
@@ -9,6 +9,7 @@ CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3=y
CONFIG_MACH_TURRIS_OMNIA=y
CONFIG_MACH_SOLIDRUN_CUBOX=y
CONFIG_MACH_GLOBALSCALE_GURUPLUG=y
+CONFIG_MACH_HUANSHUO_HS50A=y
CONFIG_MACH_PLATHOME_OPENBLOCKS_A6=y
CONFIG_MACH_USI_TOPKICK=y
CONFIG_AEABI=y
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ddfe64e83..b3bd5cdc4 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -30,6 +30,7 @@ lwl-dtb-$(CONFIG_MACH_GRINN_LITEBOARD) += imx6ul-
liteboard.dtb.o
lwl-dtb-$(CONFIG_MACH_GUF_SANTARO) += imx6q-guf-santaro.dtb.o
lwl-dtb-$(CONFIG_MACH_GUF_VINCELL) += imx53-guf-vincell.dtb.o imx53-guf-
vincell-lt.dtb.o
lwl-dtb-$(CONFIG_MACH_GW_VENTANA) += imx6q-gw54xx.dtb.o
+lwl-dtb-$(CONFIG_MACH_HUANSHUO_HS50A) += kirkwood-huanshuo-hs50a-bb.dtb.o
lwl-dtb-$(CONFIG_MACH_KONTRON_SAMX6I) += imx6q-samx6i.dtb.o \
imx6dl-samx6i.dtb.o
lwl-dtb-$(CONFIG_MACH_LENOVO_IX4_300D) += armada-xp-lenovo-ix4-300d-bb.dtb.o
diff --git a/arch/arm/dts/kirkwood-huanshuo-hs50a-bb.dts b/arch/arm/dts/
kirkwood-huanshuo-hs50a-bb.dts
new file mode 100644
--- /dev/null
+++ b/arch/arm/dts/kirkwood-huanshuo-hs50a-bb.dts
@@ -0,0 +1,16 @@
+ * Barebox specific DT overlay for HuanShuo HS-50A
+ * You Xiaojie <yxj790222@163.com>
+ */
+ gpio-leds {
+ health-r {
+ barebox,default-trigger = "heartbeat";
+ };
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index bab22f07f..9bd72dddb 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -102,6 +102,10 @@ config MACH_GLOBALSCALE_GURUPLUG
bool "Guruplug"
select ARCH_KIRKWOOD
+config MACH_HUANSHUO_HS50A
+ bool "Huanshuo HS-50A"
+ select ARCH_KIRKWOOD
+
config MACH_PLATHOME_OPENBLOCKS_A6
bool "PlatHome OpenBlocks A6"
select ARCH_KIRKWOOD
diff --git a/dts/src/arm/kirkwood-huanshuo-hs50a.dts b/dts/src/arm/kirkwood-
huanshuo-hs50a.dts
new file mode 100644
--- /dev/null
+++ b/dts/src/arm/kirkwood-huanshuo-hs50a.dts
@@ -0,0 +1,348 @@
+/* Device tree file for the HuanShuo HS-50A box.
+ *
+ * Copyright (c) 2019-2020 you_xiaojie <yxj790222@163.com>
+ * Based on Marvell RD88F6181 A Board descrition
+ * Andrew Lunn <andrew@lunn.ch>
+*/
+ model = "Huanshuo hs-50a";
+ compatible = "huanshuo,hs50a","marvell,rd88f6281-a",
"marvell,rd88f6281","marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+ bootargs = "console=ttyS0,115200n8 earlyprintk";
+ stdout-path = &uart0;
+ stdin-path = &uart0;
+ };
+ device_type = "memory";
+ reg = <0x00000000 0x20000000>; /* 512 MB */
+ pinctrl-0 = <&pmx_usben>;
+ pinctrl-names = "default";
+
+ usb_power: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+ };
+ compatible = "marvell,dsa";
+ #address-cells = <2>;
+ dsa,ethernet = <ð0port>;
+ dsa,mii-bus = <&mdio>;
+
+ reg = <10 0>; /* MDIO address 0x0a, switch 0
in tree */
+ label = "lan1";
+ };
+ label = "lan2";
+ };
+ label = "lan3";
+ };
+ label = "lan4";
+ };
+ label = "cpu";
+ fixed-link {
+ &nand {
+ status = "okay";
+ label = "ubi";
+ reg = <0x0400000 0x3c00000>;
+ &mdio {
+ status = "okay";
+ switch0: switch@11 {
+ status = "okay";
+ compatible = "marvell,mv88e6085";
+ pinctrl-0 = <&pmx_sw_irq_n>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
IRQ_TYPE_LEVEL_LOW>;
+ interrupt-parent = <&gpio1>;
+ interrupt-controller;
"lan1";
+ phy-handle =
<&sw0phy0>;
+ phy-mode =
"rgmii-id"; //optional rgmii is ok
+ };
"lan2";
+ phy-handle =
<&sw0phy1>;
+ phy-mode =
"rgmii-id"; //optional rgmii is ok
+ };
"lan3";
+ phy-handle =
<&sw0phy2>;
+ phy-mode =
"rgmii-id"; //optional rgmii is ok
+ };
"lan4";
+ phy-handle =
<&sw0phy3>;
+ phy-mode =
"rgmii-id"; //optional rgmii is ok
+ };
+ phy-handle =
<&sw0phy4>;
+ phy-mode =
"rgmii-id"; //optional rgmii is ok
+ };
"cpu";
+ ethernet =
<ð1port>;
+ phy-mode =
"rgmii-id"; //must set, otherwise no rx package
+ fixed-link {
+ ethernet =
<ð0port>;
+ phy-mode =
"rgmii-id"; //optional, set to rgmii no rx package
+ fixed-link {
+ mdio {
+ #address-cells = <1>;
+ sw0phy0: switch0phy0@0
{
<0 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ sw0phy1: switch0phy1@1
{
<1 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ sw0phy2: switch0phy2@2
{
<2 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ sw0phy3: switch0phy3@3
{
<3 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ sw0phy4: switch0phy4@4
{
"ethernet-phy-id0141.0e70"; //, ethernet-phy-ieee802.3-c22";
+ reg = <4>;
parent = <&switch0>;
+ interrupts =
<4 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ &pinctrl {
+ pinctrl-names = "default";
+
+ pmx_mpps:pmx-mpps {
+ marvell,pins = "mpp28", "mpp29",
"mpp36", "mpp39", "mpp45", "mpp47", "mpp48", "mpp49";
+ marvell,function = "gpio";
+ };
+ pmx_sysrsto_n:pmx-sysrstout-n {
+ marvell,pins = "mpp6";
+ marvell,function = "sysrst";
+ };
+ pmx_sata1_n:pmx-sata1-act-n {
+ marvell,pins = "mpp34";
+ marvell,function = "sata1";
+ };
+ pmx_sata0_n:pmx-sata0-act-n {
+ marvell,pins = "mpp35";
+ marvell,function = "sata0";
+ };
+ pmx_usben:pmx-usb-pwrenable {
+ marvell,pins = "mpp37";
+ marvell,function = "gpio";
+ };
+ pmx_sw_irq_n:pmx-switcher-irq-n {
+ marvell,pins = "mpp38";
+ marvell,function = "gpio";
+ };
+ pmx_fs_n:pmx-fanspeed-n {
+ marvell,pins = "mpp40";
+ marvell,function = "gpio";
+ };
+ pmx_usboc:pmx-usb-pwroc {
+ marvell,pins = "mpp41";
+ marvell,function = "gpio";
+ };
+ pmx_sdwp:pmx-sdio-wp {
+ marvell,pins = "mpp42";
+ marvell,function = "gpio";
+ };
+ pmx_sdcd_n:pmx-sdio-cd-n {
+ marvell,pins = "mpp43";
+ marvell,function = "gpio";
+ };
+ pmx_nfbusy_n:pmx-nfrb {
+ marvell,pins = "mpp44";
+ marvell,function = "gpio";
+ };
+ pmx_mpps:pmx-mpps {
+ marvell,pins = "mpp46";
+ marvell,function = "gpio";
+ };
+ &gpio0 {
+ gpio-line-names = "NF_IO2", "NF_IO3",
"NF_IO4", "NF_IO5", "NF_IO6", "NF_IO7", "SYSRST_On", "", "TW_SDA", "TW_SCK",
"UA0_TXD", "UA0_RXD", "SD_CLK", "SD_CMD", "SD_D0", "SD_D1", "SD_D2", "SD_D3",
"NF_IO0", "NF_IO1", "RGMII1_TXD0", "RGMII1_TXD1", "RGMII1_TXD2",
"RGMII1_TXD3", "RGMII1_RXD0", "RGMII1_RXD1", "RGMII1_RXD2", "RGMII1_RXD3", "",
"", "RGMII1_RXCTL", "RGMII1_RXCLK";
+ };
+ &gpio1 {
+ gpio-line-names = "RGMII1_TXCLKOUT",
"RGMII1_TXCTL", "SATA1_ACTn", "SATA0_ACTn", "", "USB_EN", "SWITCH_IRQn", "",
"FAN_SPEEDn", "USB_OC", "SDWP", "SDCDn", "NFRB", "", "", "", "", "";
+ };
+ &i2c0 {
+ status = "okay";
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ pagesize = <32>;
+ };
+ &sdio {
+ status = "okay";
+ pinctrl-0 = <&pmx_sdio &pmx_sdcd_n
&pmx_sdwp>;
+ pinctrl-names = "default";
+ cd-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+ };
+ &sata {
+ status = "okay";
+ pinctrl-0 = <&pmx_sata0_n &pmx_sata1_n>;
+ nr-ports = <2>;
+ };
+ &uart0 {
+ status = "okay";
+ &pciec {
+ status = "okay";
+ &pcie0 {
+ status = "okay";
+ compatible = "pci168c,abcd";
+ reg = <0x7000 0 0 0 0x1000>;
+ qca,no-eeprom;
+ };
+ /* eth0 is connected to a Marvell 88E6171 switch,
without a PHY. So set
+ * fixed speed and duplex.
+ ð0 {
+ status = "okay";
+ ð0port {
+ speed = <1000>;
+ ð1 {
+ status = "okay";
+ ð1port {
+ speed = <1000>;
diff --git a/images/Makefile.mvebu b/images/Makefile.mvebu
index 112227424..2d8f66407 100644
--- a/images/Makefile.mvebu
+++ b/images/Makefile.mvebu
@@ -110,6 +110,14 @@ pblb-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) +=
start_globalscale_guruplug
image-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) += barebox-globalscale-guruplug.img
image-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) += barebox-globalscale-
guruplug-2nd.img
+HUANSHUO_HS50A_KWBOPTS = ${KWBOPTS} -i $(board)/huanshuo-hs50a/kwbimage.cfg
+OPTS_start_huanshuo_hs50a.pblb.kwbimg = $(HUANSHUO_HS50A_KWBOPTS)
+FILE_barebox-huanshuo-hs50a.img = start_huanshuo_hs50a.pblb.kwbimg
+FILE_barebox-huanshuo-hs50a-2nd.img = start_huanshuo_hs50a.pblb
+pblb-$(CONFIG_MACH_HUANSHUO_HS50A) += start_huanshuo_hs50a
+image-$(CONFIG_MACH_HUANSHUO_HS50A) += barebox-huanshuo-hs50a.img
+image-$(CONFIG_MACH_HUANSHUO_HS50A) += barebox-huanshuo-hs50a-2nd.img
+
PLATHOME_OPENBLOCKS_A6_KWBOPTS = ${KWBOPTS} -i $(board)/plathome-openblocks-
a6/kwbimage.cfg
OPTS_start_plathome_openblocks_a6.pblb.kwbimg = $
(PLATHOME_OPENBLOCKS_A6_KWBOPTS)
FILE_barebox-plathome-openblocks-a6.img =
start_plathome_openblocks_a6.pblb.kwbimg
--
2.26.0.rc2
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 9+ messages in thread
* bug report: fail to boot barebox in marvell 6281 board
@ 2020-03-31 16:24 you xiaojie
0 siblings, 0 replies; 9+ messages in thread
From: you xiaojie @ 2020-03-31 16:24 UTC (permalink / raw)
To: barebox
I ported barebox to a new board similar to guruplug, but it could not boot,
only show a line of barebox 2020.03.0-....., and I try official guruplug also
stopped. the devicetree is ok under linux 5.4 and the kwbimage.cfg is ok I
think, according to the 6281's datasheet and compared with the original
register value of machine.
so any can try guruplug's barebox? this is my porting patch, is there
something wrong?
From f2381a9855ae9db312aed52b1ab4d7343181e3b4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E5=B0=A4=E6=99=93=E6=9D=B0?= <yxj790222@163.com>
Date: Mon, 30 Mar 2020 01:32:31 +0800
Subject: [PATCH] Add support for Huanshuo HS-50A
---
arch/arm/boards/Makefile | 1 +
arch/arm/boards/huanshuo-hs50a/Makefile | 2 +
arch/arm/boards/huanshuo-hs50a/board.c | 17 +
arch/arm/boards/huanshuo-hs50a/kwbimage.cfg | 27 ++
arch/arm/boards/huanshuo-hs50a/lowlevel.c | 35 ++
arch/arm/configs/mvebu_defconfig | 1 +
arch/arm/dts/Makefile | 1 +
arch/arm/dts/kirkwood-huanshuo-hs50a-bb.dts | 16 +
arch/arm/mach-mvebu/Kconfig | 4 +
dts/src/arm/kirkwood-huanshuo-hs50a.dts | 348 ++++++++++++++++++++
images/Makefile.mvebu | 8 +
11 files changed, 460 insertions(+)
create mode 100644 arch/arm/boards/huanshuo-hs50a/Makefile
create mode 100644 arch/arm/boards/huanshuo-hs50a/board.c
create mode 100644 arch/arm/boards/huanshuo-hs50a/kwbimage.cfg
create mode 100644 arch/arm/boards/huanshuo-hs50a/lowlevel.c
create mode 100644 arch/arm/dts/kirkwood-huanshuo-hs50a-bb.dts
create mode 100644 dts/src/arm/kirkwood-huanshuo-hs50a.dts
diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 9fe458e0a..009dbd801 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -61,6 +61,7 @@ obj-$(CONFIG_MACH_GUF_VINCELL)
+= guf-vincell/
obj-$(CONFIG_MACH_GW_VENTANA) += gateworks-ventana/
obj-$(CONFIG_MACH_HABA_KNX_LITE) += haba-knx/
obj-$(CONFIG_MACH_HIGHBANK) += highbank/
+obj-$(CONFIG_MACH_HUANSHUO_HS50A) += huanshuo-hs50a/
obj-$(CONFIG_MACH_IMX21ADS) += freescale-mx21-ads/
obj-$(CONFIG_MACH_IMX233_OLINUXINO) += imx233-olinuxino/
obj-$(CONFIG_MACH_IMX27ADS) += freescale-mx27-ads/
diff --git a/arch/arm/boards/huanshuo-hs50a/Makefile b/arch/arm/boards/huanshuo-
hs50a/Makefile
new file mode 100644
index 000000000..01c7a259e
--- /dev/null
+++ b/arch/arm/boards/huanshuo-hs50a/Makefile
@@ -0,0 +1,2 @@
+obj-y += board.o
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/huanshuo-hs50a/board.c b/arch/arm/boards/huanshuo-
hs50a/board.c
new file mode 100644
index 000000000..9c800c541
--- /dev/null
+++ b/arch/arm/boards/huanshuo-hs50a/board.c
@@ -0,0 +1,17 @@
+/*
+ * Copyright
+ * (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+/* empty */
diff --git a/arch/arm/boards/huanshuo-hs50a/kwbimage.cfg b/arch/arm/boards/
huanshuo-hs50a/kwbimage.cfg
new file mode 100644
index 000000000..d0f3bdb01
--- /dev/null
+++ b/arch/arm/boards/huanshuo-hs50a/kwbimage.cfg
@@ -0,0 +1,27 @@
+VERSION 0
+BOOT_FROM nand
+NAND_ECCMODE default
+NAND_PAGESZ 00000800
+DATA ffd100e0 1b1b9b9b
+DATA ffd01400 43000c30
+DATA ffd01404 37543000
+DATA ffd01408 22125451
+DATA ffd0140c 00000a33
+DATA ffd01410 000000cc
+DATA ffd01414 00000000
+DATA ffd01418 00000000
+DATA ffd0141c 00000c52
+DATA ffd01420 00000040
+DATA ffd01424 0000f17f
+DATA ffd01428 00085520
+DATA ffd0147c 00008552
+DATA ffd01500 00000000
+DATA ffd01504 0ffffff1
+DATA ffd01508 10000000
+DATA ffd0150c 0ffffff5
+DATA ffd01514 00000000
+DATA ffd0151c 00000000
+DATA ffd01494 00030000
+DATA ffd01498 00000000
+DATA ffd0149c 0000e803
+DATA ffd01480 00000001
diff --git a/arch/arm/boards/huanshuo-hs50a/lowlevel.c b/arch/arm/boards/
huanshuo-hs50a/lowlevel.c
new file mode 100644
--- /dev/null
+++ b/arch/arm/boards/huanshuo-hs50a/lowlevel.c
@@ -0,0 +1,35 @@
+ * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+#include <linux/sizes.h>
+#include <asm/barebox-arm.h>
+#include <asm/barebox-arm-head.h>
+#include <mach/lowlevel.h>
+
+extern char __dtb_kirkwood_huanshuo_hs50a_bb_start[];
+
+ENTRY_FUNCTION(start_huanshuo_hs50a, r0, r1, r2)
+{
+ void *fdt;
+
+ arm_cpu_lowlevel_init();
+
+ fdt = __dtb_kirkwood_huanshuo_hs50a_bb_start +
+ get_runtime_offset();
+
+ kirkwood_barebox_entry(fdt);
+}
diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig
index c830cf2f0..2aff89a02 100644
--- a/arch/arm/configs/mvebu_defconfig
+++ b/arch/arm/configs/mvebu_defconfig
@@ -9,6 +9,7 @@ CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3=y
CONFIG_MACH_TURRIS_OMNIA=y
CONFIG_MACH_SOLIDRUN_CUBOX=y
CONFIG_MACH_GLOBALSCALE_GURUPLUG=y
+CONFIG_MACH_HUANSHUO_HS50A=y
CONFIG_MACH_PLATHOME_OPENBLOCKS_A6=y
CONFIG_MACH_USI_TOPKICK=y
CONFIG_AEABI=y
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ddfe64e83..b3bd5cdc4 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -30,6 +30,7 @@ lwl-dtb-$(CONFIG_MACH_GRINN_LITEBOARD) += imx6ul-
liteboard.dtb.o
lwl-dtb-$(CONFIG_MACH_GUF_SANTARO) += imx6q-guf-santaro.dtb.o
lwl-dtb-$(CONFIG_MACH_GUF_VINCELL) += imx53-guf-vincell.dtb.o imx53-guf-
vincell-lt.dtb.o
lwl-dtb-$(CONFIG_MACH_GW_VENTANA) += imx6q-gw54xx.dtb.o
+lwl-dtb-$(CONFIG_MACH_HUANSHUO_HS50A) += kirkwood-huanshuo-hs50a-bb.dtb.o
lwl-dtb-$(CONFIG_MACH_KONTRON_SAMX6I) += imx6q-samx6i.dtb.o \
imx6dl-samx6i.dtb.o
lwl-dtb-$(CONFIG_MACH_LENOVO_IX4_300D) += armada-xp-lenovo-ix4-300d-bb.dtb.o
diff --git a/arch/arm/dts/kirkwood-huanshuo-hs50a-bb.dts b/arch/arm/dts/
kirkwood-huanshuo-hs50a-bb.dts
new file mode 100644
--- /dev/null
+++ b/arch/arm/dts/kirkwood-huanshuo-hs50a-bb.dts
@@ -0,0 +1,16 @@
+ * Barebox specific DT overlay for HuanShuo HS-50A
+ * You Xiaojie <yxj790222@163.com>
+ */
+ gpio-leds {
+ health-r {
+ barebox,default-trigger = "heartbeat";
+ };
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index bab22f07f..9bd72dddb 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -102,6 +102,10 @@ config MACH_GLOBALSCALE_GURUPLUG
bool "Guruplug"
select ARCH_KIRKWOOD
+config MACH_HUANSHUO_HS50A
+ bool "Huanshuo HS-50A"
+ select ARCH_KIRKWOOD
+
config MACH_PLATHOME_OPENBLOCKS_A6
bool "PlatHome OpenBlocks A6"
select ARCH_KIRKWOOD
diff --git a/dts/src/arm/kirkwood-huanshuo-hs50a.dts b/dts/src/arm/kirkwood-
huanshuo-hs50a.dts
new file mode 100644
--- /dev/null
+++ b/dts/src/arm/kirkwood-huanshuo-hs50a.dts
@@ -0,0 +1,348 @@
+/* Device tree file for the HuanShuo HS-50A box.
+ *
+ * Copyright (c) 2019-2020 you_xiaojie <yxj790222@163.com>
+ * Based on Marvell RD88F6181 A Board descrition
+ * Andrew Lunn <andrew@lunn.ch>
+*/
+ model = "Huanshuo hs-50a";
+ compatible = "huanshuo,hs50a","marvell,rd88f6281-a",
"marvell,rd88f6281","marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+ bootargs = "console=ttyS0,115200n8 earlyprintk";
+ stdout-path = &uart0;
+ stdin-path = &uart0;
+ };
+ device_type = "memory";
+ reg = <0x00000000 0x20000000>; /* 512 MB */
+ pinctrl-0 = <&pmx_usben>;
+ pinctrl-names = "default";
+
+ usb_power: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+ };
+ compatible = "marvell,dsa";
+ #address-cells = <2>;
+ dsa,ethernet = <ð0port>;
+ dsa,mii-bus = <&mdio>;
+
+ reg = <10 0>; /* MDIO address 0x0a, switch 0
in tree */
+ label = "lan1";
+ };
+ label = "lan2";
+ };
+ label = "lan3";
+ };
+ label = "lan4";
+ };
+ label = "cpu";
+ fixed-link {
+ &nand {
+ status = "okay";
+ label = "ubi";
+ reg = <0x0400000 0x3c00000>;
+ &mdio {
+ status = "okay";
+ switch0: switch@11 {
+ status = "okay";
+ compatible = "marvell,mv88e6085";
+ pinctrl-0 = <&pmx_sw_irq_n>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
IRQ_TYPE_LEVEL_LOW>;
+ interrupt-parent = <&gpio1>;
+ interrupt-controller;
"lan1";
+ phy-handle =
<&sw0phy0>;
+ phy-mode =
"rgmii-id"; //optional rgmii is ok
+ };
"lan2";
+ phy-handle =
<&sw0phy1>;
+ phy-mode =
"rgmii-id"; //optional rgmii is ok
+ };
"lan3";
+ phy-handle =
<&sw0phy2>;
+ phy-mode =
"rgmii-id"; //optional rgmii is ok
+ };
"lan4";
+ phy-handle =
<&sw0phy3>;
+ phy-mode =
"rgmii-id"; //optional rgmii is ok
+ };
+ phy-handle =
<&sw0phy4>;
+ phy-mode =
"rgmii-id"; //optional rgmii is ok
+ };
"cpu";
+ ethernet =
<ð1port>;
+ phy-mode =
"rgmii-id"; //must set, otherwise no rx package
+ fixed-link {
+ ethernet =
<ð0port>;
+ phy-mode =
"rgmii-id"; //optional, set to rgmii no rx package
+ fixed-link {
+ mdio {
+ #address-cells = <1>;
+ sw0phy0: switch0phy0@0
{
<0 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ sw0phy1: switch0phy1@1
{
<1 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ sw0phy2: switch0phy2@2
{
<2 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ sw0phy3: switch0phy3@3
{
<3 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ sw0phy4: switch0phy4@4
{
"ethernet-phy-id0141.0e70"; //, ethernet-phy-ieee802.3-c22";
+ reg = <4>;
parent = <&switch0>;
+ interrupts =
<4 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ &pinctrl {
+ pinctrl-names = "default";
+
+ pmx_mpps:pmx-mpps {
+ marvell,pins = "mpp28", "mpp29",
"mpp36", "mpp39", "mpp45", "mpp47", "mpp48", "mpp49";
+ marvell,function = "gpio";
+ };
+ pmx_sysrsto_n:pmx-sysrstout-n {
+ marvell,pins = "mpp6";
+ marvell,function = "sysrst";
+ };
+ pmx_sata1_n:pmx-sata1-act-n {
+ marvell,pins = "mpp34";
+ marvell,function = "sata1";
+ };
+ pmx_sata0_n:pmx-sata0-act-n {
+ marvell,pins = "mpp35";
+ marvell,function = "sata0";
+ };
+ pmx_usben:pmx-usb-pwrenable {
+ marvell,pins = "mpp37";
+ marvell,function = "gpio";
+ };
+ pmx_sw_irq_n:pmx-switcher-irq-n {
+ marvell,pins = "mpp38";
+ marvell,function = "gpio";
+ };
+ pmx_fs_n:pmx-fanspeed-n {
+ marvell,pins = "mpp40";
+ marvell,function = "gpio";
+ };
+ pmx_usboc:pmx-usb-pwroc {
+ marvell,pins = "mpp41";
+ marvell,function = "gpio";
+ };
+ pmx_sdwp:pmx-sdio-wp {
+ marvell,pins = "mpp42";
+ marvell,function = "gpio";
+ };
+ pmx_sdcd_n:pmx-sdio-cd-n {
+ marvell,pins = "mpp43";
+ marvell,function = "gpio";
+ };
+ pmx_nfbusy_n:pmx-nfrb {
+ marvell,pins = "mpp44";
+ marvell,function = "gpio";
+ };
+ pmx_mpps:pmx-mpps {
+ marvell,pins = "mpp46";
+ marvell,function = "gpio";
+ };
+ &gpio0 {
+ gpio-line-names = "NF_IO2", "NF_IO3",
"NF_IO4", "NF_IO5", "NF_IO6", "NF_IO7", "SYSRST_On", "", "TW_SDA", "TW_SCK",
"UA0_TXD", "UA0_RXD", "SD_CLK", "SD_CMD", "SD_D0", "SD_D1", "SD_D2", "SD_D3",
"NF_IO0", "NF_IO1", "RGMII1_TXD0", "RGMII1_TXD1", "RGMII1_TXD2",
"RGMII1_TXD3", "RGMII1_RXD0", "RGMII1_RXD1", "RGMII1_RXD2", "RGMII1_RXD3", "",
"", "RGMII1_RXCTL", "RGMII1_RXCLK";
+ };
+ &gpio1 {
+ gpio-line-names = "RGMII1_TXCLKOUT",
"RGMII1_TXCTL", "SATA1_ACTn", "SATA0_ACTn", "", "USB_EN", "SWITCH_IRQn", "",
"FAN_SPEEDn", "USB_OC", "SDWP", "SDCDn", "NFRB", "", "", "", "", "";
+ };
+ &i2c0 {
+ status = "okay";
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ pagesize = <32>;
+ };
+ &sdio {
+ status = "okay";
+ pinctrl-0 = <&pmx_sdio &pmx_sdcd_n
&pmx_sdwp>;
+ pinctrl-names = "default";
+ cd-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+ };
+ &sata {
+ status = "okay";
+ pinctrl-0 = <&pmx_sata0_n &pmx_sata1_n>;
+ nr-ports = <2>;
+ };
+ &uart0 {
+ status = "okay";
+ &pciec {
+ status = "okay";
+ &pcie0 {
+ status = "okay";
+ compatible = "pci168c,abcd";
+ reg = <0x7000 0 0 0 0x1000>;
+ qca,no-eeprom;
+ };
+ /* eth0 is connected to a Marvell 88E6171 switch,
without a PHY. So set
+ * fixed speed and duplex.
+ ð0 {
+ status = "okay";
+ ð0port {
+ speed = <1000>;
+ ð1 {
+ status = "okay";
+ ð1port {
+ speed = <1000>;
diff --git a/images/Makefile.mvebu b/images/Makefile.mvebu
index 112227424..2d8f66407 100644
--- a/images/Makefile.mvebu
+++ b/images/Makefile.mvebu
@@ -110,6 +110,14 @@ pblb-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) +=
start_globalscale_guruplug
image-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) += barebox-globalscale-guruplug.img
image-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) += barebox-globalscale-
guruplug-2nd.img
+HUANSHUO_HS50A_KWBOPTS = ${KWBOPTS} -i $(board)/huanshuo-hs50a/kwbimage.cfg
+OPTS_start_huanshuo_hs50a.pblb.kwbimg = $(HUANSHUO_HS50A_KWBOPTS)
+FILE_barebox-huanshuo-hs50a.img = start_huanshuo_hs50a.pblb.kwbimg
+FILE_barebox-huanshuo-hs50a-2nd.img = start_huanshuo_hs50a.pblb
+pblb-$(CONFIG_MACH_HUANSHUO_HS50A) += start_huanshuo_hs50a
+image-$(CONFIG_MACH_HUANSHUO_HS50A) += barebox-huanshuo-hs50a.img
+image-$(CONFIG_MACH_HUANSHUO_HS50A) += barebox-huanshuo-hs50a-2nd.img
+
PLATHOME_OPENBLOCKS_A6_KWBOPTS = ${KWBOPTS} -i $(board)/plathome-openblocks-
a6/kwbimage.cfg
OPTS_start_plathome_openblocks_a6.pblb.kwbimg = $
(PLATHOME_OPENBLOCKS_A6_KWBOPTS)
FILE_barebox-plathome-openblocks-a6.img =
start_plathome_openblocks_a6.pblb.kwbimg
--
2.26.0.rc2
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^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2020-04-02 10:58 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-03-31 16:12 bug report: fail to boot barebox in marvell 6281 board you xiaojie
2020-04-01 6:08 ` Sascha Hauer
2020-03-31 16:24 you xiaojie
2020-03-31 16:30 youxiaojie
2020-04-02 7:03 ` you xiaojie
2020-04-02 7:41 ` Sascha Hauer
2020-04-02 8:02 ` you xiaojie
2020-04-02 9:25 ` Sascha Hauer
2020-04-02 10:58 ` you xiaojie
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