* [PATCH 0/7] remoteproc: Add i.MX8M Cortex-M[47] support
@ 2020-10-05 9:53 Sascha Hauer
2020-10-05 9:53 ` [PATCH 1/7] remoteproc: imx: Fix off-by-one error Sascha Hauer
` (6 more replies)
0 siblings, 7 replies; 12+ messages in thread
From: Sascha Hauer @ 2020-10-05 9:53 UTC (permalink / raw)
To: Barebox List
The i.MX8M SoCs have a Cortex-M4 or a Cortex-M7 coprocessor equipped.
This series adds support for them to the existing i.MX remoteproc
driver.
Sascha Hauer (7):
remoteproc: imx: Fix off-by-one error
remoteproc: imx: Change SoC order in code
remoteproc: imx: use function hooks in SoC data
remoteproc: imx: Add i.MX8M support
clk: i.MX8MQ: Add Cortex-M4 clk
ARM: dts: i.MX8MQ: Add Cortex-M4 Coprocessor node
ARM: dts: i.MX8MP: Add Cortex-M7 Coprocessor node
arch/arm/dts/imx8mp-evk.dts | 1 +
arch/arm/dts/imx8mp.dtsi | 9 ++
arch/arm/dts/imx8mq.dtsi | 8 ++
drivers/clk/imx/clk-imx8mq.c | 5 +
drivers/remoteproc/imx_rproc.c | 251 ++++++++++++++++++++++++++-------
5 files changed, 220 insertions(+), 54 deletions(-)
create mode 100644 arch/arm/dts/imx8mp.dtsi
--
2.28.0
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 1/7] remoteproc: imx: Fix off-by-one error
2020-10-05 9:53 [PATCH 0/7] remoteproc: Add i.MX8M Cortex-M[47] support Sascha Hauer
@ 2020-10-05 9:53 ` Sascha Hauer
2020-10-05 12:23 ` Lucas Stach
2020-10-05 9:53 ` [PATCH 2/7] remoteproc: imx: Change SoC order in code Sascha Hauer
` (5 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Sascha Hauer @ 2020-10-05 9:53 UTC (permalink / raw)
To: Barebox List
size is actually end - start + 1, fix size passed to
request_sdram_region().
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/remoteproc/imx_rproc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index 370bebe6e2..74a8d8ff2e 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -305,7 +305,7 @@ static int imx_rproc_addr_init(struct imx_rproc *priv,
break;
res_cpu = request_sdram_region(dev_name(dev), res.start,
- res.end - res.start);
+ res.end - res.start + 1);
if (!res_cpu) {
dev_err(dev, "remap optional addresses failed\n");
return -ENOMEM;
--
2.28.0
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 2/7] remoteproc: imx: Change SoC order in code
2020-10-05 9:53 [PATCH 0/7] remoteproc: Add i.MX8M Cortex-M[47] support Sascha Hauer
2020-10-05 9:53 ` [PATCH 1/7] remoteproc: imx: Fix off-by-one error Sascha Hauer
@ 2020-10-05 9:53 ` Sascha Hauer
2020-10-05 9:53 ` [PATCH 3/7] remoteproc: imx: use function hooks in SoC data Sascha Hauer
` (4 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Sascha Hauer @ 2020-10-05 9:53 UTC (permalink / raw)
To: Barebox List
Sort the SoC specific functions alphabetically to have a more natural
order before adding more SoCs to the driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/remoteproc/imx_rproc.c | 58 +++++++++++++++++-----------------
1 file changed, 29 insertions(+), 29 deletions(-)
diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index 74a8d8ff2e..fb27d25d8e 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -94,6 +94,27 @@ struct imx_rproc {
struct clk *clk;
};
+static const struct imx_rproc_att imx_rproc_att_imx6sx[] = {
+ /* dev addr , sys addr , size , flags */
+ /* TCML (M4 Boot Code) - alias */
+ { 0x00000000, 0x007F8000, 0x00008000, 0 },
+ /* OCRAM_S (Code) */
+ { 0x00180000, 0x008F8000, 0x00004000, 0 },
+ /* OCRAM_S (Code) - alias */
+ { 0x00180000, 0x008FC000, 0x00004000, 0 },
+ /* TCML (Code) */
+ { 0x1FFF8000, 0x007F8000, 0x00008000, ATT_OWN },
+ /* DDR (Code) - alias, first part of DDR (Data) */
+ { 0x10000000, 0x80000000, 0x0FFF8000, 0 },
+
+ /* TCMU (Data) */
+ { 0x20000000, 0x00800000, 0x00008000, ATT_OWN },
+ /* OCRAM_S (Data) - alias? */
+ { 0x208F8000, 0x008F8000, 0x00004000, 0 },
+ /* DDR (Data) */
+ { 0x80000000, 0x80000000, 0x60000000, 0 },
+};
+
static const struct imx_rproc_att imx_rproc_att_imx7d[] = {
/* dev addr , sys addr , size , flags */
/* OCRAM_S (M4 Boot code) - alias */
@@ -123,25 +144,13 @@ static const struct imx_rproc_att imx_rproc_att_imx7d[] = {
{ 0x80000000, 0x80000000, 0x60000000, 0 },
};
-static const struct imx_rproc_att imx_rproc_att_imx6sx[] = {
- /* dev addr , sys addr , size , flags */
- /* TCML (M4 Boot Code) - alias */
- { 0x00000000, 0x007F8000, 0x00008000, 0 },
- /* OCRAM_S (Code) */
- { 0x00180000, 0x008F8000, 0x00004000, 0 },
- /* OCRAM_S (Code) - alias */
- { 0x00180000, 0x008FC000, 0x00004000, 0 },
- /* TCML (Code) */
- { 0x1FFF8000, 0x007F8000, 0x00008000, ATT_OWN },
- /* DDR (Code) - alias, first part of DDR (Data) */
- { 0x10000000, 0x80000000, 0x0FFF8000, 0 },
-
- /* TCMU (Data) */
- { 0x20000000, 0x00800000, 0x00008000, ATT_OWN },
- /* OCRAM_S (Data) - alias? */
- { 0x208F8000, 0x008F8000, 0x00004000, 0 },
- /* DDR (Data) */
- { 0x80000000, 0x80000000, 0x60000000, 0 },
+static const struct imx_rproc_dcfg imx_rproc_cfg_imx6sx = {
+ .src_reg = IMX6SX_SRC_SCR,
+ .src_mask = IMX6SX_M4_RST_MASK,
+ .src_start = IMX6SX_M4_START,
+ .src_stop = IMX6SX_M4_STOP,
+ .att = imx_rproc_att_imx6sx,
+ .att_size = ARRAY_SIZE(imx_rproc_att_imx6sx),
};
static const struct imx_rproc_dcfg imx_rproc_cfg_imx7d = {
@@ -153,15 +162,6 @@ static const struct imx_rproc_dcfg imx_rproc_cfg_imx7d = {
.att_size = ARRAY_SIZE(imx_rproc_att_imx7d),
};
-static const struct imx_rproc_dcfg imx_rproc_cfg_imx6sx = {
- .src_reg = IMX6SX_SRC_SCR,
- .src_mask = IMX6SX_M4_RST_MASK,
- .src_start = IMX6SX_M4_START,
- .src_stop = IMX6SX_M4_STOP,
- .att = imx_rproc_att_imx6sx,
- .att_size = ARRAY_SIZE(imx_rproc_att_imx6sx),
-};
-
static int imx_rproc_start(struct rproc *rproc)
{
struct imx_rproc *priv = rproc->priv;
@@ -389,8 +389,8 @@ err_put_rproc:
}
static const struct of_device_id imx_rproc_of_match[] = {
- { .compatible = "fsl,imx7d-cm4", .data = &imx_rproc_cfg_imx7d },
{ .compatible = "fsl,imx6sx-cm4", .data = &imx_rproc_cfg_imx6sx },
+ { .compatible = "fsl,imx7d-cm4", .data = &imx_rproc_cfg_imx7d },
{},
};
--
2.28.0
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 3/7] remoteproc: imx: use function hooks in SoC data
2020-10-05 9:53 [PATCH 0/7] remoteproc: Add i.MX8M Cortex-M[47] support Sascha Hauer
2020-10-05 9:53 ` [PATCH 1/7] remoteproc: imx: Fix off-by-one error Sascha Hauer
2020-10-05 9:53 ` [PATCH 2/7] remoteproc: imx: Change SoC order in code Sascha Hauer
@ 2020-10-05 9:53 ` Sascha Hauer
2020-10-05 9:53 ` [PATCH 4/7] remoteproc: imx: Add i.MX8M support Sascha Hauer
` (3 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Sascha Hauer @ 2020-10-05 9:53 UTC (permalink / raw)
To: Barebox List
Replace the register offset/masks/values in driver data with function
hooks to prepare the driver for adding SoCs that do not fit into this
one-register-write scheme.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/remoteproc/imx_rproc.c | 79 +++++++++++++++++++++-------------
1 file changed, 48 insertions(+), 31 deletions(-)
diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index fb27d25d8e..86eba4fcd4 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -43,9 +43,6 @@
#define IMX6SX_SW_M4C_NON_SCLR_RST BIT(4)
#define IMX6SX_SW_M4C_RST BIT(3)
-#define IMX6SX_M4_START (IMX6SX_ENABLE_M4 | IMX6SX_SW_M4P_RST \
- | IMX6SX_SW_M4C_RST)
-#define IMX6SX_M4_STOP IMX6SX_SW_M4C_NON_SCLR_RST
#define IMX6SX_M4_RST_MASK (IMX6SX_ENABLE_M4 | IMX6SX_SW_M4P_RST \
| IMX6SX_SW_M4C_NON_SCLR_RST \
| IMX6SX_SW_M4C_RST)
@@ -77,12 +74,10 @@ struct imx_rproc_att {
};
struct imx_rproc_dcfg {
- u32 src_reg;
- u32 src_mask;
- u32 src_start;
- u32 src_stop;
const struct imx_rproc_att *att;
size_t att_size;
+ int (*rproc_start)(struct rproc *rproc);
+ int (*rproc_stop)(struct rproc *rproc);
};
struct imx_rproc {
@@ -144,52 +139,74 @@ static const struct imx_rproc_att imx_rproc_att_imx7d[] = {
{ 0x80000000, 0x80000000, 0x60000000, 0 },
};
+static int imx6sx_rproc_start(struct rproc *rproc)
+{
+ struct imx_rproc *priv = rproc->priv;
+
+ return regmap_update_bits(priv->regmap,
+ IMX6SX_SRC_SCR,
+ IMX6SX_M4_RST_MASK,
+ IMX6SX_ENABLE_M4 | IMX6SX_SW_M4P_RST | IMX6SX_SW_M4C_RST);
+}
+
+static int imx6sx_rproc_stop(struct rproc *rproc)
+{
+ struct imx_rproc *priv = rproc->priv;
+
+ return regmap_update_bits(priv->regmap,
+ IMX6SX_SRC_SCR,
+ IMX6SX_M4_RST_MASK,
+ IMX6SX_SW_M4C_NON_SCLR_RST);
+}
+
+static int imx7d_rproc_start(struct rproc *rproc)
+{
+ struct imx_rproc *priv = rproc->priv;
+
+ return regmap_update_bits(priv->regmap,
+ IMX7D_SRC_SCR,
+ IMX7D_M4_RST_MASK,
+ IMX7D_M4_START);
+}
+
+static int imx7d_rproc_stop(struct rproc *rproc)
+{
+ struct imx_rproc *priv = rproc->priv;
+
+ return regmap_update_bits(priv->regmap,
+ IMX7D_SRC_SCR,
+ IMX7D_M4_RST_MASK,
+ IMX7D_M4_STOP);
+}
+
static const struct imx_rproc_dcfg imx_rproc_cfg_imx6sx = {
- .src_reg = IMX6SX_SRC_SCR,
- .src_mask = IMX6SX_M4_RST_MASK,
- .src_start = IMX6SX_M4_START,
- .src_stop = IMX6SX_M4_STOP,
.att = imx_rproc_att_imx6sx,
.att_size = ARRAY_SIZE(imx_rproc_att_imx6sx),
+ .rproc_start = imx6sx_rproc_start,
+ .rproc_stop = imx6sx_rproc_stop,
};
static const struct imx_rproc_dcfg imx_rproc_cfg_imx7d = {
- .src_reg = IMX7D_SRC_SCR,
- .src_mask = IMX7D_M4_RST_MASK,
- .src_start = IMX7D_M4_START,
- .src_stop = IMX7D_M4_STOP,
.att = imx_rproc_att_imx7d,
.att_size = ARRAY_SIZE(imx_rproc_att_imx7d),
+ .rproc_start = imx7d_rproc_start,
+ .rproc_stop = imx7d_rproc_stop,
};
static int imx_rproc_start(struct rproc *rproc)
{
struct imx_rproc *priv = rproc->priv;
const struct imx_rproc_dcfg *dcfg = priv->dcfg;
- struct device_d *dev = priv->dev;
- int ret;
-
- ret = regmap_update_bits(priv->regmap, dcfg->src_reg,
- dcfg->src_mask, dcfg->src_start);
- if (ret)
- dev_err(dev, "Failed to enable M4!\n");
- return ret;
+ return dcfg->rproc_start(rproc);
}
static int imx_rproc_stop(struct rproc *rproc)
{
struct imx_rproc *priv = rproc->priv;
const struct imx_rproc_dcfg *dcfg = priv->dcfg;
- struct device_d *dev = priv->dev;
- int ret;
-
- ret = regmap_update_bits(priv->regmap, dcfg->src_reg,
- dcfg->src_mask, dcfg->src_stop);
- if (ret)
- dev_err(dev, "Failed to stop M4!\n");
- return ret;
+ return dcfg->rproc_stop(rproc);
}
static int imx_rproc_da_to_sys(struct imx_rproc *priv, u64 da,
--
2.28.0
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* [PATCH 4/7] remoteproc: imx: Add i.MX8M support
2020-10-05 9:53 [PATCH 0/7] remoteproc: Add i.MX8M Cortex-M[47] support Sascha Hauer
` (2 preceding siblings ...)
2020-10-05 9:53 ` [PATCH 3/7] remoteproc: imx: use function hooks in SoC data Sascha Hauer
@ 2020-10-05 9:53 ` Sascha Hauer
2020-10-05 9:53 ` [PATCH 5/7] clk: i.MX8MQ: Add Cortex-M4 clk Sascha Hauer
` (2 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Sascha Hauer @ 2020-10-05 9:53 UTC (permalink / raw)
To: Barebox List
This adds support for the different i.MX8M SoCs to the i.MX rproc
driver. i.MX8MM and i.MX8MQ can be handled like the i.MX7D with a
different address space map. i.MX8MN and i.MX8MP are different though.
Unlike the other SoCs which have a Cortex-M4 Coprocessor these have
a Cortex-M7 Coprocessor. On these SoCs the TCM is only accessible when
the Coprocessor is already started. A bit in the IOMUX GPR register
space is needed to hold the CPU in wait mode until we uploaded the code
to the TCM.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/remoteproc/imx_rproc.c | 126 +++++++++++++++++++++++++++++++++
1 file changed, 126 insertions(+)
diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index 86eba4fcd4..726e16d6d4 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -76,6 +76,7 @@ struct imx_rproc_att {
struct imx_rproc_dcfg {
const struct imx_rproc_att *att;
size_t att_size;
+ int (*rproc_init)(struct rproc *rproc);
int (*rproc_start)(struct rproc *rproc);
int (*rproc_stop)(struct rproc *rproc);
};
@@ -83,6 +84,7 @@ struct imx_rproc_dcfg {
struct imx_rproc {
struct device_d *dev;
struct regmap *regmap;
+ struct regmap *gpr;
struct rproc *rproc;
const struct imx_rproc_dcfg *dcfg;
struct imx_rproc_mem mem[IMX7D_RPROC_MEM_MAX];
@@ -139,6 +141,39 @@ static const struct imx_rproc_att imx_rproc_att_imx7d[] = {
{ 0x80000000, 0x80000000, 0x60000000, 0 },
};
+static const struct imx_rproc_att imx_rproc_att_imx8mn[] = {
+ /* dev addr , sys addr , size , flags */
+ { 0x00000000, 0x007e0000, 0x00020000, ATT_OWN }, /* ITCM */
+ { 0x00180000, 0x00180000, 0x00009000, 0 }, /* OCRAM_S */
+ { 0x00900000, 0x00900000, 0x00020000, 0 }, /* OCRAM */
+ { 0x00920000, 0x00920000, 0x00020000, 0 }, /* OCRAM */
+ { 0x00940000, 0x00940000, 0x00050000, 0 }, /* OCRAM */
+ { 0x08000000, 0x08000000, 0x08000000, 0 }, /* QSPI Code - alias */
+ { 0x10000000, 0x80000000, 0x0ffe0000, 0 }, /* DDR (Code) - alias */
+ { 0x20000000, 0x00800000, 0x00020000, ATT_OWN }, /* DTCM */
+ { 0x20180000, 0x00180000, 0x00008000, ATT_OWN }, /* OCRAM_S - alias */
+ { 0x20200000, 0x00900000, 0x00020000, ATT_OWN }, /* OCRAM */
+ { 0x20220000, 0x00920000, 0x00020000, ATT_OWN }, /* OCRAM */
+ { 0x20240000, 0x00940000, 0x00040000, ATT_OWN }, /* OCRAM */
+ { 0x40000000, 0x40000000, 0x80000000, 0 }, /* DDR (Data) */
+};
+
+static const struct imx_rproc_att imx_rproc_att_imx8mq[] = {
+ /* dev addr , sys addr , size , flags */
+ { 0x00000000, 0x007e0000, 0x00020000, 0 }, /* TCML - alias */
+ { 0x00180000, 0x00180000, 0x00008000, 0 }, /* OCRAM_S */
+ { 0x00900000, 0x00900000, 0x00020000, 0 }, /* OCRAM */
+ { 0x00920000, 0x00920000, 0x00020000, 0 }, /* OCRAM */
+ { 0x08000000, 0x08000000, 0x08000000, 0 }, /* QSPI Code - alias */
+ { 0x10000000, 0x80000000, 0x0ffe0000, 0 }, /* DDR (Code) - alias */
+ { 0x1ffe0000, 0x007e0000, 0x00020000, ATT_OWN }, /* TCML */
+ { 0x20000000, 0x00800000, 0x00020000, ATT_OWN }, /* TCMU */
+ { 0x20180000, 0x00180000, 0x00008000, ATT_OWN }, /* OCRAM_S */
+ { 0x20200000, 0x00900000, 0x00020000, ATT_OWN }, /* OCRAM */
+ { 0x20220000, 0x00920000, 0x00020000, ATT_OWN }, /* OCRAM */
+ { 0x40000000, 0x40000000, 0x80000000, 0 }, /* DDR (Data) */
+};
+
static int imx6sx_rproc_start(struct rproc *rproc)
{
struct imx_rproc *priv = rproc->priv;
@@ -179,6 +214,72 @@ static int imx7d_rproc_stop(struct rproc *rproc)
IMX7D_M4_STOP);
}
+#define IOMUXC_GPR22 0x58
+#define IOMUXC_GPR22_CM7_CPUWAIT BIT(0)
+
+static int imx8mn_cm7_wait(struct rproc *rproc, bool wait)
+{
+ struct imx_rproc *priv = rproc->priv;
+
+ return regmap_update_bits(priv->gpr,
+ IOMUXC_GPR22,
+ IOMUXC_GPR22_CM7_CPUWAIT,
+ wait ? IOMUXC_GPR22_CM7_CPUWAIT : 0);
+}
+
+static int imx8mn_rproc_start(struct rproc *rproc)
+{
+ struct imx_rproc *priv = rproc->priv;
+ int ret;
+
+ ret = regmap_update_bits(priv->regmap,
+ IMX7D_SRC_SCR,
+ IMX7D_M4_RST_MASK,
+ IMX7D_ENABLE_M4 | IMX7D_SW_M4C_RST);
+ if (ret)
+ return ret;
+
+ ret = imx8mn_cm7_wait(rproc, false);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int imx8mn_rproc_stop(struct rproc *rproc)
+{
+ struct imx_rproc *priv = rproc->priv;
+ int ret;
+
+ ret = imx8mn_cm7_wait(rproc, true);
+ if (ret)
+ return ret;
+
+ return regmap_update_bits(priv->regmap,
+ IMX7D_SRC_SCR,
+ IMX7D_M4_RST_MASK,
+ IMX7D_ENABLE_M4 | IMX7D_SW_M4C_RST | IMX7D_SW_M4C_NON_SCLR_RST);
+}
+
+static int imx8mn_rproc_init(struct rproc *rproc)
+{
+ struct imx_rproc *priv = rproc->priv;
+ int ret;
+
+ priv->gpr = syscon_regmap_lookup_by_compatible("fsl,imx8mp-iomuxc-gpr");
+ if (IS_ERR(priv->gpr))
+ return PTR_ERR(priv->gpr);
+
+ ret = imx8mn_cm7_wait(rproc, true);
+ if (ret)
+ return ret;
+
+ return regmap_update_bits(priv->regmap,
+ IMX7D_SRC_SCR,
+ IMX7D_M4_RST_MASK,
+ IMX7D_ENABLE_M4 | IMX7D_SW_M4C_RST);
+}
+
static const struct imx_rproc_dcfg imx_rproc_cfg_imx6sx = {
.att = imx_rproc_att_imx6sx,
.att_size = ARRAY_SIZE(imx_rproc_att_imx6sx),
@@ -193,6 +294,21 @@ static const struct imx_rproc_dcfg imx_rproc_cfg_imx7d = {
.rproc_stop = imx7d_rproc_stop,
};
+static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn = {
+ .att = imx_rproc_att_imx8mn,
+ .att_size = ARRAY_SIZE(imx_rproc_att_imx8mn),
+ .rproc_init = imx8mn_rproc_init,
+ .rproc_start = imx8mn_rproc_start,
+ .rproc_stop = imx8mn_rproc_stop,
+};
+
+static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mq = {
+ .att = imx_rproc_att_imx8mq,
+ .att_size = ARRAY_SIZE(imx_rproc_att_imx8mq),
+ .rproc_start = imx7d_rproc_start,
+ .rproc_stop = imx7d_rproc_stop,
+};
+
static int imx_rproc_start(struct rproc *rproc)
{
struct imx_rproc *priv = rproc->priv;
@@ -391,6 +507,12 @@ static int imx_rproc_probe(struct device_d *dev)
goto err_put_rproc;
}
+ if (dcfg->rproc_init) {
+ ret = dcfg->rproc_init(rproc);
+ if (ret)
+ goto err_put_clk;
+ }
+
ret = rproc_add(rproc);
if (ret) {
dev_err(dev, "rproc_add failed\n");
@@ -408,6 +530,10 @@ err_put_rproc:
static const struct of_device_id imx_rproc_of_match[] = {
{ .compatible = "fsl,imx6sx-cm4", .data = &imx_rproc_cfg_imx6sx },
{ .compatible = "fsl,imx7d-cm4", .data = &imx_rproc_cfg_imx7d },
+ { .compatible = "fsl,imx8mm-cm4", .data = &imx_rproc_cfg_imx8mq },
+ { .compatible = "fsl,imx8mn-cm7", .data = &imx_rproc_cfg_imx8mn },
+ { .compatible = "fsl,imx8mp-cm7", .data = &imx_rproc_cfg_imx8mn },
+ { .compatible = "fsl,imx8mq-cm4", .data = &imx_rproc_cfg_imx8mq },
{},
};
--
2.28.0
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 5/7] clk: i.MX8MQ: Add Cortex-M4 clk
2020-10-05 9:53 [PATCH 0/7] remoteproc: Add i.MX8M Cortex-M[47] support Sascha Hauer
` (3 preceding siblings ...)
2020-10-05 9:53 ` [PATCH 4/7] remoteproc: imx: Add i.MX8M support Sascha Hauer
@ 2020-10-05 9:53 ` Sascha Hauer
2020-10-05 9:53 ` [PATCH 6/7] ARM: dts: i.MX8MQ: Add Cortex-M4 Coprocessor node Sascha Hauer
2020-10-05 9:53 ` [PATCH 7/7] ARM: dts: i.MX8MP: Add Cortex-M7 " Sascha Hauer
6 siblings, 0 replies; 12+ messages in thread
From: Sascha Hauer @ 2020-10-05 9:53 UTC (permalink / raw)
To: Barebox List
Needed for the remoteproc driver on this SoC.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/clk/imx/clk-imx8mq.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index 016d405e90..4072faacaf 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -255,6 +255,9 @@ static const char *imx8mq_dram_core_sels[] = {"dram_pll_out", "dram_alt_root", }
static const char *imx8mq_clko2_sels[] = {"osc_25m", "sys2_pll_200m", "sys1_pll_400m", "sys2_pll_166m", "audio_pll1_out",
"video_pll1_out", "ckil", };
+static const char * const imx8mq_arm_m4_sels[] = {"osc_25m", "sys2_pll_200m",
+ "sys2_pll_250m", "sys1_pll_266m", "sys1_pll_800m", "audio_pll1_out",
+ "video_pll1_out", "sys3_pll_out", };
static struct clk_onecell_data clk_data;
@@ -552,6 +555,8 @@ static int imx8mq_clocks_init(struct device_node *ccm_node)
clks[IMX8MQ_CLK_SDMA1_ROOT] = imx_clk_gate4("sdma1_clk", "ipg_root", base + 0x43a0, 0);
clks[IMX8MQ_CLK_SDMA2_ROOT] = imx_clk_gate4("sdma2_clk", "ipg_audio_root", base + 0x43b0, 0);
+ clks[IMX8MQ_CLK_M4_CORE] = imx8m_clk_hw_composite_core("arm_m4_core", imx8mq_arm_m4_sels, base + 0x8080);
+
clks[IMX8MQ_GPT_3M_CLK] = imx_clk_fixed_factor("gpt_3m", "osc_25m", 1, 8);
clks[IMX8MQ_CLK_DRAM_ALT_ROOT] = imx_clk_fixed_factor("dram_alt_root", "dram_alt", 1, 4);
--
2.28.0
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 6/7] ARM: dts: i.MX8MQ: Add Cortex-M4 Coprocessor node
2020-10-05 9:53 [PATCH 0/7] remoteproc: Add i.MX8M Cortex-M[47] support Sascha Hauer
` (4 preceding siblings ...)
2020-10-05 9:53 ` [PATCH 5/7] clk: i.MX8MQ: Add Cortex-M4 clk Sascha Hauer
@ 2020-10-05 9:53 ` Sascha Hauer
2020-10-05 12:05 ` Rouven Czerwinski
2020-10-05 9:53 ` [PATCH 7/7] ARM: dts: i.MX8MP: Add Cortex-M7 " Sascha Hauer
6 siblings, 1 reply; 12+ messages in thread
From: Sascha Hauer @ 2020-10-05 9:53 UTC (permalink / raw)
To: Barebox List
The i.MX8MQ has a Cortex-M7 Coprocessor. Add a node for controlling it.
To make use of it the board has to provide the reserved memory nodes,
for example:
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
m4_reserved: m7@0x40000000 {
no-map;
reg = <0 0x40000000 0 0x1000000>;
};
m4_reserved_sysmem3: rproc@80000000 {
reg = <0 0x80000000 0 0x800000>;
no-map;
};
};
&remoteproc_cm4 {
memory-region = <&m4_reserved>, <&m4_reserved_sysmem3>;
};
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/dts/imx8mq.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/imx8mq.dtsi b/arch/arm/dts/imx8mq.dtsi
index 5f2df35bc9..ec8347f38f 100644
--- a/arch/arm/dts/imx8mq.dtsi
+++ b/arch/arm/dts/imx8mq.dtsi
@@ -4,6 +4,14 @@
* Copyright (C) 2017 Pengutronix, Lucas Stach <kernel@pengutronix.de>
*/
+/ {
+ remoteproc_cm4: remoteproc-cm4 {
+ compatible = "fsl,imx8mq-cm4";
+ clocks = <&clk IMX8MQ_CLK_M4_CORE>;
+ syscon = <&src>;
+ };
+};
+
&clk {
assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>,
<&clk IMX8MQ_CLK_USDHC2>,
--
2.28.0
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 7/7] ARM: dts: i.MX8MP: Add Cortex-M7 Coprocessor node
2020-10-05 9:53 [PATCH 0/7] remoteproc: Add i.MX8M Cortex-M[47] support Sascha Hauer
` (5 preceding siblings ...)
2020-10-05 9:53 ` [PATCH 6/7] ARM: dts: i.MX8MQ: Add Cortex-M4 Coprocessor node Sascha Hauer
@ 2020-10-05 9:53 ` Sascha Hauer
6 siblings, 0 replies; 12+ messages in thread
From: Sascha Hauer @ 2020-10-05 9:53 UTC (permalink / raw)
To: Barebox List
The i.MX8MQ has a Cortex-M7 Coprocessor. Add a node for controlling it.
To make use of it the board has to provide the reserved memory nodes,
for example:
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
m7_reserved_sysmem1: rproc@40000000 {
reg = <0 0x40000000 0 0x800000>;
no-map;
};
m7_reserved_sysmem2: rproc@40800000 {
reg = <0 0x40800000 0 0x800000>;
no-map;
};
m7_reserved_sysmem3: rproc@80000000 {
reg = <0 0x80000000 0 0x800000>;
no-map;
};
};
&remoteproc_cm7 {
memory-region = <&m7_reserved_sysmem1>, <&m7_reserved_sysmem2>, <&m7_reserved_sysmem3>;
};
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/dts/imx8mp-evk.dts | 1 +
arch/arm/dts/imx8mp.dtsi | 9 +++++++++
2 files changed, 10 insertions(+)
create mode 100644 arch/arm/dts/imx8mp.dtsi
diff --git a/arch/arm/dts/imx8mp-evk.dts b/arch/arm/dts/imx8mp-evk.dts
index bb255e2c94..3264ade4b8 100644
--- a/arch/arm/dts/imx8mp-evk.dts
+++ b/arch/arm/dts/imx8mp-evk.dts
@@ -7,6 +7,7 @@
/dts-v1/;
#include <arm64/freescale/imx8mp-evk.dts>
+#include "imx8mp.dtsi"
/ {
chosen {
diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi
new file mode 100644
index 0000000000..b251ebeada
--- /dev/null
+++ b/arch/arm/dts/imx8mp.dtsi
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+/ {
+ remoteproc_cm7: remoteproc-cm7 {
+ compatible = "fsl,imx8mp-cm7";
+ clocks = <&clk IMX8MP_CLK_M7_CORE>;
+ syscon = <&src>;
+ };
+};
--
2.28.0
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 6/7] ARM: dts: i.MX8MQ: Add Cortex-M4 Coprocessor node
2020-10-05 9:53 ` [PATCH 6/7] ARM: dts: i.MX8MQ: Add Cortex-M4 Coprocessor node Sascha Hauer
@ 2020-10-05 12:05 ` Rouven Czerwinski
2020-10-07 7:07 ` Sascha Hauer
0 siblings, 1 reply; 12+ messages in thread
From: Rouven Czerwinski @ 2020-10-05 12:05 UTC (permalink / raw)
To: Sascha Hauer, Barebox List
On Mon, 2020-10-05 at 11:53 +0200, Sascha Hauer wrote:
> The i.MX8MQ has a Cortex-M7 Coprocessor. Add a node for controlling
Copy paste error from MX8MP ^ schould be Cortex-M4.
> it.
> To make use of it the board has to provide the reserved memory nodes,
> for example:
>
> reserved-memory {
> #address-cells = <2>;
> #size-cells = <2>;
> ranges;
>
> m4_reserved: m7@0x40000000 {
> no-map;
> reg = <0 0x40000000 0 0x1000000>;
> };
>
> m4_reserved_sysmem3: rproc@80000000 {
> reg = <0 0x80000000 0 0x800000>;
> no-map;
> };
> };
>
> &remoteproc_cm4 {
> memory-region = <&m4_reserved>, <&m4_reserved_sysmem3>;
> };
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
> arch/arm/dts/imx8mq.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm/dts/imx8mq.dtsi b/arch/arm/dts/imx8mq.dtsi
> index 5f2df35bc9..ec8347f38f 100644
> --- a/arch/arm/dts/imx8mq.dtsi
> +++ b/arch/arm/dts/imx8mq.dtsi
> @@ -4,6 +4,14 @@
> * Copyright (C) 2017 Pengutronix, Lucas Stach <
> kernel@pengutronix.de>
> */
>
> +/ {
> + remoteproc_cm4: remoteproc-cm4 {
> + compatible = "fsl,imx8mq-cm4";
> + clocks = <&clk IMX8MQ_CLK_M4_CORE>;
> + syscon = <&src>;
> + };
> +};
> +
> &clk {
> assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>,
> <&clk IMX8MQ_CLK_USDHC2>,
Regards,
Rouven
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/7] remoteproc: imx: Fix off-by-one error
2020-10-05 9:53 ` [PATCH 1/7] remoteproc: imx: Fix off-by-one error Sascha Hauer
@ 2020-10-05 12:23 ` Lucas Stach
2020-10-07 7:06 ` Sascha Hauer
0 siblings, 1 reply; 12+ messages in thread
From: Lucas Stach @ 2020-10-05 12:23 UTC (permalink / raw)
To: Sascha Hauer, Barebox List
Am Montag, den 05.10.2020, 11:53 +0200 schrieb Sascha Hauer:
> size is actually end - start + 1, fix size passed to
> request_sdram_region().
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
> drivers/remoteproc/imx_rproc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
> index 370bebe6e2..74a8d8ff2e 100644
> --- a/drivers/remoteproc/imx_rproc.c
> +++ b/drivers/remoteproc/imx_rproc.c
> @@ -305,7 +305,7 @@ static int imx_rproc_addr_init(struct imx_rproc *priv,
> break;
>
> res_cpu = request_sdram_region(dev_name(dev), res.start,
> - res.end - res.start);
> + res.end - res.start + 1);
That's a hand rolled version of resource_size(), I think it's better to
use this function instead.
Regards,
Lucas
> if (!res_cpu) {
> dev_err(dev, "remap optional addresses failed\n");
> return -ENOMEM;
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/7] remoteproc: imx: Fix off-by-one error
2020-10-05 12:23 ` Lucas Stach
@ 2020-10-07 7:06 ` Sascha Hauer
0 siblings, 0 replies; 12+ messages in thread
From: Sascha Hauer @ 2020-10-07 7:06 UTC (permalink / raw)
To: Lucas Stach; +Cc: Barebox List
On Mon, Oct 05, 2020 at 02:23:59PM +0200, Lucas Stach wrote:
> Am Montag, den 05.10.2020, 11:53 +0200 schrieb Sascha Hauer:
> > size is actually end - start + 1, fix size passed to
> > request_sdram_region().
> >
> > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > ---
> > drivers/remoteproc/imx_rproc.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
> > index 370bebe6e2..74a8d8ff2e 100644
> > --- a/drivers/remoteproc/imx_rproc.c
> > +++ b/drivers/remoteproc/imx_rproc.c
> > @@ -305,7 +305,7 @@ static int imx_rproc_addr_init(struct imx_rproc *priv,
> > break;
> >
> > res_cpu = request_sdram_region(dev_name(dev), res.start,
> > - res.end - res.start);
> > + res.end - res.start + 1);
>
> That's a hand rolled version of resource_size(), I think it's better to
> use this function instead.
Right, fixed.
Sascha
--
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Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 6/7] ARM: dts: i.MX8MQ: Add Cortex-M4 Coprocessor node
2020-10-05 12:05 ` Rouven Czerwinski
@ 2020-10-07 7:07 ` Sascha Hauer
0 siblings, 0 replies; 12+ messages in thread
From: Sascha Hauer @ 2020-10-07 7:07 UTC (permalink / raw)
To: Rouven Czerwinski; +Cc: Barebox List
On Mon, Oct 05, 2020 at 02:05:47PM +0200, Rouven Czerwinski wrote:
> On Mon, 2020-10-05 at 11:53 +0200, Sascha Hauer wrote:
> > The i.MX8MQ has a Cortex-M7 Coprocessor. Add a node for controlling
> Copy paste error from MX8MP ^ schould be Cortex-M4.
Ok, fixed.
Sascha
>
> > it.
> > To make use of it the board has to provide the reserved memory nodes,
> > for example:
> >
> > reserved-memory {
> > #address-cells = <2>;
> > #size-cells = <2>;
> > ranges;
> >
> > m4_reserved: m7@0x40000000 {
> > no-map;
> > reg = <0 0x40000000 0 0x1000000>;
> > };
> >
> > m4_reserved_sysmem3: rproc@80000000 {
> > reg = <0 0x80000000 0 0x800000>;
> > no-map;
> > };
> > };
> >
> > &remoteproc_cm4 {
> > memory-region = <&m4_reserved>, <&m4_reserved_sysmem3>;
> > };
> >
> > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> > ---
> > arch/arm/dts/imx8mq.dtsi | 8 ++++++++
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/arch/arm/dts/imx8mq.dtsi b/arch/arm/dts/imx8mq.dtsi
> > index 5f2df35bc9..ec8347f38f 100644
> > --- a/arch/arm/dts/imx8mq.dtsi
> > +++ b/arch/arm/dts/imx8mq.dtsi
> > @@ -4,6 +4,14 @@
> > * Copyright (C) 2017 Pengutronix, Lucas Stach <
> > kernel@pengutronix.de>
> > */
> >
> > +/ {
> > + remoteproc_cm4: remoteproc-cm4 {
> > + compatible = "fsl,imx8mq-cm4";
> > + clocks = <&clk IMX8MQ_CLK_M4_CORE>;
> > + syscon = <&src>;
> > + };
> > +};
> > +
> > &clk {
> > assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>,
> > <&clk IMX8MQ_CLK_USDHC2>,
>
> Regards,
> Rouven
>
>
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2020-10-07 7:07 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-10-05 9:53 [PATCH 0/7] remoteproc: Add i.MX8M Cortex-M[47] support Sascha Hauer
2020-10-05 9:53 ` [PATCH 1/7] remoteproc: imx: Fix off-by-one error Sascha Hauer
2020-10-05 12:23 ` Lucas Stach
2020-10-07 7:06 ` Sascha Hauer
2020-10-05 9:53 ` [PATCH 2/7] remoteproc: imx: Change SoC order in code Sascha Hauer
2020-10-05 9:53 ` [PATCH 3/7] remoteproc: imx: use function hooks in SoC data Sascha Hauer
2020-10-05 9:53 ` [PATCH 4/7] remoteproc: imx: Add i.MX8M support Sascha Hauer
2020-10-05 9:53 ` [PATCH 5/7] clk: i.MX8MQ: Add Cortex-M4 clk Sascha Hauer
2020-10-05 9:53 ` [PATCH 6/7] ARM: dts: i.MX8MQ: Add Cortex-M4 Coprocessor node Sascha Hauer
2020-10-05 12:05 ` Rouven Czerwinski
2020-10-07 7:07 ` Sascha Hauer
2020-10-05 9:53 ` [PATCH 7/7] ARM: dts: i.MX8MP: Add Cortex-M7 " Sascha Hauer
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