[PATCH master] ARM: at91: at91sam9x5: fix co-existance of erratum-aware and generic reset

[PATCH master] ARM: at91: at91sam9x5: fix co-existance of erratum-aware and generic reset

[Ahmad Fatoum]

We have a generic at91sam9 reset driver, but it's unaware of the
erratum on the at91sam9x5, which can prevent reboot from NAND due to
interference from SDRAM. The workaround is packing the powering down
of the DDR and the system reset into a single cache line and executing
that. This would be a bit tedious to add into the device tree probed
driver, thus:

 - Don't activate the work around if we are device-tree enabled, but
   have a newer SoC
 - Give the workaround a slightly higher priority, so it's taken instead
   of the generic DT driver

This fixes an issue of failing reset with the at91_multi_defconfig,
because both reset drivers have the same priority of 100.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 arch/arm/mach-at91/at91sam9x5.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index 086e27a79f51..8266b512c999 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -11,10 +11,17 @@ static void at91sam9x5_restart(struct restart_handler *rst)
 			  IOMEM(AT91SAM9X5_BASE_RSTC + AT91_RSTC_CR));
 }
 
+static struct restart_handler restart;
+
 static int at91sam9x5_initialize(void)
 {
-	restart_handler_register_fn("soc", at91sam9x5_restart);
+	if (IS_ENABLED(CONFIG_OFDEVICE) && !of_machine_is_compatible("atmel,at91sam9x5"))
+		return 0;
+
+	restart.name = "soc";
+	restart.priority = 110;
+	restart.restart = at91sam9x5_restart;
 
-	return 0;
+	return restart_handler_register(&restart);
 }
 coredevice_initcall(at91sam9x5_initialize);
-- 
2.29.2


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Re: [PATCH master] ARM: at91: at91sam9x5: fix co-existance of erratum-aware and generic reset

[Sascha Hauer]

On Mon, Jan 04, 2021 at 10:34:32AM +0100, Ahmad Fatoum wrote:
> We have a generic at91sam9 reset driver, but it's unaware of the
> erratum on the at91sam9x5, which can prevent reboot from NAND due to
> interference from SDRAM. The workaround is packing the powering down
> of the DDR and the system reset into a single cache line and executing
> that. This would be a bit tedious to add into the device tree probed
> driver, thus:
> 
>  - Don't activate the work around if we are device-tree enabled, but
>    have a newer SoC
>  - Give the workaround a slightly higher priority, so it's taken instead
>    of the generic DT driver
> 
> This fixes an issue of failing reset with the at91_multi_defconfig,
> because both reset drivers have the same priority of 100.
> 
> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> ---
>  arch/arm/mach-at91/at91sam9x5.c | 11 +++++++++--
>  1 file changed, 9 insertions(+), 2 deletions(-)

Applied, thanks

Sascha

> 
> diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
> index 086e27a79f51..8266b512c999 100644
> --- a/arch/arm/mach-at91/at91sam9x5.c
> +++ b/arch/arm/mach-at91/at91sam9x5.c
> @@ -11,10 +11,17 @@ static void at91sam9x5_restart(struct restart_handler *rst)
>  			  IOMEM(AT91SAM9X5_BASE_RSTC + AT91_RSTC_CR));
>  }
>  
> +static struct restart_handler restart;
> +
>  static int at91sam9x5_initialize(void)
>  {
> -	restart_handler_register_fn("soc", at91sam9x5_restart);
> +	if (IS_ENABLED(CONFIG_OFDEVICE) && !of_machine_is_compatible("atmel,at91sam9x5"))
> +		return 0;
> +
> +	restart.name = "soc";
> +	restart.priority = 110;
> +	restart.restart = at91sam9x5_restart;
>  
> -	return 0;
> +	return restart_handler_register(&restart);
>  }
>  coredevice_initcall(at91sam9x5_initialize);
> -- 
> 2.29.2
> 
> 
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