mail archive of the barebox mailing list
 help / color / mirror / Atom feed
From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Jules Maselbas <jmaselbas@kalray.eu>,
	Stafford Horne <shorne@gmail.com>,
	Ahmad Fatoum <a.fatoum@pengutronix.de>,
	sha@pengutronix.de
Subject: [PATCH v2 06/11] riscv: Add asm/asm.h
Date: Mon,  1 Mar 2021 12:01:01 +0100	[thread overview]
Message-ID: <20210301110106.3764-7-a.fatoum@pengutronix.de> (raw)
In-Reply-To: <20210301110106.3764-1-a.fatoum@pengutronix.de>

From: Sascha Hauer <s.hauer@pengutronix.de>

Various definitions for assembly code, taken as-is from Linux.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 arch/riscv/include/asm/asm.h | 69 ++++++++++++++++++++++++++++++++++++
 1 file changed, 69 insertions(+)
 create mode 100644 arch/riscv/include/asm/asm.h

diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
new file mode 100644
index 000000000000..9c992a88d858
--- /dev/null
+++ b/arch/riscv/include/asm/asm.h
@@ -0,0 +1,69 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2015 Regents of the University of California
+ */
+
+#ifndef _ASM_RISCV_ASM_H
+#define _ASM_RISCV_ASM_H
+
+#ifdef __ASSEMBLY__
+#define __ASM_STR(x)	x
+#else
+#define __ASM_STR(x)	#x
+#endif
+
+#if __riscv_xlen == 64
+#define __REG_SEL(a, b)	__ASM_STR(a)
+#elif __riscv_xlen == 32
+#define __REG_SEL(a, b)	__ASM_STR(b)
+#else
+#error "Unexpected __riscv_xlen"
+#endif
+
+#define REG_L		__REG_SEL(ld, lw)
+#define REG_S		__REG_SEL(sd, sw)
+#define REG_SC		__REG_SEL(sc.d, sc.w)
+#define SZREG		__REG_SEL(8, 4)
+#define LGREG		__REG_SEL(3, 2)
+
+#if __SIZEOF_POINTER__ == 8
+#ifdef __ASSEMBLY__
+#define RISCV_PTR		.dword
+#define RISCV_SZPTR		8
+#define RISCV_LGPTR		3
+#else
+#define RISCV_PTR		".dword"
+#define RISCV_SZPTR		"8"
+#define RISCV_LGPTR		"3"
+#endif
+#elif __SIZEOF_POINTER__ == 4
+#ifdef __ASSEMBLY__
+#define RISCV_PTR		.word
+#define RISCV_SZPTR		4
+#define RISCV_LGPTR		2
+#else
+#define RISCV_PTR		".word"
+#define RISCV_SZPTR		"4"
+#define RISCV_LGPTR		"2"
+#endif
+#else
+#error "Unexpected __SIZEOF_POINTER__"
+#endif
+
+#if (__SIZEOF_INT__ == 4)
+#define RISCV_INT		__ASM_STR(.word)
+#define RISCV_SZINT		__ASM_STR(4)
+#define RISCV_LGINT		__ASM_STR(2)
+#else
+#error "Unexpected __SIZEOF_INT__"
+#endif
+
+#if (__SIZEOF_SHORT__ == 2)
+#define RISCV_SHORT		__ASM_STR(.half)
+#define RISCV_SZSHORT		__ASM_STR(2)
+#define RISCV_LGSHORT		__ASM_STR(1)
+#else
+#error "Unexpected __SIZEOF_SHORT__"
+#endif
+
+#endif /* _ASM_RISCV_ASM_H */
-- 
2.29.2


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox


  parent reply	other threads:[~2021-03-01 11:02 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-01 11:00 [PATCH v2 00/11] common: introduce bthreads, co-operative Ahmad Fatoum
2021-03-01 11:00 ` [PATCH v2 01/11] console: unconditionally run poller_call in ctrlc() Ahmad Fatoum
2021-03-03 10:20   ` [PATCH] fixup! common: introduce bthreads, co-operative barebox threads Ahmad Fatoum
2021-03-04  8:49     ` Sascha Hauer
2021-03-04  9:17       ` Ahmad Fatoum
2021-03-01 11:00 ` [PATCH v2 02/11] " Ahmad Fatoum
2021-03-01 12:42   ` Peter Korsgaard
2021-03-02  8:56     ` Ahmad Fatoum
2021-03-02  8:56   ` [PATCH] fixup! " Ahmad Fatoum
2021-03-01 11:00 ` [PATCH v2 03/11] ARM: asm: setjmp: annotate setjmp/longjmp for GCC Ahmad Fatoum
2021-03-01 11:00 ` [PATCH v2 04/11] ARM: asm: setjmp: implement coroutine dependency initjmp() Ahmad Fatoum
2021-03-01 11:01 ` [PATCH v2 05/11] sandbox: asm: implement setjmp/longjmp/initjmp Ahmad Fatoum
2021-03-01 11:01 ` Ahmad Fatoum [this message]
2021-03-01 11:01 ` [PATCH v2 07/11] riscv: Add asm/linkage.h Ahmad Fatoum
2021-03-01 11:01 ` [PATCH v2 08/11] riscv: Implement setjmp/longjmp/initjmp Ahmad Fatoum
2021-03-01 11:01 ` [PATCH v2 09/11] mips: Add linkage.h Ahmad Fatoum
2021-03-01 11:01 ` [PATCH v2 10/11] mips: Implement setjmp/longjmp/initjmp Ahmad Fatoum
2021-03-02 22:19   ` Peter Mamonov
2021-03-04  8:38     ` Sascha Hauer
2021-03-07 12:00       ` Peter Mamonov
2021-03-10  8:17         ` Ahmad Fatoum
2021-03-14 12:40           ` Ahmad Fatoum
2021-03-01 11:01 ` [PATCH v2 11/11] powerpc: Implement initjmp/setjmp/longjmp Ahmad Fatoum
2021-03-03 12:15 ` [PATCH v2 00/11] common: introduce bthreads, co-operative Stafford Horne
2021-03-03 13:35   ` Stafford Horne
2021-03-03 13:58   ` Ahmad Fatoum
2021-03-03 15:12   ` Sascha Hauer

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210301110106.3764-7-a.fatoum@pengutronix.de \
    --to=a.fatoum@pengutronix.de \
    --cc=barebox@lists.infradead.org \
    --cc=jmaselbas@kalray.eu \
    --cc=sha@pengutronix.de \
    --cc=shorne@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox