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Fri, 12 Mar 2021 17:24:59 +0100 (CET) Received: from tellis.lin.mbt.kalray.eu (unknown [192.168.36.206]) by zimbra2.kalray.eu (Postfix) with ESMTPSA id 266FE27E02DD; Fri, 12 Mar 2021 17:24:59 +0100 (CET) From: Jules Maselbas To: barebox@lists.infradead.org Date: Fri, 12 Mar 2021 17:24:31 +0100 Message-Id: <20210312162432.9189-4-jmaselbas@kalray.eu> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210312162432.9189-1-jmaselbas@kalray.eu> References: <20210312162432.9189-1-jmaselbas@kalray.eu> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210312_162500_708425_FC7633A7 X-CRM114-Status: GOOD ( 11.15 ) X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jules Maselbas MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "barebox" X-SA-Exim-Connect-IP: 2001:8b0:10b:1:d65d:64ff:fe57:4e05 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.ext.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-3.2 required=4.0 tests=AWL,BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.2 Subject: [PATCH 4/5] usb: dwc2: Move wait_for_mode and iddig_filter_enabled to core X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) Move functions dwc2_wait_for_mode() and dwc2_iddig_filter_enabled() into core.c so they can be used during dwc2_core_init(). Cc: Michael Grzeschik Signed-off-by: Jules Maselbas --- drivers/usb/dwc2/core.c | 53 +++++++++++++++++++++++++++++++++++++++ drivers/usb/dwc2/dwc2.h | 3 +++ drivers/usb/dwc2/gadget.c | 53 --------------------------------------- 3 files changed, 56 insertions(+), 53 deletions(-) diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c index 8ec77d68a..24efe5a41 100644 --- a/drivers/usb/dwc2/core.c +++ b/drivers/usb/dwc2/core.c @@ -681,6 +681,59 @@ int dwc2_get_dr_mode(struct dwc2 *dwc2) return 0; } +/** + * dwc2_wait_for_mode() - Waits for the controller mode. + * @dwc2: Programming view of the DWC_otg controller. + * @host_mode: If true, waits for host mode, otherwise device mode. + */ +void dwc2_wait_for_mode(struct dwc2 *dwc2, bool host_mode) +{ + unsigned int timeout = 110 * USECOND; + int ret; + + dev_vdbg(dwc2->dev, "Waiting for %s mode\n", + host_mode ? "host" : "device"); + + ret = wait_on_timeout(timeout, dwc2_is_host_mode(dwc2) == host_mode); + if (ret) + dev_err(dwc2->dev, "%s: Couldn't set %s mode\n", + __func__, host_mode ? "host" : "device"); + + dev_vdbg(dwc2->dev, "%s mode set\n", + host_mode ? "Host" : "Device"); +} + +/** + * dwc2_iddig_filter_enabled() - Returns true if the IDDIG debounce + * filter is enabled. + * + * @hsotg: Programming view of DWC_otg controller + */ +bool dwc2_iddig_filter_enabled(struct dwc2 *dwc2) +{ + u32 gsnpsid; + u32 ghwcfg4; + + /* Check if core configuration includes the IDDIG filter. */ + ghwcfg4 = dwc2_readl(dwc2, GHWCFG4); + if (!(ghwcfg4 & GHWCFG4_IDDIG_FILT_EN)) + return false; + + /* + * Check if the IDDIG debounce filter is bypassed. Available + * in core version >= 3.10a. + */ + gsnpsid = dwc2_readl(dwc2, GSNPSID); + if (gsnpsid >= DWC2_CORE_REV_3_10a) { + u32 gotgctl = dwc2_readl(dwc2, GOTGCTL); + + if (gotgctl & GOTGCTL_DBNCE_FLTR_BYPASS) + return false; + } + + return true; +} + /* * Do core a soft reset of the core. Be careful with this because it * resets all the internal state machines of the core. diff --git a/drivers/usb/dwc2/dwc2.h b/drivers/usb/dwc2/dwc2.h index b9fdda850..31827d4c7 100644 --- a/drivers/usb/dwc2/dwc2.h +++ b/drivers/usb/dwc2/dwc2.h @@ -25,6 +25,9 @@ int dwc2_get_dr_mode(struct dwc2 *dwc2); int dwc2_core_reset(struct dwc2 *dwc2); void dwc2_core_init(struct dwc2 *dwc2); +void dwc2_wait_for_mode(struct dwc2 *dwc2, bool host_mode); +bool dwc2_iddig_filter_enabled(struct dwc2 *dwc2); + /* Host functions */ #ifdef CONFIG_USB_DWC2_HOST int dwc2_submit_roothub(struct dwc2 *dwc2, struct usb_device *dev, diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c index 3fc7099d7..3df5d7352 100644 --- a/drivers/usb/dwc2/gadget.c +++ b/drivers/usb/dwc2/gadget.c @@ -2660,59 +2660,6 @@ static int dwc2_eps_alloc(struct dwc2 *dwc2) return 0; } -/** - * dwc2_wait_for_mode() - Waits for the controller mode. - * @dwc2: Programming view of the DWC_otg controller. - * @host_mode: If true, waits for host mode, otherwise device mode. - */ -static void dwc2_wait_for_mode(struct dwc2 *dwc2, bool host_mode) -{ - unsigned int timeout = 110 * USECOND; - int ret; - - dev_vdbg(dwc2->dev, "Waiting for %s mode\n", - host_mode ? "host" : "device"); - - ret = wait_on_timeout(timeout, dwc2_is_host_mode(dwc2) == host_mode); - if (ret) - dev_err(dwc2->dev, "%s: Couldn't set %s mode\n", - __func__, host_mode ? "host" : "device"); - - dev_vdbg(dwc2->dev, "%s mode set\n", - host_mode ? "Host" : "Device"); -} - -/** - * dwc2_iddig_filter_enabled() - Returns true if the IDDIG debounce - * filter is enabled. - * - * @hsotg: Programming view of DWC_otg controller - */ -static bool dwc2_iddig_filter_enabled(struct dwc2 *dwc2) -{ - u32 gsnpsid; - u32 ghwcfg4; - - /* Check if core configuration includes the IDDIG filter. */ - ghwcfg4 = dwc2_readl(dwc2, GHWCFG4); - if (!(ghwcfg4 & GHWCFG4_IDDIG_FILT_EN)) - return false; - - /* - * Check if the IDDIG debounce filter is bypassed. Available - * in core version >= 3.10a. - */ - gsnpsid = dwc2_readl(dwc2, GSNPSID); - if (gsnpsid >= DWC2_CORE_REV_3_10a) { - u32 gotgctl = dwc2_readl(dwc2, GOTGCTL); - - if (gotgctl & GOTGCTL_DBNCE_FLTR_BYPASS) - return false; - } - - return true; -} - /** * dwc2_force_mode() - Force the mode of the controller. * -- 2.17.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox