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From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>, rcz@pengutronix.de
Subject: [PATCH 08/20] RISC-V: debug_ll: ns16550: align C access size with assembly's
Date: Sun, 14 Mar 2021 13:27:52 +0100	[thread overview]
Message-ID: <20210314122804.4128-9-a.fatoum@pengutronix.de> (raw)
In-Reply-To: <20210314122804.4128-1-a.fatoum@pengutronix.de>

The assembly putc routines do accesses the same size of the register
stride. Do likewise for the C implementation.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 arch/riscv/include/asm/debug_ll_ns16550.h | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/arch/riscv/include/asm/debug_ll_ns16550.h b/arch/riscv/include/asm/debug_ll_ns16550.h
index f1c2ccbd0afb..7d6d12df74fe 100644
--- a/arch/riscv/include/asm/debug_ll_ns16550.h
+++ b/arch/riscv/include/asm/debug_ll_ns16550.h
@@ -51,9 +51,13 @@
 #if defined(DEBUG_LL_UART_IOSIZE32)
 #define UART_REG_L	lw
 #define UART_REG_S	sw
+#define __uart_read	readl
+#define __uart_write	writel
 #elif defined(DEBUG_LL_UART_IOSIZE8)
 #define UART_REG_L	lbu
 #define UART_REG_S	sb
+#define __uart_read	readb
+#define __uart_write	writeb
 #else
 #error "Please define DEBUG_LL_UART_IOSIZE{8,32}"
 #endif
@@ -68,19 +72,19 @@
 static inline void PUTC_LL(char ch)
 {
 #ifdef CONFIG_DEBUG_LL
-	while (!(__raw_readl((u8 *)DEBUG_LL_UART_ADDR + UART_LSR) & UART_LSR_THRE))
+	while (!(__uart_read((u8 *)DEBUG_LL_UART_ADDR + UART_LSR) & UART_LSR_THRE))
 		;
-	__raw_writel(ch, (u8 *)DEBUG_LL_UART_ADDR + UART_THR);
+	__uart_write(ch, (u8 *)DEBUG_LL_UART_ADDR + UART_THR);
 #endif /* CONFIG_DEBUG_LL */
 }
 
 static inline void debug_ll_ns16550_init(void)
 {
 #ifdef CONFIG_DEBUG_LL
-	__raw_writel(UART_LCR_DLAB, (u8 *)DEBUG_LL_UART_ADDR + UART_LCR);
-	__raw_writel(DEBUG_LL_UART_DIVISOR & 0xff, (u8 *)DEBUG_LL_UART_ADDR + UART_DLL);
-	__raw_writel((DEBUG_LL_UART_DIVISOR >> 8) & 0xff, (u8 *)DEBUG_LL_UART_ADDR + UART_DLM);
-	__raw_writel(UART_LCR_W, (u8 *)DEBUG_LL_UART_ADDR + UART_LCR);
+	__uart_write(UART_LCR_DLAB, (u8 *)DEBUG_LL_UART_ADDR + UART_LCR);
+	__uart_write(DEBUG_LL_UART_DIVISOR & 0xff, (u8 *)DEBUG_LL_UART_ADDR + UART_DLL);
+	__uart_write((DEBUG_LL_UART_DIVISOR >> 8) & 0xff, (u8 *)DEBUG_LL_UART_ADDR + UART_DLM);
+	__uart_write(UART_LCR_W, (u8 *)DEBUG_LL_UART_ADDR + UART_LCR);
 #endif /* CONFIG_DEBUG_LL */
 }
 #else /* __ASSEMBLY__ */
-- 
2.29.2


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  parent reply	other threads:[~2021-03-14 12:30 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-14 12:27 [PATCH 00/20] RISC-V: rework for PBL, VIRT and 64-Bit support Ahmad Fatoum
2021-03-14 12:27 ` [PATCH 01/20] partitions: don't allocate dma capable memory Ahmad Fatoum
2021-03-14 12:27 ` [PATCH 02/20] images: make BOARD_ARM_GENERIC_DT available for other arches Ahmad Fatoum
2021-03-14 12:27 ` [PATCH 03/20] ARM: rename CONFIG_ARM_USE_COMPRESSED_DTB to CONFIG_USE_COMPRESSED_DTB Ahmad Fatoum
2021-03-14 12:27 ` [PATCH 04/20] ARM: aarch64: ommit unused label in assembly Ahmad Fatoum
2021-03-14 12:27 ` [PATCH 05/20] serial: virtio-console: depend on, but don't select VIRTIO Ahmad Fatoum
2021-03-14 12:27 ` [PATCH 06/20] filetype: detect RISC-V Linux kernel image Ahmad Fatoum
2021-03-14 12:27 ` [PATCH 07/20] asm: unaligned: don't do unaligned accesses Ahmad Fatoum
2021-03-14 12:27 ` Ahmad Fatoum [this message]
2021-03-14 12:27 ` [PATCH 09/20] RISC-V: drop duplicate or unneeded cflags Ahmad Fatoum
2021-03-14 12:27 ` [PATCH 10/20] RISC-V: add cacheless HAS_DMA support Ahmad Fatoum
2021-03-14 12:27 ` [PATCH 11/20] RISC-V: erizo: move to arch/riscv/boards/erizo Ahmad Fatoum
2021-03-14 12:27 ` [PATCH 12/20] RISC-V: import Linux' optimized string functions Ahmad Fatoum
2021-03-14 12:27 ` [PATCH 13/20] RISC-V: implement PBL and relocation support Ahmad Fatoum
2021-03-15  7:43   ` Ahmad Fatoum
2021-03-14 12:27 ` [PATCH 14/20] RISC-V: erizo: migrate to PBL Ahmad Fatoum
2021-03-15  8:43   ` MIPS RELOCATABLE: " Antony Pavlov
2021-03-15 11:45     ` Oleksij Rempel
2021-03-15 12:08       ` Antony Pavlov
2021-03-15 12:40         ` Ahmad Fatoum
2021-03-15 15:37           ` Antony Pavlov
2021-03-15 15:46             ` Ahmad Fatoum
2021-03-15 17:03               ` Oleksij Rempel
2021-03-14 12:27 ` [PATCH 15/20] RISC-V: support symbol names in barebox image Ahmad Fatoum
2021-03-14 12:28 ` [PATCH 16/20] RISC-V: add 64-bit support Ahmad Fatoum
2021-03-14 12:51   ` Rouven Czerwinski
2021-03-14 13:03   ` [PATCH 1/2] fixup! " Ahmad Fatoum
2021-03-14 13:03     ` [PATCH 2/2] " Ahmad Fatoum
2021-03-15  8:38       ` Antony Pavlov
2021-03-14 12:28 ` [PATCH 17/20] RISC-V: add generic DT image Ahmad Fatoum
2021-03-14 12:28 ` [PATCH 18/20] clocksource: add driver for RISC-V CLINT timer Ahmad Fatoum
2021-03-14 12:28 ` [PATCH 19/20] power: reset: add drivers for generic syscon reset and poweroff Ahmad Fatoum
2021-03-14 12:28 ` [PATCH 20/20] RISC-V: add Qemu virt support Ahmad Fatoum
2021-03-14 16:30   ` [PATCH] fixup! " Ahmad Fatoum
2021-03-15  8:22 ` [PATCH 00/20] RISC-V: rework for PBL, VIRT and 64-Bit support Antony Pavlov
2021-03-15 10:30   ` Ahmad Fatoum

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