[PATCH master 1/3] RISC-V: cpu: request stack memory region

[Ahmad Fatoum <a.fatoum@pengutronix.de>]

Now that the stack base region is determined dynamically,
mem_malloc_resource can no longer reserve the stack space.
Do as ARM does and add a RISC-V specific initcall to reserve
the main thread's stack space.

Reported-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
Fix for master as otherwise stack could be overwritten at runtime
---
 arch/riscv/cpu/core.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/riscv/cpu/core.c b/arch/riscv/cpu/core.c
index bdcd500ed748..982d378eddec 100644
--- a/arch/riscv/cpu/core.c
+++ b/arch/riscv/cpu/core.c
@@ -2,6 +2,9 @@
 /*
  * Copyright (C) 2012 Regents of the University of California
  * Copyright (C) 2017 SiFive
+ * Copyright (C) 2021 Ahmad Fatoum, Pengutronix
+ *
+ * Common RISC-V core initcalls.
  *
  * All RISC-V systems have a timer attached to every hart.  These timers can
  * either be read from the "time" and "timeh" CSRs, and can use the SBI to
@@ -14,8 +17,17 @@
 #include <of.h>
 #include <linux/clk.h>
 #include <linux/err.h>
+#include <memory.h>
+#include <asm-generic/memory_layout.h>
 #include <io.h>
 
+static int riscv_request_stack(void)
+{
+	extern unsigned long riscv_stack_top;
+	return PTR_ERR_OR_ZERO(request_sdram_region("stack", riscv_stack_top - STACK_SIZE, STACK_SIZE));
+}
+coredevice_initcall(riscv_request_stack);
+
 static struct device_d timer_dev;
 
 static int riscv_probe(struct device_d *parent)
-- 
2.29.2


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