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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "barebox" X-SA-Exim-Connect-IP: 2001:8b0:10b:1:d65d:64ff:fe57:4e05 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.ext.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-2.9 required=4.0 tests=AWL,BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.2 Subject: Re: [PATCH master 1/3] RISC-V: cpu: request stack memory region X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) On Wed, Mar 24, 2021 at 09:23:02AM +0100, Ahmad Fatoum wrote: > Now that the stack base region is determined dynamically, > mem_malloc_resource can no longer reserve the stack space. > Do as ARM does and add a RISC-V specific initcall to reserve > the main thread's stack space. > > Reported-by: Antony Pavlov > Signed-off-by: Ahmad Fatoum > --- Applied, thanks Sascha > Fix for master as otherwise stack could be overwritten at runtime > --- > arch/riscv/cpu/core.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/arch/riscv/cpu/core.c b/arch/riscv/cpu/core.c > index bdcd500ed748..982d378eddec 100644 > --- a/arch/riscv/cpu/core.c > +++ b/arch/riscv/cpu/core.c > @@ -2,6 +2,9 @@ > /* > * Copyright (C) 2012 Regents of the University of California > * Copyright (C) 2017 SiFive > + * Copyright (C) 2021 Ahmad Fatoum, Pengutronix > + * > + * Common RISC-V core initcalls. > * > * All RISC-V systems have a timer attached to every hart. These timers can > * either be read from the "time" and "timeh" CSRs, and can use the SBI to > @@ -14,8 +17,17 @@ > #include > #include > #include > +#include > +#include > #include > > +static int riscv_request_stack(void) > +{ > + extern unsigned long riscv_stack_top; > + return PTR_ERR_OR_ZERO(request_sdram_region("stack", riscv_stack_top - STACK_SIZE, STACK_SIZE)); > +} > +coredevice_initcall(riscv_request_stack); > + > static struct device_d timer_dev; > > static int riscv_probe(struct device_d *parent) > -- > 2.29.2 > > > _______________________________________________ > barebox mailing list > barebox@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/barebox > -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox