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From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>, rcz@pengutronix.de
Subject: [PATCH 10/12] gpio: add SiFive GPIO controller support
Date: Tue, 27 Apr 2021 22:23:07 +0200	[thread overview]
Message-ID: <20210427202309.32077-10-a.fatoum@pengutronix.de> (raw)
In-Reply-To: <20210427202309.32077-1-a.fatoum@pengutronix.de>

The SiFive GPIO controller is a straight forward generic gpio-mmio
controller. Only difference is that the number of GPIOs is described by
the number of interrupts in the device tree. Import the Linux v5.12
driver to support it.

Tested with gpio-restart on qemu-system-riscv64 -M sifive_u.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/gpio/Kconfig       |  7 +++
 drivers/gpio/Makefile      |  1 +
 drivers/gpio/gpio-sifive.c | 87 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 95 insertions(+)
 create mode 100644 drivers/gpio/gpio-sifive.c

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 261b6e666257..a8ee9e58b84e 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -164,6 +164,13 @@ config GPIO_SX150X
 	  Say Y here to build support for the Semtec Sx150x I2C GPIO
 	  expander chip.
 
+config GPIO_SIFIVE
+	bool "SiFive GPIO support"
+	depends on OF_GPIO
+	select GPIO_GENERIC
+	help
+	  Say yes here to support the GPIO device on SiFive SoCs.
+
 config GPIO_LIBFTDI1
 	bool "libftdi1 driver"
 	depends on SANDBOX
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 77dcf58f640d..25e12105d83d 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -23,3 +23,4 @@ obj-$(CONFIG_GPIO_DESIGNWARE)	+= gpio-dw.o
 obj-$(CONFIG_GPIO_SX150X)	+= gpio-sx150x.o
 obj-$(CONFIG_GPIO_VF610)	+= gpio-vf610.o
 obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o
+obj-$(CONFIG_GPIO_SIFIVE)	+= gpio-sifive.o
diff --git a/drivers/gpio/gpio-sifive.c b/drivers/gpio/gpio-sifive.c
new file mode 100644
index 000000000000..63f2c097e446
--- /dev/null
+++ b/drivers/gpio/gpio-sifive.c
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 SiFive
+ */
+
+#include <linux/basic_mmio_gpio.h>
+#include <printk.h>
+#include <driver.h>
+#include <errno.h>
+
+#define SIFIVE_GPIO_INPUT_VAL	0x00
+#define SIFIVE_GPIO_INPUT_EN	0x04
+#define SIFIVE_GPIO_OUTPUT_EN	0x08
+#define SIFIVE_GPIO_OUTPUT_VAL	0x0C
+#define SIFIVE_GPIO_RISE_IE	0x18
+#define SIFIVE_GPIO_FALL_IE	0x20
+#define SIFIVE_GPIO_HIGH_IE	0x28
+#define SIFIVE_GPIO_LOW_IE	0x30
+
+#define SIFIVE_GPIO_MAX		32
+
+static int __of_irq_count(struct device_node *np)
+{
+	unsigned npins = 0;
+
+	of_get_property(np, "interrupts", &npins);
+
+	return npins / sizeof(__be32);
+}
+
+static int sifive_gpio_probe(struct device_d *dev)
+{
+	struct bgpio_chip *bgc;
+	struct resource *res;
+	void __iomem *base;
+	int ret, ngpio;
+
+	bgc = xzalloc(sizeof(*bgc));
+
+	res = dev_request_mem_resource(dev, 0);
+	if (IS_ERR(res)) {
+		dev_err(dev, "failed to request device memory\n");
+		return PTR_ERR(res);
+	}
+	base = IOMEM(res->start);
+
+	ngpio = __of_irq_count(dev->device_node);
+	if (ngpio > SIFIVE_GPIO_MAX) {
+		dev_err(dev, "Too many GPIO interrupts (max=%d)\n",
+			SIFIVE_GPIO_MAX);
+		return -ENXIO;
+	}
+
+	ret = bgpio_init(bgc, dev, 4,
+			 base + SIFIVE_GPIO_INPUT_VAL,
+			 base + SIFIVE_GPIO_OUTPUT_VAL,
+			 NULL,
+			 base + SIFIVE_GPIO_OUTPUT_EN,
+			 base + SIFIVE_GPIO_INPUT_EN,
+			 0);
+	if (ret) {
+		dev_err(dev, "unable to init generic GPIO\n");
+		return ret;
+	}
+
+	/* Disable all GPIO interrupts */
+	writel(0, base + SIFIVE_GPIO_RISE_IE);
+	writel(0, base + SIFIVE_GPIO_FALL_IE);
+	writel(0, base + SIFIVE_GPIO_HIGH_IE);
+	writel(0, base + SIFIVE_GPIO_LOW_IE);
+
+	bgc->gc.ngpio = ngpio;
+	return gpiochip_add(&bgc->gc);
+}
+
+static const struct of_device_id sifive_gpio_match[] = {
+	{ .compatible = "sifive,gpio0" },
+	{ .compatible = "sifive,fu540-c000-gpio" },
+	{ },
+};
+
+static struct driver_d sifive_gpio_driver = {
+	.name		= "sifive_gpio",
+	.of_compatible	= sifive_gpio_match,
+	.probe		= sifive_gpio_probe,
+};
+postcore_platform_driver(sifive_gpio_driver);
-- 
2.29.2


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  parent reply	other threads:[~2021-04-27 20:24 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-27 20:22 [PATCH 01/12] clk: add SiFive PRCI clock " Ahmad Fatoum
2021-04-27 20:22 ` [PATCH 02/12] serial: implement SiFive UART support Ahmad Fatoum
2021-04-27 20:23 ` [PATCH 03/12] debug_ll: support <asm/debug_ll.h> to get rid of mach directories Ahmad Fatoum
2021-04-27 20:23 ` [PATCH 04/12] RISC-V: support multi-image for all machines Ahmad Fatoum
2021-05-03 11:33   ` Sascha Hauer
2021-05-03 11:39     ` Ahmad Fatoum
2021-05-03 12:00       ` Sascha Hauer
2021-04-27 20:23 ` [PATCH 05/12] RISC-V: erizo: restrict to RV32I Ahmad Fatoum
2021-04-27 20:23 ` [PATCH 06/12] RISC-V: erizo: drop mach-erizo directory Ahmad Fatoum
2021-05-05 10:18   ` Antony Pavlov
2021-05-05 10:21     ` Ahmad Fatoum
2021-05-07 11:27       ` Antony Pavlov
2021-04-27 20:23 ` [PATCH 07/12] RISC-V: add SBI based cpuinfo Ahmad Fatoum
2021-04-27 20:23 ` [PATCH 08/12] gpio: gpio-generic-platform: remove unused non-DT support Ahmad Fatoum
2021-04-27 20:23 ` [PATCH 09/12] gpio: generic: sync with upstream Linux gpio-mmio driver Ahmad Fatoum
2021-05-06 23:45   ` Antony Pavlov
2021-04-27 20:23 ` Ahmad Fatoum [this message]
2021-04-27 20:23 ` [PATCH 11/12] net: macb: add SiFive support Ahmad Fatoum
2021-05-17  6:39   ` Sascha Hauer
2021-04-27 20:23 ` [PATCH 12/12] RISC-V: sifive: add HiFive board support Ahmad Fatoum

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