From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>, rcz@pengutronix.de
Subject: [PATCH 04/12] RISC-V: support multi-image for all machines
Date: Tue, 27 Apr 2021 22:23:01 +0200 [thread overview]
Message-ID: <20210427202309.32077-4-a.fatoum@pengutronix.de> (raw)
In-Reply-To: <20210427202309.32077-1-a.fatoum@pengutronix.de>
We already got rid of arch/riscv/mach-virt. Now do the same for
arch/riscv/mach-erizo. This will enable us to build images for all
RISC-V boards at once.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
arch/riscv/Kconfig | 31 ++--------------------
arch/riscv/Kconfig.socs | 24 +++++++++++++++++
arch/riscv/Makefile | 2 +-
arch/riscv/configs/erizo_generic_defconfig | 1 +
arch/riscv/configs/virt32_defconfig | 2 +-
arch/riscv/configs/virt64_defconfig | 2 +-
arch/riscv/mach-erizo/Kconfig | 11 --------
7 files changed, 30 insertions(+), 43 deletions(-)
create mode 100644 arch/riscv/Kconfig.socs
delete mode 100644 arch/riscv/mach-erizo/Kconfig
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index c0583f31536b..a4aa799acf01 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -19,31 +19,6 @@ config ARCH_TEXT_BASE
hex
default 0x0
-menu "Machine selection"
-
-choice
- prompt "System type"
- default MACH_ERIZO
-
-config MACH_ERIZO
- bool "erizo family"
- select ARCH_RV32I
- select HAS_DEBUG_LL
- select HAS_NMON
- select USE_COMPRESSED_DTB
- select RISCV_M_MODE
- select RISCV_TIMER
-
-config MACH_VIRT
- bool "virt family"
- select BOARD_RISCV_GENERIC_DT
- select CLINT_TIMER
- help
- Generates an image tht can be be booted by QEMU. The image is called
- barebox-dt-2nd.img
-
-endchoice
-
choice
prompt "Base ISA"
default ARCH_RV32I
@@ -63,6 +38,8 @@ config ARCH_RV64I
endchoice
+source "arch/riscv/Kconfig.socs"
+
config CPU_SUPPORTS_32BIT_KERNEL
bool
@@ -82,8 +59,6 @@ config 64BIT
select ARCH_DMA_ADDR_T_64BIT
select PHYS_ADDR_T_64BIT
-source "arch/riscv/mach-erizo/Kconfig"
-
config BOARD_RISCV_GENERIC_DT
select BOARD_GENERIC_DT
bool "Build generic RISC-V device tree 2nd stage image"
@@ -93,8 +68,6 @@ config BOARD_RISCV_GENERIC_DT
in a1 like the Kernel does, so it could be used anywhere where a Kernel
image could be used. The image will be called images/barebox-dt-2nd.img
-endmenu
-
menu "RISC-V specific settings"
config RISCV_OPTIMZED_STRING_FUNCTIONS
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
new file mode 100644
index 000000000000..b0e38d8f2cca
--- /dev/null
+++ b/arch/riscv/Kconfig.socs
@@ -0,0 +1,24 @@
+menu "SoC selection"
+
+config SOC_ERIZO
+ bool "Erizo SoC"
+ select ARCH_RV32I
+ select HAS_DEBUG_LL
+ select HAS_NMON
+ select USE_COMPRESSED_DTB
+ select RISCV_M_MODE
+ select RISCV_TIMER
+
+config BOARD_ERIZO_GENERIC
+ depends on SOC_ERIZO
+ def_bool y
+
+config SOC_VIRT
+ bool "QEMU Virt Machine"
+ select BOARD_RISCV_GENERIC_DT
+ select CLINT_TIMER
+ help
+ Generates an image tht can be be booted by QEMU. The image is called
+ barebox-dt-2nd.img
+
+endmenu
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index 1a41d15477b5..09a94d69b220 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -19,7 +19,7 @@ LDFLAGS_pbl += $(riscv-ldflags-y)
cflags-y += $(riscv-cflags-y)
LDFLAGS_barebox += -nostdlib
-machine-$(CONFIG_MACH_ERIZO) := erizo
+machine-$(CONFIG_SOC_ERIZO) := erizo
LDFLAGS_barebox += $(riscv-ldflags-y)
diff --git a/arch/riscv/configs/erizo_generic_defconfig b/arch/riscv/configs/erizo_generic_defconfig
index 839b652ab53d..247a17913048 100644
--- a/arch/riscv/configs/erizo_generic_defconfig
+++ b/arch/riscv/configs/erizo_generic_defconfig
@@ -1,3 +1,4 @@
+CONFIG_SOC_ERIZO=y
# CONFIG_GLOBALVAR is not set
CONFIG_STACK_SIZE=0x20000
CONFIG_MALLOC_SIZE=0x100000
diff --git a/arch/riscv/configs/virt32_defconfig b/arch/riscv/configs/virt32_defconfig
index 83e3ca1bade8..218fee57b711 100644
--- a/arch/riscv/configs/virt32_defconfig
+++ b/arch/riscv/configs/virt32_defconfig
@@ -1,4 +1,4 @@
-CONFIG_MACH_VIRT=y
+CONFIG_SOC_VIRT=y
CONFIG_RISCV_OPTIMZED_STRING_FUNCTIONS=y
CONFIG_STACK_SIZE=0x20000
CONFIG_MALLOC_SIZE=0x0
diff --git a/arch/riscv/configs/virt64_defconfig b/arch/riscv/configs/virt64_defconfig
index 17ce16637d96..04a4f1e2f4cb 100644
--- a/arch/riscv/configs/virt64_defconfig
+++ b/arch/riscv/configs/virt64_defconfig
@@ -1,4 +1,4 @@
-CONFIG_MACH_VIRT=y
+CONFIG_SOC_VIRT=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_OPTIMZED_STRING_FUNCTIONS=y
CONFIG_STACK_SIZE=0x20000
diff --git a/arch/riscv/mach-erizo/Kconfig b/arch/riscv/mach-erizo/Kconfig
deleted file mode 100644
index 2400b4437b10..000000000000
--- a/arch/riscv/mach-erizo/Kconfig
+++ /dev/null
@@ -1,11 +0,0 @@
-if MACH_ERIZO
-
-choice
- prompt "Board type"
-
-config BOARD_ERIZO_GENERIC
- bool "erizo generic board"
-
-endchoice
-
-endif
--
2.29.2
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next prev parent reply other threads:[~2021-04-27 20:25 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-27 20:22 [PATCH 01/12] clk: add SiFive PRCI clock controller support Ahmad Fatoum
2021-04-27 20:22 ` [PATCH 02/12] serial: implement SiFive UART support Ahmad Fatoum
2021-04-27 20:23 ` [PATCH 03/12] debug_ll: support <asm/debug_ll.h> to get rid of mach directories Ahmad Fatoum
2021-04-27 20:23 ` Ahmad Fatoum [this message]
2021-05-03 11:33 ` [PATCH 04/12] RISC-V: support multi-image for all machines Sascha Hauer
2021-05-03 11:39 ` Ahmad Fatoum
2021-05-03 12:00 ` Sascha Hauer
2021-04-27 20:23 ` [PATCH 05/12] RISC-V: erizo: restrict to RV32I Ahmad Fatoum
2021-04-27 20:23 ` [PATCH 06/12] RISC-V: erizo: drop mach-erizo directory Ahmad Fatoum
2021-05-05 10:18 ` Antony Pavlov
2021-05-05 10:21 ` Ahmad Fatoum
2021-05-07 11:27 ` Antony Pavlov
2021-04-27 20:23 ` [PATCH 07/12] RISC-V: add SBI based cpuinfo Ahmad Fatoum
2021-04-27 20:23 ` [PATCH 08/12] gpio: gpio-generic-platform: remove unused non-DT support Ahmad Fatoum
2021-04-27 20:23 ` [PATCH 09/12] gpio: generic: sync with upstream Linux gpio-mmio driver Ahmad Fatoum
2021-05-06 23:45 ` Antony Pavlov
2021-04-27 20:23 ` [PATCH 10/12] gpio: add SiFive GPIO controller support Ahmad Fatoum
2021-04-27 20:23 ` [PATCH 11/12] net: macb: add SiFive support Ahmad Fatoum
2021-05-17 6:39 ` Sascha Hauer
2021-04-27 20:23 ` [PATCH 12/12] RISC-V: sifive: add HiFive board support Ahmad Fatoum
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