From: Antony Pavlov <antonynpavlov@gmail.com>
To: barebox@lists.infradead.org
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>
Subject: [PATCH 7/9] RISC-V: add initial LiteX SoC support
Date: Wed, 5 May 2021 13:08:58 +0300 [thread overview]
Message-ID: <20210505100900.88141-8-antonynpavlov@gmail.com> (raw)
In-Reply-To: <20210505100900.88141-1-antonynpavlov@gmail.com>
LiteX is a Migen-based System on Chip, supporting softcore
VexRiscv CPU, a 32-bits Linux Capable RISC-V CPU.
See https://github.com/enjoy-digital/litex and
https://github.com/litex-hub/linux-on-litex-vexriscv
for details.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/riscv/Kconfig | 9 ++
arch/riscv/Makefile | 1 +
arch/riscv/dts/litex_soc_linux.dtsi | 49 +++++++
arch/riscv/mach-litex/Kconfig | 8 ++
arch/riscv/mach-litex/Makefile | 3 +
arch/riscv/mach-litex/include/mach/debug_ll.h | 124 ++++++++++++++++++
6 files changed, 194 insertions(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index c0583f3153..40dfd7dd93 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -34,6 +34,14 @@ config MACH_ERIZO
select RISCV_M_MODE
select RISCV_TIMER
+config MACH_LITEX
+ bool "litex family"
+ select ARCH_RV32I
+ select HAS_DEBUG_LL
+ select HAS_NMON
+ select USE_COMPRESSED_DTB
+ select RISCV_SBI
+
config MACH_VIRT
bool "virt family"
select BOARD_RISCV_GENERIC_DT
@@ -83,6 +91,7 @@ config 64BIT
select PHYS_ADDR_T_64BIT
source "arch/riscv/mach-erizo/Kconfig"
+source "arch/riscv/mach-litex/Kconfig"
config BOARD_RISCV_GENERIC_DT
select BOARD_GENERIC_DT
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index aba4526bba..bc22786368 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -20,6 +20,7 @@ cflags-y += $(riscv-cflags-y)
LDFLAGS_barebox += -nostdlib
machine-$(CONFIG_MACH_ERIZO) := erizo
+machine-$(CONFIG_MACH_LITEX) := litex
machine-$(CONFIG_MACH_VIRT) := virt
LDFLAGS_barebox += $(riscv-ldflags-y)
diff --git a/arch/riscv/dts/litex_soc_linux.dtsi b/arch/riscv/dts/litex_soc_linux.dtsi
new file mode 100644
index 0000000000..32382b8dc2
--- /dev/null
+++ b/arch/riscv/dts/litex_soc_linux.dtsi
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+/dts-v1/;
+
+/ {
+ compatible = "litex,vexriscv-soc-linux";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ timebase-frequency = <100000000>; // 100 MHz
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "spinalhdl,vexriscv", "riscv";
+ reg = <0>;
+ };
+ };
+
+ uart0: serial@f0001000 {
+ compatible = "litex,uart";
+ reg = <0xf0001000 0x18>;
+ status = "disabled";
+ };
+
+ mac0: mac@f0009000 {
+ compatible = "litex,liteeth";
+ reg = <0xf0009000 0x7c /* base */
+ 0xf0009800 0x0a /* mdio_base */
+ 0xb0000000 0x2000>; /* buf_base */
+ tx-fifo-depth = <2>;
+ rx-fifo-depth = <2>;
+ status = "disabled";
+ };
+
+ spi0: spi@f000b800 {
+ compatible = "litex,spiflash";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <0xf000b800 0x100>;
+ status = "disabled";
+ };
+};
diff --git a/arch/riscv/mach-litex/Kconfig b/arch/riscv/mach-litex/Kconfig
new file mode 100644
index 0000000000..19d5927e44
--- /dev/null
+++ b/arch/riscv/mach-litex/Kconfig
@@ -0,0 +1,8 @@
+if MACH_LITEX
+
+choice
+ prompt "Board type"
+
+endchoice
+
+endif
diff --git a/arch/riscv/mach-litex/Makefile b/arch/riscv/mach-litex/Makefile
new file mode 100644
index 0000000000..d9c51e74c3
--- /dev/null
+++ b/arch/riscv/mach-litex/Makefile
@@ -0,0 +1,3 @@
+# just to build a built-in.o. Otherwise compilation fails when no o-files is
+# created.
+obj- += dummy.o
diff --git a/arch/riscv/mach-litex/include/mach/debug_ll.h b/arch/riscv/mach-litex/include/mach/debug_ll.h
new file mode 100644
index 0000000000..df7032716d
--- /dev/null
+++ b/arch/riscv/mach-litex/include/mach/debug_ll.h
@@ -0,0 +1,124 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2019 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __MACH_LITEX_DEBUG_LL__
+#define __MACH_LITEX_DEBUG_LL__
+
+/** @file
+ * This File contains declaration for early output support
+ */
+
+#include <linux/kconfig.h>
+
+#define DEBUG_LL_UART_ADDR 0xf0001000
+#define UART_RXTX 0x00
+#define UART_TXFULL 0x04
+#define UART_RXEMPTY 0x08
+#define UART_EV_PENDING 0x10
+#define UART_EV_RX (1 << 1)
+#define UART_EV_ENABLE 0x14
+
+
+#ifndef __ASSEMBLY__
+
+/*
+ * C macros
+ */
+
+#include <asm/io.h>
+
+static inline void PUTC_LL(char ch)
+{
+#ifdef CONFIG_DEBUG_LL
+ /* wait for space */
+ while (__raw_readb((u8 *)DEBUG_LL_UART_ADDR + UART_TXFULL))
+ ;
+
+ __raw_writeb(ch, (u8 *)DEBUG_LL_UART_ADDR + UART_RXTX);
+#endif /* CONFIG_DEBUG_LL */
+}
+#else /* __ASSEMBLY__ */
+/*
+ * Macros for use in assembly language code
+ */
+
+/*
+ * output a character in a0
+ */
+.macro debug_ll_outc_a0
+#ifdef CONFIG_DEBUG_LL
+
+ li t0, DEBUG_LL_UART_ADDR
+
+201:
+ lbu t1, UART_TXFULL(t0) /* uart tx full ? */
+ andi t1, t1, 0xff
+ bnez t1, 201b /* try again */
+
+ sb a0, UART_RXTX(t0) /* write the character */
+
+#endif /* CONFIG_DEBUG_LL */
+.endm
+
+/*
+ * output a character
+ */
+.macro debug_ll_outc chr
+#ifdef CONFIG_DEBUG_LL
+ li a0, \chr
+ debug_ll_outc_a0
+#endif /* CONFIG_DEBUG_LL */
+.endm
+
+/*
+ * check character in input buffer
+ * return value:
+ * v0 = 0 no character in input buffer
+ * v0 != 0 character in input buffer
+ */
+.macro debug_ll_tstc
+#ifdef CONFIG_DEBUG_LL
+ li t0, DEBUG_LL_UART_ADDR
+
+ /* get line status and check for data present */
+ lbu s0, UART_RXEMPTY(t0)
+ bnez s0, 243f
+ li s0, 1
+ j 244f
+243: li s0, 0
+244: nop
+#endif /* CONFIG_DEBUG_LL */
+.endm
+
+/*
+ * get character to v0
+ */
+.macro debug_ll_getc
+#ifdef CONFIG_DEBUG_LL
+
+204:
+ debug_ll_tstc
+
+ /* try again */
+ beqz s0, 204b
+
+ /* read a character */
+ lb s0, UART_RXTX(t0)
+ li t1, UART_EV_RX
+ sb t1, UART_EV_PENDING(t0)
+
+#endif /* CONFIG_DEBUG_LL */
+.endm
+#endif /* __ASSEMBLY__ */
+
+#endif /* __MACH_LITEX_DEBUG_LL__ */
--
2.31.1
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
next prev parent reply other threads:[~2021-05-05 10:11 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-05 10:08 [PATCH 0/9] RISC-V: add LiteX SoC support; resurrect nmon Antony Pavlov
2021-05-05 10:08 ` [PATCH 1/9] RISC-V: make it possible to run nmon from PBL C code Antony Pavlov
2021-05-05 10:27 ` Ahmad Fatoum
2021-05-05 10:08 ` [PATCH 2/9] RISC-V: boards: erizo: make it possible to use nmon Antony Pavlov
2021-05-05 10:28 ` Ahmad Fatoum
2021-05-05 10:08 ` [PATCH 3/9] serial: add litex UART driver Antony Pavlov
2021-05-05 10:32 ` Ahmad Fatoum
2021-05-05 10:08 ` [PATCH 4/9] gpio: add driver for 74xx-ICs with MMIO access Antony Pavlov
2021-05-05 10:35 ` Ahmad Fatoum
2021-05-05 10:08 ` [PATCH 5/9] spi: add litex spiflash driver Antony Pavlov
2021-05-05 10:39 ` Ahmad Fatoum
2021-05-05 15:10 ` Antony Pavlov
2021-05-05 10:08 ` [PATCH 6/9] net: add LiteEth driver Antony Pavlov
2021-05-06 10:10 ` Roland Hieber
2021-05-06 11:33 ` Antony Pavlov
2021-05-05 10:08 ` Antony Pavlov [this message]
2021-05-05 10:16 ` [PATCH 7/9] RISC-V: add initial LiteX SoC support Ahmad Fatoum
2021-05-05 10:45 ` Jan Lübbe
2021-05-05 15:23 ` Antony Pavlov
2021-05-05 10:08 ` [PATCH 8/9] RISC-V: add litex-linux board support Antony Pavlov
2021-05-05 10:19 ` Ahmad Fatoum
2021-05-05 10:36 ` Antony Pavlov
2021-05-05 10:09 ` [PATCH 9/9] RISC-V: add litex_linux_defconfig Antony Pavlov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210505100900.88141-8-antonynpavlov@gmail.com \
--to=antonynpavlov@gmail.com \
--cc=a.fatoum@pengutronix.de \
--cc=barebox@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox