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[109.252.203.17]) by smtp.gmail.com with ESMTPSA id f36sm1641387lfv.248.2021.05.25.00.20.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 May 2021 00:20:07 -0700 (PDT) From: Antony Pavlov To: barebox@lists.infradead.org Date: Tue, 25 May 2021 10:19:48 +0300 Message-Id: <20210525071952.18045-7-antonynpavlov@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210525071952.18045-1-antonynpavlov@gmail.com> References: <20210525071952.18045-1-antonynpavlov@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210525_002010_159307_B1997BC1 X-CRM114-Status: GOOD ( 18.41 ) X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ahmad Fatoum , Alexander Shiyan Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:e::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.ext.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-4.1 required=4.0 tests=AWL,BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_NONE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.2 Subject: [PATCH v3 06/10] gpio: add driver for 74xx-ICs with MMIO access X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) This patch adds driver to support GPIO functionality for 74xx-compatible ICs with MMIO access. Compatible models include: 1 bit: 741G125 (Input), 741G74 (Output) 2 bits: 742G125 (Input), 7474 (Output) 4 bits: 74125 (Input), 74175 (Output) 6 bits: 74365 (Input), 74174 (Output) 8 bits: 74244 (Input), 74273 (Output) 16 bits: 741624 (Input), 7416374 (Output) Signed-off-by: Antony Pavlov Cc: Alexander Shiyan --- drivers/gpio/Kconfig | 14 +++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-74xx-mmio.c | 165 ++++++++++++++++++++++++++++++++++ 3 files changed, 180 insertions(+) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index a8ee9e58b8..579d5c04b3 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -21,6 +21,20 @@ config GPIO_74164 shift registers. This driver can be used to provide access to more gpio outputs. +config GPIO_74XX_MMIO + tristate "GPIO driver for 74xx-ICs with MMIO access" + depends on OFDEVICE + select GPIO_GENERIC + help + Say yes here to support GPIO functionality for 74xx-compatible ICs + with MMIO access. Compatible models include: + 1 bit: 741G125 (Input), 741G74 (Output) + 2 bits: 742G125 (Input), 7474 (Output) + 4 bits: 74125 (Input), 74175 (Output) + 6 bits: 74365 (Input), 74174 (Output) + 8 bits: 74244 (Input), 74273 (Output) + 16 bits: 741624 (Input), 7416374 (Output) + config GPIO_CLPS711X bool "GPIO support for CLPS711X" depends on ARCH_CLPS711X || COMPILE_TEST diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 25e12105d8..41c65fa0ac 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -1,6 +1,7 @@ obj-$(CONFIG_GPIOLIB) += gpiolib.o obj-$(CONFIG_GPIO_74164) += gpio-74164.o +obj-$(CONFIG_GPIO_74XX_MMIO) += gpio-74xx-mmio.o obj-$(CONFIG_MACH_MIPS_ATH79) += gpio-ath79.o obj-$(CONFIG_GPIO_DAVINCI) += gpio-davinci.o obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o diff --git a/drivers/gpio/gpio-74xx-mmio.c b/drivers/gpio/gpio-74xx-mmio.c new file mode 100644 index 0000000000..5b688f4766 --- /dev/null +++ b/drivers/gpio/gpio-74xx-mmio.c @@ -0,0 +1,165 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * 74xx MMIO GPIO driver + * + * Copyright (C) 2014 Alexander Shiyan + * + * Ported to barebox from linux-v5.4-rc6 + * Copyright (C) 2019-2021 Antony Pavlov + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#define MMIO_74XX_DIR_IN (0 << 8) +#define MMIO_74XX_DIR_OUT (1 << 8) +#define MMIO_74XX_BIT_CNT(x) ((x) & 0xff) + +struct mmio_74xx_gpio_priv { + struct bgpio_chip bgc; + unsigned int flags; +}; + +static const struct of_device_id mmio_74xx_gpio_ids[] = { + { + .compatible = "ti,741g125", + .data = (const void *)(MMIO_74XX_DIR_IN | 1), + }, + { + .compatible = "ti,742g125", + .data = (const void *)(MMIO_74XX_DIR_IN | 2), + }, + { + .compatible = "ti,74125", + .data = (const void *)(MMIO_74XX_DIR_IN | 4), + }, + { + .compatible = "ti,74365", + .data = (const void *)(MMIO_74XX_DIR_IN | 6), + }, + { + .compatible = "ti,74244", + .data = (const void *)(MMIO_74XX_DIR_IN | 8), + }, + { + .compatible = "ti,741624", + .data = (const void *)(MMIO_74XX_DIR_IN | 16), + }, + { + .compatible = "ti,741g74", + .data = (const void *)(MMIO_74XX_DIR_OUT | 1), + }, + { + .compatible = "ti,7474", + .data = (const void *)(MMIO_74XX_DIR_OUT | 2), + }, + { + .compatible = "ti,74175", + .data = (const void *)(MMIO_74XX_DIR_OUT | 4), + }, + { + .compatible = "ti,74174", + .data = (const void *)(MMIO_74XX_DIR_OUT | 6), + }, + { + .compatible = "ti,74273", + .data = (const void *)(MMIO_74XX_DIR_OUT | 8), + }, + { + .compatible = "ti,7416374", + .data = (const void *)(MMIO_74XX_DIR_OUT | 16), + }, + { } +}; + +static inline +struct mmio_74xx_gpio_priv *to_mmio_74xx_gpio_priv(struct gpio_chip *gc) +{ + struct bgpio_chip *bgc = + container_of(gc, struct bgpio_chip, gc); + + return container_of(bgc, struct mmio_74xx_gpio_priv, bgc); +} + +static int mmio_74xx_get_direction(struct gpio_chip *gc, unsigned int offset) +{ + struct mmio_74xx_gpio_priv *priv = to_mmio_74xx_gpio_priv(gc); + + if (priv->flags & MMIO_74XX_DIR_OUT) + return GPIOF_DIR_OUT; + + return GPIOF_DIR_IN; +} + +static int mmio_74xx_dir_in(struct gpio_chip *gc, unsigned int gpio) +{ + struct mmio_74xx_gpio_priv *priv = to_mmio_74xx_gpio_priv(gc); + + return (priv->flags & MMIO_74XX_DIR_OUT) ? -ENOTSUPP : 0; +} + +static int mmio_74xx_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) +{ + struct mmio_74xx_gpio_priv *priv = to_mmio_74xx_gpio_priv(gc); + + if (priv->flags & MMIO_74XX_DIR_OUT) { + gc->ops->set(gc, gpio, val); + return 0; + } + + return -ENOTSUPP; +} + +static int mmio_74xx_gpio_probe(struct device_d *dev) +{ + struct mmio_74xx_gpio_priv *priv; + void __iomem *dat; + int err; + struct gpio_chip *gc; + + priv = xzalloc(sizeof(*priv)); + + priv->flags = (uintptr_t)of_device_get_match_data(dev); + + dat = dev_request_mem_region(dev, 0); + if (IS_ERR(dat)) + return PTR_ERR(dat); + + err = bgpio_init(&priv->bgc, dev, + DIV_ROUND_UP(MMIO_74XX_BIT_CNT(priv->flags), 8), + dat, NULL, NULL, NULL, NULL, 0); + if (err) + return err; + + gc = &priv->bgc.gc; + gc->ops->direction_input = mmio_74xx_dir_in; + gc->ops->direction_output = mmio_74xx_dir_out; + gc->ops->get_direction = mmio_74xx_get_direction; + gc->ngpio = MMIO_74XX_BIT_CNT(priv->flags); + + dev->priv = priv; + + return gpiochip_add(gc); +} + +static struct driver_d mmio_74xx_gpio_driver = { + .name = "74xx-mmio-gpio", + .of_compatible = DRV_OF_COMPAT(mmio_74xx_gpio_ids), + .probe = mmio_74xx_gpio_probe, +}; + +coredevice_platform_driver(mmio_74xx_gpio_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Alexander Shiyan "); +MODULE_DESCRIPTION("74xx MMIO GPIO driver"); -- 2.31.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox