From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>
Subject: [PATCH 01/20] RISC-V: socs: add Kconfig entry for StarFive JH7100
Date: Mon, 31 May 2021 09:38:02 +0200 [thread overview]
Message-ID: <20210531073821.15257-2-a.fatoum@pengutronix.de> (raw)
In-Reply-To: <20210531073821.15257-1-a.fatoum@pengutronix.de>
The JH7100 is the SoC in the pre-production BeagleV. The normal one
will have a JH7110. Add Kconfig symbols, so newly introduced symbols
can depend on them.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
arch/riscv/Kconfig.socs | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 67d19caeb3b0..9c82a36fe4bd 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -42,4 +42,19 @@ config BOARD_HIFIVE
endif
+config SOC_STARFIVE
+ bool "StarFive SoCs"
+ select CLINT_TIMER
+ help
+ This enables support for SiFive SoC platform hardware.
+
+if SOC_STARFIVE
+
+config SOC_STARFIVE_JH7100
+ bool
+ select SOC_SIFIVE
+
+endif
+
+
endmenu
--
2.29.2
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next prev parent reply other threads:[~2021-05-31 7:39 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-31 7:38 [PATCH 00/20] RISC-V: prepare for BeagleV pre-production board support Ahmad Fatoum
2021-05-31 7:38 ` Ahmad Fatoum [this message]
2021-05-31 7:38 ` [PATCH 02/20] net: designware: add support for IP integrated into StarFive SoC Ahmad Fatoum
2021-05-31 7:38 ` [PATCH 03/20] mfd: add TI TPS65086 PMIC restart driver Ahmad Fatoum
2021-06-07 6:44 ` Sascha Hauer
2021-05-31 7:38 ` [PATCH 04/20] mtd: spi-nor: cadence: fix 64-bit issues Ahmad Fatoum
2021-06-07 6:51 ` Sascha Hauer
2021-05-31 7:38 ` [PATCH 05/20] nvmem: add StarFive OTP support Ahmad Fatoum
2021-05-31 7:38 ` [PATCH 06/20] RISC-V: dma: support multiple dma_alloc_coherent backends Ahmad Fatoum
2021-05-31 7:38 ` [PATCH 07/20] RISC-V: support incoherent I-Cache Ahmad Fatoum
2021-05-31 7:40 ` Ahmad Fatoum
2021-06-07 7:33 ` Ahmad Fatoum
2021-05-31 7:38 ` [PATCH 08/20] soc: add support for StarFive JH7100 incoherent interconnect Ahmad Fatoum
2021-05-31 7:38 ` [PATCH 09/20] soc: sifive: l2_cache: enable maximum available cache ways Ahmad Fatoum
2021-05-31 7:38 ` [PATCH 10/20] net: designware: fix 64-bit incompatibilities Ahmad Fatoum
2021-05-31 7:38 ` [PATCH 11/20] dma: support marking SRAM for coherent DMA use Ahmad Fatoum
2021-06-07 7:34 ` Sascha Hauer
2021-06-07 7:40 ` Ahmad Fatoum
2021-06-07 7:39 ` Sascha Hauer
2021-05-31 7:38 ` [PATCH 12/20] mci: allocate DMA-able memory Ahmad Fatoum
2021-05-31 7:38 ` [PATCH 13/20] mci: allocate sector_buf on demand Ahmad Fatoum
2021-05-31 7:38 ` [PATCH 14/20] dma: allocate 32-byte aligned buffers by default Ahmad Fatoum
2021-05-31 7:38 ` [PATCH 15/20] mci: dw_mmc: enable use on 64-bit CPUs Ahmad Fatoum
2021-05-31 7:38 ` [PATCH 16/20] mci: dw_mmc: match against generic "snps, dw-mshc" compatible Ahmad Fatoum
2021-05-31 7:38 ` [PATCH 17/20] clk: add initial StarFive clock support Ahmad Fatoum
2021-05-31 8:41 ` Ahmad Fatoum
2021-05-31 7:38 ` [PATCH 18/20] reset: add StarFive reset controller driver Ahmad Fatoum
2021-06-07 8:00 ` Sascha Hauer
2021-05-31 7:38 ` [PATCH 19/20] watchdog: add StarFive watchdog driver Ahmad Fatoum
2021-05-31 7:38 ` [PATCH 20/20] hw_random: add driver for RNG on StarFive SoC Ahmad Fatoum
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