From: Sascha Hauer <s.hauer@pengutronix.de> To: Barebox List <barebox@lists.infradead.org> Subject: [PATCH 0/5] RK3568 pinctrl Date: Tue, 8 Jun 2021 16:05:40 +0200 [thread overview] Message-ID: <20210608140545.30696-1-s.hauer@pengutronix.de> (raw) Another step in getting Rockchip rk3568 support upstream: This series adds pinctrl support for that SoC. Unfortunately I don't have access to a board that was previously supported by the driver, so I can't test if it still works. The rk3568 seems to work ok though, the register settings I have checked look sane. Sascha Sascha Hauer (5): pinctrl: Rockchip: rename mux_offset to grf_mux_offset pinctrl: Rockchip: print resource_size_t with %pa pinctrl: Rockchip: Update from Linux pinctrl: Rockchip: implement drive strength setting pinctrl: Rockchip: Add RK3568 support drivers/pinctrl/pinctrl-rockchip.c | 777 ++++++++++++++++++++++++++++- 1 file changed, 754 insertions(+), 23 deletions(-) -- 2.29.2 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
next reply other threads:[~2021-06-08 14:07 UTC|newest] Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-06-08 14:05 Sascha Hauer [this message] 2021-06-08 14:05 ` [PATCH 1/5] pinctrl: Rockchip: rename mux_offset to grf_mux_offset Sascha Hauer 2021-06-08 14:05 ` [PATCH 2/5] pinctrl: Rockchip: print resource_size_t with %pa Sascha Hauer 2021-06-08 14:05 ` [PATCH 3/5] pinctrl: Rockchip: Update from Linux Sascha Hauer 2021-06-08 14:05 ` [PATCH 4/5] pinctrl: Rockchip: implement drive strength setting Sascha Hauer 2021-06-09 8:13 ` Ahmad Fatoum 2021-06-08 14:05 ` [PATCH 5/5] pinctrl: Rockchip: Add RK3568 support Sascha Hauer 2021-06-09 8:01 ` Ahmad Fatoum 2021-06-09 9:41 ` Sascha Hauer 2021-06-09 8:11 ` Ahmad Fatoum 2021-06-09 9:45 ` Sascha Hauer
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