[PATCH 0/5] Cleanup and fix arasan-sdhci

[PATCH 0/5] Cleanup and fix arasan-sdhci

[Michael Tretter]

Hi,

These are a few misc patches for the arasan sd controller. Nothing particular
stands out and each patch is useful on its own. I put them into a single
series, because all of them affect the arasan driver.

Michael

Michael Tretter (5):
  mci: mci-core: respect disable-wp property
  mci: arasan: fix most checkpatch warnings
  mci: arasan: remove duplicate stop clock
  mci: arasan: wait for XFER_COMPLETE for busy response
  ARM: zynqmp: defconfig: enable MCI_ARASAN

 arch/arm/configs/zynqmp_defconfig |  2 ++
 drivers/mci/arasan-sdhci.c        | 51 ++++++++++++++++++-------------
 drivers/mci/mci-core.c            |  4 ++-
 include/mci.h                     |  1 +
 4 files changed, 35 insertions(+), 23 deletions(-)

-- 
2.29.2


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[PATCH 1/5] mci: mci-core: respect disable-wp property

[Michael Tretter]

Systems without write-protect pin should ignore the write protect logic
and assume that an SD card is always read-write. This is expressed by
the disable-wp dt property.

Respect the disable-wp property and don't call the write protection
check in these cases.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
 drivers/mci/mci-core.c | 4 +++-
 include/mci.h          | 1 +
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
index a160b9889459..a094f3cbf522 100644
--- a/drivers/mci/mci-core.c
+++ b/drivers/mci/mci-core.c
@@ -1358,7 +1358,8 @@ static int __maybe_unused mci_sd_write(struct block_device *blk,
 
 	mci_blk_part_switch(part);
 
-	if (host->card_write_protected && host->card_write_protected(host)) {
+	if (!host->disable_wp &&
+	    host->card_write_protected && host->card_write_protected(host)) {
 		dev_err(&mci->dev, "card write protected\n");
 		return -EPERM;
 	}
@@ -2016,6 +2017,7 @@ void mci_of_parse_node(struct mci_host *host,
 
 	host->non_removable = of_property_read_bool(np, "non-removable");
 	host->no_sd = of_property_read_bool(np, "no-sd");
+	host->disable_wp = of_property_read_bool(np, "disable-wp");
 }
 
 void mci_of_parse(struct mci_host *host)
diff --git a/include/mci.h b/include/mci.h
index df2437f6181b..922aeaecf3de 100644
--- a/include/mci.h
+++ b/include/mci.h
@@ -406,6 +406,7 @@ struct mci_host {
 	int use_dsr;		/**< optional dsr usage flag */
 	bool non_removable;	/**< device is non removable */
 	bool no_sd;		/**< do not send SD commands during initialization */
+	bool disable_wp;	/**< ignore write-protect detection logic */
 	struct regulator *supply;
 
 	/** init the host interface */
-- 
2.29.2


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[PATCH 2/5] mci: arasan: fix most checkpatch warnings

[Michael Tretter]

checkpatch reports many warnings for the arasan driver. Fix most of the
warnings.

I didn't fix the long lines in the wait_on_timeout() calls, because
trying to fix them actually makes things worse by introducing either
unreadable code or multiple additional helper functions, which I don't
consider worth it.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
 drivers/mci/arasan-sdhci.c | 46 ++++++++++++++++++++++----------------
 1 file changed, 27 insertions(+), 19 deletions(-)

diff --git a/drivers/mci/arasan-sdhci.c b/drivers/mci/arasan-sdhci.c
index 04fce62bf46d..7306dac70b69 100644
--- a/drivers/mci/arasan-sdhci.c
+++ b/drivers/mci/arasan-sdhci.c
@@ -12,20 +12,20 @@
 #define SDHCI_ARASAN_HCAP_CLK_FREQ_MASK		0xFF00
 #define SDHCI_ARASAN_HCAP_CLK_FREQ_SHIFT	8
 #define SDHCI_INT_ADMAE				BIT(29)
-#define SDHCI_ARASAN_INT_DATA_MASK 		SDHCI_INT_XFER_COMPLETE | \
+#define SDHCI_ARASAN_INT_DATA_MASK		(SDHCI_INT_XFER_COMPLETE | \
 						SDHCI_INT_DMA | \
 						SDHCI_INT_SPACE_AVAIL | \
 						SDHCI_INT_DATA_AVAIL | \
 						SDHCI_INT_DATA_TIMEOUT | \
 						SDHCI_INT_DATA_CRC | \
 						SDHCI_INT_DATA_END_BIT | \
-						SDHCI_INT_ADMAE
+						SDHCI_INT_ADMAE)
 
-#define SDHCI_ARASAN_INT_CMD_MASK		SDHCI_INT_CMD_COMPLETE | \
+#define SDHCI_ARASAN_INT_CMD_MASK		(SDHCI_INT_CMD_COMPLETE | \
 						SDHCI_INT_TIMEOUT | \
 						SDHCI_INT_CRC | \
 						SDHCI_INT_END_BIT | \
-						SDHCI_INT_INDEX
+						SDHCI_INT_INDEX)
 
 #define SDHCI_ARASAN_BUS_WIDTH			4
 #define TIMEOUT_VAL				0xE
@@ -39,7 +39,6 @@ struct arasan_sdhci_host {
 #define SDHCI_ARASAN_QUIRK_NO_1_8_V		BIT(1)
 };
 
-
 static inline
 struct arasan_sdhci_host *to_arasan_sdhci_host(struct mci_host *mci)
 {
@@ -55,15 +54,21 @@ struct arasan_sdhci_host *sdhci_to_arasan(struct sdhci *sdhci)
 static int arasan_sdhci_card_present(struct mci_host *mci)
 {
 	struct arasan_sdhci_host *host = to_arasan_sdhci_host(mci);
+	u32 val;
+
+	val = sdhci_read32(&host->sdhci, SDHCI_PRESENT_STATE);
 
-	return !!(sdhci_read32(&host->sdhci, SDHCI_PRESENT_STATE) & SDHCI_CARD_DETECT);
+	return !!(val & SDHCI_CARD_DETECT);
 }
 
 static int arasan_sdhci_card_write_protected(struct mci_host *mci)
 {
 	struct arasan_sdhci_host *host = to_arasan_sdhci_host(mci);
+	u32 val;
+
+	val = sdhci_read32(&host->sdhci, SDHCI_PRESENT_STATE);
 
-	return !(sdhci_read32(&host->sdhci, SDHCI_PRESENT_STATE) & SDHCI_WRITE_PROTECT);
+	return !(val & SDHCI_WRITE_PROTECT);
 }
 
 static int arasan_sdhci_reset(struct arasan_sdhci_host *host, u8 mask)
@@ -72,7 +77,7 @@ static int arasan_sdhci_reset(struct arasan_sdhci_host *host, u8 mask)
 
 	/* wait for reset completion */
 	if (wait_on_timeout(100 * MSECOND,
-			!(sdhci_read8(&host->sdhci, SDHCI_SOFTWARE_RESET) & mask))){
+			    !(sdhci_read8(&host->sdhci, SDHCI_SOFTWARE_RESET) & mask))) {
 		dev_err(host->mci.hw_dev, "SDHCI reset timeout\n");
 		return -ETIMEDOUT;
 	}
@@ -98,13 +103,12 @@ static int arasan_sdhci_init(struct mci_host *mci, struct device_d *dev)
 		return ret;
 
 	sdhci_write8(&host->sdhci, SDHCI_POWER_CONTROL,
-			    SDHCI_BUS_VOLTAGE_330 | SDHCI_BUS_POWER_EN);
+		     SDHCI_BUS_VOLTAGE_330 | SDHCI_BUS_POWER_EN);
 	udelay(400);
 
 	sdhci_write32(&host->sdhci, SDHCI_INT_ENABLE,
-			    SDHCI_ARASAN_INT_DATA_MASK |
-			    SDHCI_ARASAN_INT_CMD_MASK);
-	sdhci_write32(&host->sdhci, SDHCI_SIGNAL_ENABLE, 0x00);
+		      SDHCI_ARASAN_INT_DATA_MASK | SDHCI_ARASAN_INT_CMD_MASK);
+	sdhci_write32(&host->sdhci, SDHCI_SIGNAL_ENABLE, 0);
 
 	return 0;
 }
@@ -136,18 +140,21 @@ static int arasan_sdhci_wait_for_done(struct arasan_sdhci_host *host, u32 mask)
 {
 	u64 start = get_time_ns();
 	u16 stat;
+	u16 error;
 
 	do {
 		stat = sdhci_read16(&host->sdhci, SDHCI_INT_NORMAL_STATUS);
 		if (stat & SDHCI_INT_ERROR) {
+			error = sdhci_read16(&host->sdhci,
+					     SDHCI_INT_ERROR_STATUS);
 			dev_err(host->mci.hw_dev, "SDHCI_INT_ERROR: 0x%08x\n",
-				sdhci_read16(&host->sdhci, SDHCI_INT_ERROR_STATUS));
+				error);
 			return -EPERM;
 		}
 
 		if (is_timeout(start, 1000 * MSECOND)) {
 			dev_err(host->mci.hw_dev,
-					"SDHCI timeout while waiting for done\n");
+				"SDHCI timeout while waiting for done\n");
 			return -ETIMEDOUT;
 		}
 	} while ((stat & mask) != mask);
@@ -158,7 +165,7 @@ static int arasan_sdhci_wait_for_done(struct arasan_sdhci_host *host, u32 mask)
 static void print_error(struct arasan_sdhci_host *host, int cmdidx)
 {
 	dev_err(host->mci.hw_dev,
-		"error while transfering data for command %d\n", cmdidx);
+		"error while transferring data for command %d\n", cmdidx);
 	dev_err(host->mci.hw_dev, "state = 0x%08x , interrupt = 0x%08x\n",
 		sdhci_read32(&host->sdhci, SDHCI_PRESENT_STATE),
 		sdhci_read32(&host->sdhci, SDHCI_INT_NORMAL_STATUS));
@@ -177,11 +184,10 @@ static int arasan_sdhci_send_cmd(struct mci_host *mci, struct mci_cmd *cmd,
 		mask |= SDHCI_CMD_INHIBIT_DATA;
 
 	ret = wait_on_timeout(10 * MSECOND,
-			!(sdhci_read32(&host->sdhci, SDHCI_PRESENT_STATE) & mask));
-
+			      !(sdhci_read32(&host->sdhci, SDHCI_PRESENT_STATE) & mask));
 	if (ret) {
 		dev_err(host->mci.hw_dev,
-				"SDHCI timeout while waiting for idle\n");
+			"SDHCI timeout while waiting for idle\n");
 		return ret;
 	}
 
@@ -191,7 +197,8 @@ static int arasan_sdhci_send_cmd(struct mci_host *mci, struct mci_cmd *cmd,
 	if (data && data->flags == MMC_DATA_READ)
 		mask |= SDHCI_INT_DATA_AVAIL;
 
-	sdhci_set_cmd_xfer_mode(&host->sdhci, cmd, data, false, &command, &xfer);
+	sdhci_set_cmd_xfer_mode(&host->sdhci,
+				cmd, data, false, &command, &xfer);
 
 	sdhci_write8(&host->sdhci, SDHCI_TIMEOUT_CONTROL, TIMEOUT_VAL);
 	if (data) {
@@ -223,6 +230,7 @@ error:
 	}
 
 	sdhci_write32(&host->sdhci, SDHCI_INT_STATUS, ~0);
+
 	return ret;
 }
 
-- 
2.29.2


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[PATCH 3/5] mci: arasan: remove duplicate stop clock

[Michael Tretter]

The clock is already stopped in sdhci_set_clock(). Stopping the clock in
the arasan driver is not necessary.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
 drivers/mci/arasan-sdhci.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/mci/arasan-sdhci.c b/drivers/mci/arasan-sdhci.c
index 7306dac70b69..732f838d8395 100644
--- a/drivers/mci/arasan-sdhci.c
+++ b/drivers/mci/arasan-sdhci.c
@@ -118,9 +118,6 @@ static void arasan_sdhci_set_ios(struct mci_host *mci, struct mci_ios *ios)
 	struct arasan_sdhci_host *host = to_arasan_sdhci_host(mci);
 	u16 val;
 
-	/* stop clock */
-	sdhci_write16(&host->sdhci, SDHCI_CLOCK_CONTROL, 0);
-
 	if (ios->clock)
 		sdhci_set_clock(&host->sdhci, ios->clock, host->sdhci.max_clk);
 
-- 
2.29.2


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[PATCH 4/5] mci: arasan: wait for XFER_COMPLETE for busy response

[Michael Tretter]

I observed errors on the ZynqMP during reading the EXT_CSD registers
using CMD8. The Zynq UltraScale+ Device TRM UG1085 (v2.2) p. 777 states
that the driver shall wait 2 ms after sending CMD6 for setting a EXT_CSD
register.

The JEDEC Standard No. 84-A43 p. 35 does not specify the delay but
states that CMD6 expects an R1b response and that the host has to wait
until the busy signal is de-asserted. This is signaled via the
SDHCI_INT_XFER_COMPLETE interrupt.

Wait for the XFER_COMPLETE interrupt after sending a command that
expects an R1b response.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
 drivers/mci/arasan-sdhci.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/mci/arasan-sdhci.c b/drivers/mci/arasan-sdhci.c
index 732f838d8395..d45f9184cd1d 100644
--- a/drivers/mci/arasan-sdhci.c
+++ b/drivers/mci/arasan-sdhci.c
@@ -193,6 +193,8 @@ static int arasan_sdhci_send_cmd(struct mci_host *mci, struct mci_cmd *cmd,
 	mask = SDHCI_INT_CMD_COMPLETE;
 	if (data && data->flags == MMC_DATA_READ)
 		mask |= SDHCI_INT_DATA_AVAIL;
+	if (cmd->resp_type & MMC_RSP_BUSY)
+		mask |= SDHCI_INT_XFER_COMPLETE;
 
 	sdhci_set_cmd_xfer_mode(&host->sdhci,
 				cmd, data, false, &command, &xfer);
-- 
2.29.2


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[PATCH 5/5] ARM: zynqmp: defconfig: enable MCI_ARASAN

[Michael Tretter]

The ZynqMP has an arasan SD controller. Enable it in the respective
defconfig.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
---
 arch/arm/configs/zynqmp_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/configs/zynqmp_defconfig b/arch/arm/configs/zynqmp_defconfig
index 762103c54105..6f5612fa92a0 100644
--- a/arch/arm/configs/zynqmp_defconfig
+++ b/arch/arm/configs/zynqmp_defconfig
@@ -37,5 +37,7 @@ CONFIG_NET=y
 CONFIG_DRIVER_SERIAL_CADENCE=y
 CONFIG_DRIVER_NET_MACB=y
 # CONFIG_SPI is not set
+CONFIG_MCI=y
+CONFIG_MCI_ARASAN=y
 CONFIG_FIRMWARE_ZYNQMP_FPGA=y
 CONFIG_DIGEST=y
-- 
2.29.2


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Re: [PATCH 0/5] Cleanup and fix arasan-sdhci

[Sascha Hauer]

On Wed, Jun 16, 2021 at 09:39:52AM +0200, Michael Tretter wrote:
> Hi,
> 
> These are a few misc patches for the arasan sd controller. Nothing particular
> stands out and each patch is useful on its own. I put them into a single
> series, because all of them affect the arasan driver.
> 
> Michael
> 
> Michael Tretter (5):
>   mci: mci-core: respect disable-wp property
>   mci: arasan: fix most checkpatch warnings
>   mci: arasan: remove duplicate stop clock
>   mci: arasan: wait for XFER_COMPLETE for busy response
>   ARM: zynqmp: defconfig: enable MCI_ARASAN

Applied, thanks

Sascha

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