From: Sascha Hauer <sha@pengutronix.de>
To: Joacim Zetterling <joaze@westermo.com>
Cc: barebox@lists.infradead.org, a.fatoum@pengutronix.de
Subject: Re: [PATCH v3] Fix problem with imx_ddrc_sdram_size calc
Date: Fri, 5 Nov 2021 10:39:27 +0100 [thread overview]
Message-ID: <20211105093927.GI25698@pengutronix.de> (raw)
In-Reply-To: <20211101121109.GA56533@wsevst-c0022>
Hi Joacim,
On Mon, Nov 01, 2021 at 01:11:09PM +0100, Joacim Zetterling wrote:
> There was some issues with the imx_ddrc_sdram_size calculation.
>
> If we compare the imx8mn DDR4 evk against the LPDDR4 variant in
> code and in the datasheets, we see the following:
>
> DDR4 LPDDR4
> ========================
> Bus width 16 16
> Rank 1 1
> Ranks 1 1
> Banks 4 8
> Banks grps 2 1
> Rows 17 15
> Col 10 10
>
> This gives us the following problems:
>
> 1. Bus width problem.
> Does not support 16 bit SDRAM bus mode, only 32 bit supported
>
> 2. Row size problem.
> Only up to 16 bit row size support.
>
> 3. Bank groups support.
> Only support of 1 bank group.
>
> 4. Bit count problem.
> The imx_ddrc_count_bits function does not do a correct count.
Could you split this into four patches fixing one problem at a time?
I am not sure the problems can be separated from each other entirely,
but splitting this up would make it much easier to understand the
problems and also their fixes. We'll be glad having smaller patches
should we ever have to look at this again.
Sascha
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next prev parent reply other threads:[~2021-11-05 9:40 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-01 12:11 Joacim Zetterling
2021-11-05 9:39 ` Sascha Hauer [this message]
2021-11-15 14:05 ` Joacim Zetterling
2021-11-17 7:23 ` Sascha Hauer
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