From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: barebox@lists.infradead.org
Cc: Ahmad Fatoum <a.fatoum@pengutronix.de>
Subject: [PATCH 07/12] clk: mux: add clk_hw registration functions
Date: Mon, 31 Jan 2022 08:57:20 +0100 [thread overview]
Message-ID: <20220131075725.1873026-8-a.fatoum@pengutronix.de> (raw)
In-Reply-To: <20220131075725.1873026-1-a.fatoum@pengutronix.de>
Save users the hassle of opencoding by providing wrappers with the same
Linux semantics: names are duplicated, same arguments and struct clk_hw
is returned.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
drivers/clk/clk-mux.c | 82 ++++++++++++++++++++++++++++++++++++++++++-
include/linux/clk.h | 27 ++++++++++++++
2 files changed, 108 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index d8c09e4a7519..d608e0e2c565 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -10,12 +10,36 @@
#include <linux/clk.h>
#include <linux/err.h>
+int clk_mux_val_to_index(struct clk_hw *hw, u32 *table, unsigned int flags,
+ unsigned int val)
+{
+ int num_parents = clk_hw_get_num_parents(hw);
+
+ if (table) {
+ int i;
+
+ for (i = 0; i < num_parents; i++)
+ if (table[i] == val)
+ return i;
+ return -EINVAL;
+ }
+
+ return val;
+}
+EXPORT_SYMBOL_GPL(clk_mux_val_to_index);
+
+unsigned int clk_mux_index_to_val(u32 *table, unsigned int flags, u8 index)
+{
+ return table ? table[index] : index;
+}
+EXPORT_SYMBOL_GPL(clk_mux_index_to_val);
+
static int clk_mux_get_parent(struct clk_hw *hw)
{
struct clk_mux *m = to_clk_mux(hw);
int idx = readl(m->reg) >> m->shift & ((1 << m->width) - 1);
- return idx;
+ return clk_mux_val_to_index(hw, m->table, m->flags, idx);
}
static int clk_mux_set_parent(struct clk_hw *hw, u8 idx)
@@ -30,6 +54,8 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 idx)
return 0;
}
+ idx = clk_mux_index_to_val(m->table, m->flags, idx);
+
val = readl(m->reg);
val &= ~(((1 << m->width) - 1) << m->shift);
val |= idx << m->shift;
@@ -186,3 +212,57 @@ struct clk *clk_register_mux(struct device_d *dev, const char *name,
return clk_mux(name, flags, reg, shift, width, parent_names,
num_parents, clk_mux_flags);
}
+
+struct clk_hw *__clk_hw_register_mux(struct device_d *dev,
+ const char *name, u8 num_parents,
+ const char * const *parent_names,
+ unsigned long flags, void __iomem *reg, u8 shift, u32 mask,
+ u8 clk_mux_flags, u32 *table, spinlock_t *lock)
+{
+ struct clk_mux *mux;
+ struct clk_hw *hw;
+ struct clk_init_data init = {};
+ u8 width = 0;
+ int ret = -EINVAL;
+
+ width = fls(mask) - ffs(mask) + 1;
+
+ if (clk_mux_flags & CLK_MUX_HIWORD_MASK) {
+ if (width + shift > 16) {
+ pr_err("mux value exceeds LOWORD field\n");
+ return ERR_PTR(-EINVAL);
+ }
+ }
+
+ /* allocate the mux */
+ mux = kzalloc(sizeof(*mux), GFP_KERNEL);
+ if (!mux)
+ return ERR_PTR(-ENOMEM);
+
+ init.name = name;
+ if (clk_mux_flags & CLK_MUX_READ_ONLY)
+ init.ops = &clk_mux_ro_ops;
+ else
+ init.ops = &clk_mux_ops;
+ init.flags = flags;
+ init.parent_names = parent_names;
+ init.num_parents = num_parents;
+
+ /* struct clk_mux assignments */
+ mux->reg = reg;
+ mux->shift = shift;
+ mux->width = width;
+ mux->flags = clk_mux_flags;
+ mux->lock = lock;
+ mux->table = table;
+ mux->hw.init = &init;
+
+ hw = &mux->hw;
+ ret = clk_hw_register(dev, hw);
+ if (ret) {
+ kfree(mux);
+ hw = ERR_PTR(ret);
+ }
+
+ return hw;
+}
diff --git a/include/linux/clk.h b/include/linux/clk.h
index 6e59418aba3c..81bd1ec2dad9 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -619,6 +619,7 @@ struct clk_mux {
int shift;
int width;
unsigned flags;
+ u32 *table;
spinlock_t *lock;
};
@@ -641,6 +642,32 @@ struct clk *clk_register_mux(struct device_d *dev, const char *name,
void __iomem *reg, u8 shift, u8 width,
u8 clk_mux_flags, spinlock_t *lock);
+struct clk_hw *__clk_hw_register_mux(struct device_d *dev,
+ const char *name, u8 num_parents,
+ const char * const *parent_names,
+ unsigned long flags, void __iomem *reg, u8 shift, u32 mask,
+ u8 clk_mux_flags, u32 *table, spinlock_t *lock);
+
+#define clk_hw_register_mux(dev, name, parent_names, \
+ num_parents, flags, reg, shift, mask, \
+ clk_mux_flags, lock) \
+ __clk_hw_register_mux((dev), (name), (num_parents), \
+ (parent_names), \
+ (flags), (reg), (shift), (mask), \
+ (clk_mux_flags), NULL, (lock))
+
+#define clk_hw_register_mux_table(dev, name, parent_names, num_parents, \
+ flags, reg, shift, mask, clk_mux_flags, \
+ table, lock) \
+ __clk_hw_register_mux((dev), (name), (num_parents), \
+ (parent_names), (flags), (reg), \
+ (shift), (mask), (clk_mux_flags), (table), \
+ (lock))
+
+int clk_mux_val_to_index(struct clk_hw *hw, u32 *table, unsigned int flags,
+ unsigned int val);
+unsigned int clk_mux_index_to_val(u32 *table, unsigned int flags, u8 index);
+
struct clk_gate {
struct clk_hw hw;
void __iomem *reg;
--
2.30.2
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next prev parent reply other threads:[~2022-01-31 7:59 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-31 7:57 [PATCH 00/12] clk: add STM32F429 clock driver support Ahmad Fatoum
2022-01-31 7:57 ` [PATCH 01/12] string: define new memdup_array Ahmad Fatoum
2022-01-31 7:57 ` [PATCH 02/12] clk: composite: add clk_hw registration functions Ahmad Fatoum
2022-01-31 7:57 ` [PATCH 03/12] clk: divider: " Ahmad Fatoum
2022-01-31 7:57 ` [PATCH 04/12] clk: fixed-factor: " Ahmad Fatoum
2022-01-31 7:57 ` [PATCH 05/12] clk: clk-fixed: " Ahmad Fatoum
2022-01-31 7:57 ` [PATCH 06/12] clk: define clk_hw_register Ahmad Fatoum
2022-01-31 7:57 ` Ahmad Fatoum [this message]
2022-01-31 7:57 ` [PATCH 08/12] clk: mux: export clk_mux_round_rate Ahmad Fatoum
2022-01-31 7:57 ` [PATCH 09/12] clk: implement of_clk_add_hw_provider Ahmad Fatoum
2022-01-31 7:57 ` [PATCH 10/12] clk: gate: add clk_hw registration functions Ahmad Fatoum
2022-01-31 7:57 ` [PATCH 11/12] ARM: stm32mp: allow driver reuse for STM32 MCUs Ahmad Fatoum
2022-01-31 7:57 ` [PATCH 12/12] clk: add clock driver for stm32f4 and stm32f7 Ahmad Fatoum
2022-02-03 10:16 ` [PATCH 00/12] clk: add STM32F429 clock driver support Sascha Hauer
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