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SFV:NSPM; SKIP:0; X-MS-Exchange-CrossPremises-SCL: 1 X-MS-Exchange-CrossPremises-Processed-By-Journaling: Journal Agent X-OrganizationHeadersPreserved: AM5P192MB0036.EURP192.PROD.OUTLOOK.COM X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220308_080821_738392_7BE9C762 X-CRM114-Status: GOOD ( 27.28 ) X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:e::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.ext.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-5.2 required=4.0 tests=AWL,BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.2 Subject: [PATCH 1/3] arch: arm: imx: spi: Add QSPI boot support to the IMX8 platforms X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) The IMX8 platforms does only support boot from a SD or an EMMC device. With this functionality also a boot from a QSPI device is possible. For the moment only the IMX8MN platform is supported. Signed-off-by: Joacim Zetterling --- arch/arm/mach-imx/Makefile | 1 + arch/arm/mach-imx/include/mach/xload.h | 1 + arch/arm/mach-imx/xload-qspi.c | 145 +++++++++++++++++++++++++ 3 files changed, 147 insertions(+) create mode 100644 arch/arm/mach-imx/xload-qspi.c diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 2cafcd77e00d..d844196422df 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -29,3 +29,4 @@ obj-$(CONFIG_BAREBOX_UPDATE_IMX_EXTERNAL_NAND) += imx-bbu-external-nand.o obj-$(CONFIG_RESET_IMX_SRC) += src.o lwl-y += cpu_init.o pbl-y += xload-spi.o xload-common.o xload-imx-nand.o xload-gpmi-nand.o +pbl-y += xload-qspi.o diff --git a/arch/arm/mach-imx/include/mach/xload.h b/arch/arm/mach-imx/include/mach/xload.h index 03ec23ebbdb0..1876f3a4bd18 100644 --- a/arch/arm/mach-imx/include/mach/xload.h +++ b/arch/arm/mach-imx/include/mach/xload.h @@ -11,6 +11,7 @@ int imx6_nand_start_image(void); int imx7_esdhc_start_image(int instance); int imx8m_esdhc_load_image(int instance, bool start); int imx8mn_esdhc_load_image(int instance, bool start); +int imx8mn_qspi_start_image(int instance, bool start); int imx8mp_esdhc_load_image(int instance, bool start); int imx_image_size(void); diff --git a/arch/arm/mach-imx/xload-qspi.c b/arch/arm/mach-imx/xload-qspi.c new file mode 100644 index 000000000000..c8305f15ee0a --- /dev/null +++ b/arch/arm/mach-imx/xload-qspi.c @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +#define HDR_SIZE 512 + +#define IMX8M_QSPI_MMAP 0x8000000 + + +static int check_ivt_header_v2(struct imx_flash_header_v2 **header_pointer, + void *buf, u32 offset, u32 ivt_offset) +{ + int i, header_count = 1; + struct imx_flash_header_v2 *hdr; + + for (i = 0; i < header_count; i++) { + hdr = buf + offset + ivt_offset; + + if (!is_imx_flash_header_v2(hdr)) { + pr_debug("IVT header not found in QSPI. " + "Found tag: 0x%02x length: 0x%04x " + "version: %02x\n", + hdr->header.tag, hdr->header.length, + hdr->header.version); + return -EINVAL; + } + + if (IS_ENABLED(CONFIG_ARCH_IMX8MQ) && + hdr->boot_data.plugin & PLUGIN_HDMI_IMAGE) { + /* + * In images that include signed HDMI + * firmware, first v2 header would be + * dedicated to that and would not contain any + * useful for us information. In order for us + * to pull the rest of the bootloader image + * in, we need to re-read header from SD/MMC, + * this time skipping anything HDMI firmware + * related. + */ + offset += hdr->boot_data.size + hdr->header.length; + header_count++; + } + } + + *header_pointer = hdr; + return 0; +} + +static int +imx8m_qspi_load_image(void __iomem *ahb_addr, ptrdiff_t address, + ptrdiff_t entry, u32 offset, u32 ivt_offset, bool start) +{ + void *buf = (void *)address; + struct imx_flash_header_v2 *hdr = NULL; + int ret, len; + void __noreturn (*bb)(void); + unsigned int ofs; + + len = imx_image_size(); + + /* Read out the data directly from the AHB buffer. */ + memcpy(buf, __io_virt((void *)ahb_addr), 0x2000); + + ret = check_ivt_header_v2(&hdr, buf, offset, ivt_offset); + if (ret) + return ret; + + pr_debug("Check ok, loading image\n"); + + ofs = offset + hdr->entry - hdr->boot_data.start; + + if (entry != address) { + /* + * Passing entry different from address is interpreted + * as a request to place the image such that its entry + * point would be exactly at 'entry', that is: + * + * buf + ofs = entry + * + * solving the above for 'buf' gives us the + * adjustment that needs to be made: + * + * buf = entry - ofs + * + */ + if (WARN_ON(entry - ofs < address)) { + /* + * We want to make sure we won't try to place + * the start of the image before the beginning + * of the memory buffer we were given in + * address. + */ + return -EINVAL; + } + + buf = (void *)(entry - ofs); + } + + /* Read out the data directly from the AHB buffer. */ + memcpy(buf, __io_virt((void *)ahb_addr), len + SZ_4K); + + pr_debug("Image loaded successfully\n"); + + if (!start) + return 0; + + bb = buf + ofs; + + sync_caches_for_execution(); + + bb(); +} + +/** + * imx8mn_qspi_start_image - Load and optionally start an image from the + * FlexSPI controller. + * @instance: The FlexSPI controller instance (0) + * @start: Whether to directly start the loaded image + * + * This uses imx8m_qspi_load_image() to load an image from QSPI. It is assumed + * that the image is the currently running barebox image (This information + * is used to calculate the length of the image). + * The image is started afterwards. + * + * Return: If successful, this function does not return (if directly started) + * or 0. A negative error code is returned when this function fails. + */ +int imx8mn_qspi_start_image(int instance, bool start) +{ + void __iomem *ahb_addr = IOMEM(IMX8M_QSPI_MMAP); + + return imx8m_qspi_load_image(ahb_addr, MX8M_DDR_CSD1_BASE_ADDR, + MX8M_ATF_BL33_BASE_ADDR, SZ_4K, 0, start); +} -- 2.25.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox