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From: Teresa Remmet <t.remmet@phytec.de>
To: barebox@lists.infradead.org
Cc: upstream@phytec.de
Subject: [PATCH] arm: imx: mmdc_size: Increase row_max for imx8m
Date: Fri, 20 May 2022 16:23:37 +0200	[thread overview]
Message-ID: <20220520142337.993417-1-t.remmet@phytec.de> (raw)

As DDRC_ADDRMAP7_ROW_B16 and DDRC_ADDRMAP7_ROW_B17 are used
now for the row size calculation we need to increase row_max to 18.

For LPDDR4 this only works in combination with ram timings
created with recent configuration spreadsheet versions.
With older versions the register DDRC_ADDRMAP7 may not be set and
calculation will lead to wrong results even with this patch.

Fixes: dad2b5636bd8 ("ARM: imx: Add imx8 support for 18 bit SDRAM row size handle")
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
---
 arch/arm/mach-imx/esdctl.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
index 8dd0ddbbc965..b070ebc62a45 100644
--- a/arch/arm/mach-imx/esdctl.c
+++ b/arch/arm/mach-imx/esdctl.c
@@ -488,7 +488,7 @@ static resource_size_t imx8m_ddrc_sdram_size(void __iomem *ddrc)
 
 	return imx_ddrc_sdram_size(ddrc, addrmap,
 				   12, ARRAY_AND_SIZE(col_b),
-				   16, ARRAY_AND_SIZE(row_b),
+				   18, ARRAY_AND_SIZE(row_b),
 				   reduced_adress_space, true);
 }
 
-- 
2.25.1


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             reply	other threads:[~2022-05-20 14:25 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-20 14:23 Teresa Remmet [this message]
2022-05-24  7:10 ` Sascha Hauer
2022-06-20 12:02 ` Ahmad Fatoum
2022-06-20 12:27   ` Teresa Remmet
2022-06-20 12:38     ` Ahmad Fatoum
2022-06-20 12:47       ` Teresa Remmet
2022-06-20 13:19         ` Ahmad Fatoum
2022-06-21 12:59           ` Teresa Remmet

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