mail archive of the barebox mailing list
 help / color / mirror / Atom feed
From: Sam Ravnborg <sam@ravnborg.org>
To: barebox@lists.infradead.org, Ahmad Fatoum <a.fatoum@pengutronix.de>
Cc: Sam Ravnborg <sam@ravnborg.org>
Subject: [PATCH v2 03/11] ARM: at91: Add initialize function to sdramc
Date: Tue, 28 Jun 2022 22:38:41 +0200	[thread overview]
Message-ID: <20220628203849.2785611-4-sam@ravnborg.org> (raw)
In-Reply-To: <20220628203849.2785611-1-sam@ravnborg.org>

Port the sdramc initialize function from at91bootstrap.
It is needed from lowlevel code and is a replacement for the
sdramc init code in at91sam926x_board_init.h

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
---
 arch/arm/mach-at91/Makefile                   |  2 +-
 arch/arm/mach-at91/at91sam9_sdramc_ll.c       | 71 +++++++++++++++++++
 .../mach-at91/include/mach/at91sam9_sdramc.h  | 12 ++++
 3 files changed, 84 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-at91/at91sam9_sdramc_ll.c

diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index bfdc89f68..12e64291b 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
 obj-y += setup.o aic.o
-lwl-y += at91_pmc_ll.o ddramc_ll.o matrix.o
+lwl-y += at91_pmc_ll.o ddramc_ll.o at91sam9_sdramc_ll.o matrix.o
 lwl-$(CONFIG_CLOCKSOURCE_ATMEL_PIT) += early_udelay.o
 
 ifeq ($(CONFIG_COMMON_CLK_OF_PROVIDER),)
diff --git a/arch/arm/mach-at91/at91sam9_sdramc_ll.c b/arch/arm/mach-at91/at91sam9_sdramc_ll.c
new file mode 100644
index 000000000..805cfbbe4
--- /dev/null
+++ b/arch/arm/mach-at91/at91sam9_sdramc_ll.c
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: BSD-1-Clause
+/*
+ * Copyright (c) 2006, Atmel Corporation
+ */
+
+#include <mach/at91sam9_sdramc.h>
+#include <mach/early_udelay.h>
+
+static inline void sdramc_wr(const struct at91sam9_sdramc_config *config,
+			     unsigned int offset,
+			     const unsigned int value)
+{
+	writel(value, config->sdramc + offset);
+}
+
+int at91sam9_sdramc_initialize(const struct at91sam9_sdramc_config *config,
+			       unsigned int sdram_address)
+{
+	unsigned int i;
+
+	/* Step#1 SDRAM feature must be in the configuration register */
+	sdramc_wr(config, AT91_SDRAMC_CR, config->cr);
+
+	/* Step#2 For mobile SDRAM, temperature-compensated self refresh(TCSR),... */
+
+	/* Step#3 The SDRAM memory type must be set in the Memory Device Register */
+	sdramc_wr(config, AT91_SDRAMC_MDR, config->mdr);
+
+	/* Step#4 The minimum pause of 200 us is provided to precede any single toggle */
+	early_udelay(200);
+
+	/* Step#5 A NOP command is issued to the SDRAM devices */
+	sdramc_wr(config, AT91_SDRAMC_MR, AT91_SDRAMC_MODE_NOP);
+	writel(0x00000000, sdram_address);
+
+	/* Step#6 An All Banks Precharge command is issued to the SDRAM devices  */
+	sdramc_wr(config, AT91_SDRAMC_MR, AT91_SDRAMC_MODE_PRECHARGE);
+	writel(0x00000000, sdram_address);
+
+	/* Pause cycles */
+	early_udelay(2000);
+
+	/* Step#7 Eight auto-refresh cycles are provided */
+	for (i = 0; i < 8; i++) {
+		sdramc_wr(config, AT91_SDRAMC_MR, AT91_SDRAMC_MODE_REFRESH);
+		writel(0x00000001 + i, sdram_address + 4 + 4 * i);
+	}
+
+	/* Pause cycles */
+	early_udelay(200);
+
+	/* Step#8 A Mode Register set (MRS) cycle is issued to program (TCSR, PASR, DS) */
+	sdramc_wr(config, AT91_SDRAMC_MR, AT91_SDRAMC_MODE_LMR);
+	writel(0xcafedede, sdram_address + 0x24);
+
+	/*  Pause cycles */
+	early_udelay(200);
+
+	/* Step#9 For mobile SDRAM initialization, an Extended Mode Register set ... */
+
+	/* Step#10 The application must go into Normal Mode, setting Mode to 0
+	 * and perform a write access at any location in the SDRAM.
+	 */
+	sdramc_wr(config, AT91_SDRAMC_MR, AT91_SDRAMC_MODE_NORMAL);	// Set mode
+	writel(0x00000000, sdram_address);				// Perform mode
+
+	/* Step#11 Write the refresh rate into the count field in the Refresh Register. */
+	sdramc_wr(config, AT91_SDRAMC_TR, config->tr);
+
+	return 0;
+}
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
index 3cda10165..c5271af82 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
@@ -85,6 +85,18 @@
 #include <mach/at91sam9261.h>
 #include <mach/at91sam9263.h>
 
+struct at91sam9_sdramc_config {
+	void __iomem *sdramc;
+	unsigned int mr;
+	unsigned int tr;
+	unsigned int cr;
+	unsigned int lpr;
+	unsigned int mdr;
+};
+
+int at91sam9_sdramc_initialize(const struct at91sam9_sdramc_config *config,
+			       unsigned int sdram_address);
+
 static inline u32 at91_get_sdram_size(void *base)
 {
 	u32 val;
-- 
2.34.1




  parent reply	other threads:[~2022-06-28 20:40 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-28 20:38 [PATCH 0/11] ARM: at91: Add pbl support to skov-arm9cpu Sam Ravnborg
2022-06-28 20:38 ` [PATCH v2 01/11] pwm: atmel: Fix build and update Sam Ravnborg
2022-06-28 20:38 ` [PATCH v2 02/11] ARM: at91: Make sdramc.h useable in multi image builds Sam Ravnborg
2022-06-29  6:50   ` Ahmad Fatoum
2022-06-28 20:38 ` Sam Ravnborg [this message]
2022-06-29  6:50   ` [PATCH v2 03/11] ARM: at91: Add initialize function to sdramc Ahmad Fatoum
2022-06-28 20:38 ` [PATCH v2 04/11] ARM: at91: Provide at91_mux_pio_pin for use in lowlevel Sam Ravnborg
2022-06-29  6:50   ` Ahmad Fatoum
2022-06-28 20:38 ` [PATCH v2 05/11] mci: atmel_mci: Add PBL helper to configure highcapacity Sam Ravnborg
2022-06-29  6:50   ` Ahmad Fatoum
2022-06-28 20:38 ` [PATCH v2 06/11] ARM: at91: Add at91sam9 xload_mmc for PBL use Sam Ravnborg
2022-06-29  6:50   ` Ahmad Fatoum
2022-06-28 20:38 ` [PATCH v2 07/11] ARM: at91: Add extra register definitions Sam Ravnborg
2022-06-29  6:49   ` Ahmad Fatoum
2022-06-28 20:38 ` [PATCH v2 08/11] ARM: at91: Add lowlevel helpers for at91sam9263 Sam Ravnborg
2022-06-29  6:50   ` Ahmad Fatoum
2022-06-28 20:38 ` [WIP PATCH v2 09/11] atmel_lcdfb: add support for updated DT bindings Sam Ravnborg
2022-06-28 20:38 ` [PATCH v2 10/11] ARM: at91: Add xload support to skov-arm9cpu Sam Ravnborg
2022-06-28 20:47   ` Sam Ravnborg
2022-06-28 20:38 ` [WIP PATCH v2 11/11] ARM: at91: Update DTS for skov-arm9cpu Sam Ravnborg
2022-06-30 12:19 ` [PATCH 0/11] ARM: at91: Add pbl support to skov-arm9cpu Sascha Hauer

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220628203849.2785611-4-sam@ravnborg.org \
    --to=sam@ravnborg.org \
    --cc=a.fatoum@pengutronix.de \
    --cc=barebox@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox