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X-OriginatorOrg: leica-geosystems.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Jan 2023 11:37:31.6175 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ebf1b107-4edf-4e84-d79c-08daf3c839eb X-MS-Exchange-CrossTenant-Id: 1b16ab3e-b8f6-4fe3-9f3e-2db7fe549f6a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=1b16ab3e-b8f6-4fe3-9f3e-2db7fe549f6a;Ip=[193.8.40.94];Helo=[aherlnxbspsrv01.lgs-net.com] X-MS-Exchange-CrossTenant-AuthSource: VI1EUR02FT060.eop-EUR02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR06MB3997 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230111_033737_998385_5A8CE81D X-CRM114-Status: GOOD ( 12.07 ) X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:3::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.ext.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-4.9 required=4.0 tests=AWL,BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.2 Subject: [PATCH v4] ARM: i.MX8M: separate function call for clock_init X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) Add a separate function call for imx8mp_early_clock_init, to avoid confusion with imx8mm. Signed-off-by: Johannes Schneider --- arch/arm/boards/nxp-imx8mp-evk/lowlevel.c | 2 +- arch/arm/boards/tqma8mpxl/lowlevel.c | 2 +- arch/arm/mach-imx/imx8m.c | 12 +++++++++--- arch/arm/mach-imx/include/mach/imx8m-ccm-regs.h | 1 + 4 files changed, 12 insertions(+), 5 deletions(-) diff --git a/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c index 4f24dd4cd4..3cb24df1ca 100644 --- a/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c @@ -72,7 +72,7 @@ static void power_init_board(void) imx8mp_setup_pad(MX8MP_PAD_I2C1_SCL__I2C1_SCL | I2C_PAD_CTRL); imx8mp_setup_pad(MX8MP_PAD_I2C1_SDA__I2C1_SDA | I2C_PAD_CTRL); - imx8mm_early_clock_init(); + imx8mp_early_clock_init(); imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1); i2c = imx8m_i2c_early_init(IOMEM(MX8MP_I2C1_BASE_ADDR)); diff --git a/arch/arm/boards/tqma8mpxl/lowlevel.c b/arch/arm/boards/tqma8mpxl/lowlevel.c index 0ce0e7a73b..037c7abf4b 100644 --- a/arch/arm/boards/tqma8mpxl/lowlevel.c +++ b/arch/arm/boards/tqma8mpxl/lowlevel.c @@ -73,7 +73,7 @@ static void power_init_board(void) imx8mp_setup_pad(MX8MP_PAD_I2C1_SCL__I2C1_SCL | I2C_PAD_CTRL); imx8mp_setup_pad(MX8MP_PAD_I2C1_SDA__I2C1_SDA | I2C_PAD_CTRL); - imx8mm_early_clock_init(); + imx8mp_early_clock_init(); imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_I2C1); i2c = imx8m_i2c_early_init(IOMEM(MX8MP_I2C1_BASE_ADDR)); diff --git a/arch/arm/mach-imx/imx8m.c b/arch/arm/mach-imx/imx8m.c index 9758525b54..7f3856e545 100644 --- a/arch/arm/mach-imx/imx8m.c +++ b/arch/arm/mach-imx/imx8m.c @@ -182,7 +182,7 @@ int imx8mq_init(void) #define IMX8MM_CCM_ANALOG_SYS_PLL2_GEN_CTRL 0x104 #define IMX8MM_CCM_ANALOG_SYS_PLL3_GEN_CTRL 0x114 -static void __imx8mm_early_clock_init(unsigned long pll3_freq) /* and later */ +static void __imx8m_early_clock_init(unsigned long pll3_freq) /* and later */ { void __iomem *ana = IOMEM(MX8M_ANATOP_BASE_ADDR); void __iomem *ccm = IOMEM(MX8M_CCM_BASE_ADDR); @@ -252,14 +252,20 @@ static void __imx8mm_early_clock_init(unsigned long pll3_freq) /* and later */ void imx8mm_early_clock_init(void) { - __imx8mm_early_clock_init(750000000UL); + __imx8m_early_clock_init(750000000UL); } void imx8mn_early_clock_init(void) { - __imx8mm_early_clock_init(600000000UL); + __imx8m_early_clock_init(600000000UL); } +void imx8mp_early_clock_init(void) +{ + __imx8m_early_clock_init(750000000UL); +} + + #define KEEP_ALIVE 0x18 #define VER_L 0x1c #define VER_H 0x20 diff --git a/arch/arm/mach-imx/include/mach/imx8m-ccm-regs.h b/arch/arm/mach-imx/include/mach/imx8m-ccm-regs.h index eeb15f4dd0..659615e1cc 100644 --- a/arch/arm/mach-imx/include/mach/imx8m-ccm-regs.h +++ b/arch/arm/mach-imx/include/mach/imx8m-ccm-regs.h @@ -53,6 +53,7 @@ void imx8m_early_setup_uart_clock(void); void imx8mm_early_clock_init(void); void imx8mn_early_clock_init(void); +void imx8mp_early_clock_init(void); void imx8m_clock_set_target_val(int clock_id, u32 val); void imx8m_ccgr_clock_enable(int index); void imx8m_ccgr_clock_disable(int index); -- 2.25.1