* [PATCH] ARM: i.MX8MM: innocomm-wb15: use revised PMIC settings
@ 2023-01-30 7:21 Ahmad Fatoum
2023-01-31 8:20 ` Sascha Hauer
0 siblings, 1 reply; 2+ messages in thread
From: Ahmad Fatoum @ 2023-01-30 7:21 UTC (permalink / raw)
To: barebox; +Cc: Ahmad Fatoum
Original values used when WB15 support was upstreamed were taken from
EVK, but original U-Boot port, we had been running for years now, is
configured differently and is known to be stable. Revert to those values.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
.../arm/boards/innocomm-imx8mm-wb15/lowlevel.c | 18 ++++++++++++++----
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boards/innocomm-imx8mm-wb15/lowlevel.c b/arch/arm/boards/innocomm-imx8mm-wb15/lowlevel.c
index 2077d3c88eb2..f7753bd32671 100644
--- a/arch/arm/boards/innocomm-imx8mm-wb15/lowlevel.c
+++ b/arch/arm/boards/innocomm-imx8mm-wb15/lowlevel.c
@@ -35,14 +35,24 @@ static void setup_uart(void)
}
static struct pmic_config bd71837_cfg[] = {
+ /* unlock the PMIC regs */
+ { BD718XX_REGLOCK, 0x0 },
+ /* retry powering up indefinitely every 250ms after VR fault */
+ { BD718XX_RCVCFG, 0xfc },
/* decrease RESET key long push time from the default 10s to 10ms */
{ BD718XX_PWRONCONFIG1, 0x0 },
- /* unlock the PMIC regs */
- { BD718XX_REGLOCK, 0x1 },
+ /* WDOG_B: Warm Reset */
+ { BD718XX_PWRCTRL0, 0xa3 },
+ /* READY=>SNVS on PMIC_ON_REQ, SNVS=>RUN on VSYS_UVLO */
+ { BD718XX_TRANS_COND0, 0x48 },
+ /* WDOG_B: Go to SNVS power state after deassert */
+ { BD718XX_TRANS_COND1, 0xc0 },
/* Set VDD_SOC/VDD_DRAM to typical value 0.85v for nominal mode */
{ BD718XX_BUCK1_VOLT_RUN, 0xf },
- /* increase VDD_DRAM to 0.975v for 3Ghz DDR */
- { BD718XX_1ST_NODVS_BUCK_VOLT, 0x83 },
+ /* increase VDD_DRAM to 0.900v for 2400MT/s DDR */
+ { BD718XX_1ST_NODVS_BUCK_VOLT, 0x02 },
+ /* set BUCK8 to 1.10v */
+ { BD718XX_4TH_NODVS_BUCK_VOLT, 0x1e },
/* lock the PMIC regs */
{ BD718XX_REGLOCK, 0x11 },
};
--
2.30.2
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] ARM: i.MX8MM: innocomm-wb15: use revised PMIC settings
2023-01-30 7:21 [PATCH] ARM: i.MX8MM: innocomm-wb15: use revised PMIC settings Ahmad Fatoum
@ 2023-01-31 8:20 ` Sascha Hauer
0 siblings, 0 replies; 2+ messages in thread
From: Sascha Hauer @ 2023-01-31 8:20 UTC (permalink / raw)
To: Ahmad Fatoum; +Cc: barebox
On Mon, Jan 30, 2023 at 08:21:57AM +0100, Ahmad Fatoum wrote:
> Original values used when WB15 support was upstreamed were taken from
> EVK, but original U-Boot port, we had been running for years now, is
> configured differently and is known to be stable. Revert to those values.
>
> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> ---
> .../arm/boards/innocomm-imx8mm-wb15/lowlevel.c | 18 ++++++++++++++----
> 1 file changed, 14 insertions(+), 4 deletions(-)
Applied, thanks
Sascha
>
> diff --git a/arch/arm/boards/innocomm-imx8mm-wb15/lowlevel.c b/arch/arm/boards/innocomm-imx8mm-wb15/lowlevel.c
> index 2077d3c88eb2..f7753bd32671 100644
> --- a/arch/arm/boards/innocomm-imx8mm-wb15/lowlevel.c
> +++ b/arch/arm/boards/innocomm-imx8mm-wb15/lowlevel.c
> @@ -35,14 +35,24 @@ static void setup_uart(void)
> }
>
> static struct pmic_config bd71837_cfg[] = {
> + /* unlock the PMIC regs */
> + { BD718XX_REGLOCK, 0x0 },
> + /* retry powering up indefinitely every 250ms after VR fault */
> + { BD718XX_RCVCFG, 0xfc },
> /* decrease RESET key long push time from the default 10s to 10ms */
> { BD718XX_PWRONCONFIG1, 0x0 },
> - /* unlock the PMIC regs */
> - { BD718XX_REGLOCK, 0x1 },
> + /* WDOG_B: Warm Reset */
> + { BD718XX_PWRCTRL0, 0xa3 },
> + /* READY=>SNVS on PMIC_ON_REQ, SNVS=>RUN on VSYS_UVLO */
> + { BD718XX_TRANS_COND0, 0x48 },
> + /* WDOG_B: Go to SNVS power state after deassert */
> + { BD718XX_TRANS_COND1, 0xc0 },
> /* Set VDD_SOC/VDD_DRAM to typical value 0.85v for nominal mode */
> { BD718XX_BUCK1_VOLT_RUN, 0xf },
> - /* increase VDD_DRAM to 0.975v for 3Ghz DDR */
> - { BD718XX_1ST_NODVS_BUCK_VOLT, 0x83 },
> + /* increase VDD_DRAM to 0.900v for 2400MT/s DDR */
> + { BD718XX_1ST_NODVS_BUCK_VOLT, 0x02 },
> + /* set BUCK8 to 1.10v */
> + { BD718XX_4TH_NODVS_BUCK_VOLT, 0x1e },
> /* lock the PMIC regs */
> { BD718XX_REGLOCK, 0x11 },
> };
> --
> 2.30.2
>
>
>
--
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