* [PATCH] pinctrl: rockchip: fix get_value
@ 2023-02-09 9:56 Kilian Strasser
2023-02-10 9:50 ` Sascha Hauer
0 siblings, 1 reply; 2+ messages in thread
From: Kilian Strasser @ 2023-02-09 9:56 UTC (permalink / raw)
To: barebox; +Cc: Kilian Strasser
Function gpioinfo returns wrong gpio values.
In the file pinctrl.rockchip.c a wrong register offset is used by the
function rockchip_gpiov2_get_value. Also the bit-mask for this register
is wrong. Change register offset for this function to GPIO_EXT_PORT and
set the bit-mask correctly.
Signed-off-by: Kilian Strasser <kilian.strasser@wolfvision.net>
---
drivers/pinctrl/pinctrl-rockchip.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index c99074407f..66d700d324 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -226,6 +226,7 @@ enum {
RK_GPIOV2_DR_H = 0x04,
RK_GPIOV2_DDR_L = 0x08,
RK_GPIOV2_DDR_H = 0x0c,
+ RK_GPIOV2_EXT_PORT = 0x70,
};
static struct rockchip_pin_bank *gc_to_rockchip_pinctrl(struct gpio_chip *gc)
@@ -306,12 +307,8 @@ static int rockchip_gpiov2_get_value(struct gpio_chip *gc, unsigned int gpio)
struct rockchip_pin_bank *bank = gc_to_rockchip_pinctrl(gc);
u32 mask, r;
- mask = 1 << (gpio % 16);
-
- if (gpio < 16)
- r = readl(bank->reg_base + RK_GPIOV2_DR_L);
- else
- r = readl(bank->reg_base + RK_GPIOV2_DR_L);
+ mask = 1 << (gpio % 32);
+ r = readl(bank->reg_base + RK_GPIOV2_EXT_PORT);
return r & mask ? 1 : 0;
}
--
2.34.1
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] pinctrl: rockchip: fix get_value
2023-02-09 9:56 [PATCH] pinctrl: rockchip: fix get_value Kilian Strasser
@ 2023-02-10 9:50 ` Sascha Hauer
0 siblings, 0 replies; 2+ messages in thread
From: Sascha Hauer @ 2023-02-10 9:50 UTC (permalink / raw)
To: Kilian Strasser; +Cc: barebox
On Thu, Feb 09, 2023 at 10:56:40AM +0100, Kilian Strasser wrote:
> Function gpioinfo returns wrong gpio values.
> In the file pinctrl.rockchip.c a wrong register offset is used by the
> function rockchip_gpiov2_get_value. Also the bit-mask for this register
> is wrong. Change register offset for this function to GPIO_EXT_PORT and
> set the bit-mask correctly.
>
> Signed-off-by: Kilian Strasser <kilian.strasser@wolfvision.net>
> ---
> drivers/pinctrl/pinctrl-rockchip.c | 9 +++------
> 1 file changed, 3 insertions(+), 6 deletions(-)
Applied, thanks
Sascha
>
> diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
> index c99074407f..66d700d324 100644
> --- a/drivers/pinctrl/pinctrl-rockchip.c
> +++ b/drivers/pinctrl/pinctrl-rockchip.c
> @@ -226,6 +226,7 @@ enum {
> RK_GPIOV2_DR_H = 0x04,
> RK_GPIOV2_DDR_L = 0x08,
> RK_GPIOV2_DDR_H = 0x0c,
> + RK_GPIOV2_EXT_PORT = 0x70,
> };
>
> static struct rockchip_pin_bank *gc_to_rockchip_pinctrl(struct gpio_chip *gc)
> @@ -306,12 +307,8 @@ static int rockchip_gpiov2_get_value(struct gpio_chip *gc, unsigned int gpio)
> struct rockchip_pin_bank *bank = gc_to_rockchip_pinctrl(gc);
> u32 mask, r;
>
> - mask = 1 << (gpio % 16);
> -
> - if (gpio < 16)
> - r = readl(bank->reg_base + RK_GPIOV2_DR_L);
> - else
> - r = readl(bank->reg_base + RK_GPIOV2_DR_L);
> + mask = 1 << (gpio % 32);
> + r = readl(bank->reg_base + RK_GPIOV2_EXT_PORT);
>
> return r & mask ? 1 : 0;
> }
> --
> 2.34.1
>
>
>
--
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