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From: Sascha Hauer <sha@pengutronix.de>
To: Kopfensteiner_Michael <michael.kopfensteiner@vahle.com>
Cc: "barebox@lists.infradead.org" <barebox@lists.infradead.org>
Subject: Re: [PATCH 2/3] ARM: IMX8MP: add initial support for Variscite DT8MCustomBoard with iMX8MP
Date: Wed, 22 Feb 2023 13:43:19 +0100	[thread overview]
Message-ID: <20230222124319.GM10447@pengutronix.de> (raw)
In-Reply-To: <AM6PR04MB650360BA128BCF51CF7A18FCE1AA9@AM6PR04MB6503.eurprd04.prod.outlook.com>

On Wed, Feb 22, 2023 at 11:15:24AM +0000, Kopfensteiner_Michael wrote:
> Hi Sasha,
> 
> thanks for your remarks on my patches. I agree with your comments.
> I will rework the patches and submit a second version soon.
> 
> I added a small reply to the memory node remark to point out,
> that I have no possibility to test my solution with other hardware
> configurations and I am unsure whether I choose the best solution.
> 
> On Tue, Feb 21, 2023 at 10:20AM +0100, Sascha Hauer wrote:
> 
> [snip]
> 
> >> diff --git a/arch/arm/dts/imx8mp-var-dart-dt8mcustomboard.dts b/arch/arm/dts/imx8mp-var-dart-dt8mcustomboard.dts
> >> new file mode 100644
> >> index 0000000000..704289aa0b
> >> --- /dev/null
> >> +++ b/arch/arm/dts/imx8mp-var-dart-dt8mcustomboard.dts
> >> @@ -0,0 +1,680 @@
> >> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> >> +/*
> >> + * Copyright 2019 NXP
> >> + * Copyright 2020-2021 Variscite Ltd.
> >> + * Copyright 2023 VAHLE Automation GmbH
> >> + */
> >> +
> >> +#include "imx8mp-var-dart.dtsi"
> >> +
> >> +/ {
> >> +     model = "Variscite DART-MX8M-PLUS on DT8MCustomBoard 2.x";
> >> +
> >> +     // use the memory controller instead
> >> +     /delete-node/ memory@40000000;
> >
> > Better don't add this node to the dtsi file. Is the memory size detected
> > correctly? The dtsi file describes 6 GiB of memory which is rather
> > unusual. Is that what your board has?
> >
> 
> I will delete the memory node.
> 
> As for the memory size:
> Those modules are sold with RAM ranging from 1 to 8 GiB, my module actually
> has 4GiB of RAM. The dtsi used was taken from Variscites provided linux sources.
> Hence I thought it might be nice to rely on the memory controller to figure the actual
> configuration out. I ran "memtest" successfully and used "devinfo mem0" to
> validate, that it does see 4GiB of RAM for this node.
> But I haven't checked whether some other RAM size option gets detected correctly
> as well, as I only have this one SOM at hand.

I just stumbled over the 6 GiB in the dtsi file. If your 4 GiB are detected
ok then everything is fine.

> [snip]
> 
> By the way, I have base those patches on the "next" branch, but I realized
> that I have no clue what is preferred by the project's maintainers.
> Shall I base those patches on "master" instead?

It usually doesn't matter. Normally there are no conflicts and I'll
handle trivial conflicts in either direction here at my side. For non
trivial conflicts we'll have to look at the individual case.

Sascha

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
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  reply	other threads:[~2023-02-22 12:44 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-20  9:06 [PATCH 1/3] gio: add support for PCAL6408 chip to the pca953x driver Michael Kopfensteiner
2023-02-20  9:06 ` [PATCH 2/3] ARM: IMX8MP: add initial support for Variscite DT8MCustomBoard with iMX8MP Michael Kopfensteiner
2023-02-21  9:20   ` Sascha Hauer
2023-02-22 11:15     ` Kopfensteiner_Michael
2023-02-22 12:43       ` Sascha Hauer [this message]
2023-02-21  9:24   ` Sascha Hauer
2023-02-20  9:06 ` [PATCH 3/3] Documentation: IMX: add doc for the Variscite DT8MCustomBoard Michael Kopfensteiner

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