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* [PATCH] Documentation: imx: improve reboot mode section
@ 2023-03-20 11:41 Roland Hieber
  2023-03-21  8:13 ` Sascha Hauer
  0 siblings, 1 reply; 2+ messages in thread
From: Roland Hieber @ 2023-03-20 11:41 UTC (permalink / raw)
  To: barebox; +Cc: Roland Hieber

Signed-off-by: Roland Hieber <rhi@pengutronix.de>
---
 Documentation/boards/imx.rst | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/Documentation/boards/imx.rst b/Documentation/boards/imx.rst
index 6c16923340a8..6fbf1554d10e 100644
--- a/Documentation/boards/imx.rst
+++ b/Documentation/boards/imx.rst
@@ -86,8 +86,8 @@ The images can also always be started as second stage on the target:
 BootROM Reboot mode codes (bmode)
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-For select SoCs, barebox supports communicating an alternative boot medium
-that BootROM should select after a warm reset::
+For selected SoCs, barebox supports communicating an alternative boot medium
+that the BootROM should select after a warm reset::
 
   barebox@FSL i.MX8MM EVK board:/ devinfo gpr.reboot_mode
   Driver: syscon-reboot-mode
@@ -107,10 +107,17 @@ that BootROM should select after a warm reset::
 
   barebox@FSL i.MX8MM EVK board:/ gpr.reboot_mode.next=serial reset -w
 
-This will cause barebox to fall into serial download mode on an i.MX8MM.
+The example above will cause barebox to jump back into serial download mode on
+an i.MX8MM by writing 0x10 into the *SRC_GPR9* register (offset 0x30390094) and
+0x40000000 into the *SRC_GPR10* register (offset 0x30390098), and then issuing a
+warm :ref:`reset <command_reset>`.
 
 Different SoCs may have more possible reboot modes available.
-See the section on :ref:`Reboot modes<reboot_mode>` for more information.
+Look for documentation of the *SRC_SBMR* and *SRC_GPR* registers in the
+Reference Manual of your SoC; the values for the ``mode-*`` properties often
+correspond directly to the boot fusemap settings.
+
+See the section on :ref:`Reboot modes<reboot_mode>` for general information.
 
 High Assurance Boot
 ^^^^^^^^^^^^^^^^^^^
-- 
2.30.2




^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] Documentation: imx: improve reboot mode section
  2023-03-20 11:41 [PATCH] Documentation: imx: improve reboot mode section Roland Hieber
@ 2023-03-21  8:13 ` Sascha Hauer
  0 siblings, 0 replies; 2+ messages in thread
From: Sascha Hauer @ 2023-03-21  8:13 UTC (permalink / raw)
  To: Roland Hieber; +Cc: barebox

On Mon, Mar 20, 2023 at 12:41:23PM +0100, Roland Hieber wrote:
> Signed-off-by: Roland Hieber <rhi@pengutronix.de>
> ---
>  Documentation/boards/imx.rst | 15 +++++++++++----
>  1 file changed, 11 insertions(+), 4 deletions(-)

Applied, thanks

Sascha

> 
> diff --git a/Documentation/boards/imx.rst b/Documentation/boards/imx.rst
> index 6c16923340a8..6fbf1554d10e 100644
> --- a/Documentation/boards/imx.rst
> +++ b/Documentation/boards/imx.rst
> @@ -86,8 +86,8 @@ The images can also always be started as second stage on the target:
>  BootROM Reboot mode codes (bmode)
>  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>  
> -For select SoCs, barebox supports communicating an alternative boot medium
> -that BootROM should select after a warm reset::
> +For selected SoCs, barebox supports communicating an alternative boot medium
> +that the BootROM should select after a warm reset::
>  
>    barebox@FSL i.MX8MM EVK board:/ devinfo gpr.reboot_mode
>    Driver: syscon-reboot-mode
> @@ -107,10 +107,17 @@ that BootROM should select after a warm reset::
>  
>    barebox@FSL i.MX8MM EVK board:/ gpr.reboot_mode.next=serial reset -w
>  
> -This will cause barebox to fall into serial download mode on an i.MX8MM.
> +The example above will cause barebox to jump back into serial download mode on
> +an i.MX8MM by writing 0x10 into the *SRC_GPR9* register (offset 0x30390094) and
> +0x40000000 into the *SRC_GPR10* register (offset 0x30390098), and then issuing a
> +warm :ref:`reset <command_reset>`.
>  
>  Different SoCs may have more possible reboot modes available.
> -See the section on :ref:`Reboot modes<reboot_mode>` for more information.
> +Look for documentation of the *SRC_SBMR* and *SRC_GPR* registers in the
> +Reference Manual of your SoC; the values for the ``mode-*`` properties often
> +correspond directly to the boot fusemap settings.
> +
> +See the section on :ref:`Reboot modes<reboot_mode>` for general information.
>  
>  High Assurance Boot
>  ^^^^^^^^^^^^^^^^^^^
> -- 
> 2.30.2
> 
> 
> 

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