From mboxrd@z Thu Jan 1 00:00:00 1970 Delivery-date: Fri, 12 May 2023 13:11:46 +0200 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by lore.white.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1pxQgc-00F2QQ-Ro for lore@lore.pengutronix.de; Fri, 12 May 2023 13:11:45 +0200 Received: from bombadil.infradead.org ([2607:7c80:54:3::133]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1pxQgZ-0004vB-No for lore@pengutronix.de; Fri, 12 May 2023 13:11:45 +0200 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=214y+loIr6NHHSgSQSjn18C/VRb+XWfPqzz+lXSknLo=; b=l17Ade6Z4PcqVquMYeeH5mWHUx zn018L4BzCWofwEITO3Pi786FiBHjyizkvenHB6xSyZdd08bQvNCZWKtLgqA61Sz6nojycP2cXj+6 2WvLZC3DqptJs86pz5JlQdJCbTdknnY0w5cGHdVvvvwknsGG9megtB96yidq7UrM1EaKaO7MDIEv1 C2uLvIvvMvXDg3P4pJVt72jk9faPpF93HobjSelZZ+swdvFfiYyQYdC1mHSseFRY9DA/DVqIdfvKq X2txMmU+meEmhzN5JsU8x5OvA009zM/7ZKV1tOvSOkr1sqEy9eflmuF0k0lkw+4SHMDZnzh70HOUT 2RJYcrcA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pxQfY-00BkBw-10; Fri, 12 May 2023 11:10:40 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pxQfE-00BjtU-2o for barebox@lists.infradead.org; Fri, 12 May 2023 11:10:26 +0000 Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1pxQf7-0003d3-OT; Fri, 12 May 2023 13:10:13 +0200 Received: from [2a0a:edc0:0:1101:1d::28] (helo=dude02.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1pxQf6-002wjH-Ta; Fri, 12 May 2023 13:10:12 +0200 Received: from sha by dude02.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1pxQf4-0055EM-9n; Fri, 12 May 2023 13:10:10 +0200 From: Sascha Hauer To: Barebox List Date: Fri, 12 May 2023 13:09:56 +0200 Message-Id: <20230512111008.1120833-16-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230512111008.1120833-1-s.hauer@pengutronix.de> References: <20230512111008.1120833-1-s.hauer@pengutronix.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230512_041020_960551_CE88FCDE X-CRM114-Status: GOOD ( 12.96 ) X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:3::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.ext.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-4.9 required=4.0 tests=AWL,BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.2 Subject: [PATCH 15/27] ARM: mmu32: create alloc_pte() X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) This is a preparation for using two level page tables in the PBL. To do that we need a way to allocate page tables in PBL. As malloc is not available in PBL, implement a function to allocate a page table from the area we also place the TTB. Signed-off-by: Sascha Hauer --- arch/arm/cpu/mmu_32.c | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/mmu_32.c b/arch/arm/cpu/mmu_32.c index 4050d96846..a82382ad1e 100644 --- a/arch/arm/cpu/mmu_32.c +++ b/arch/arm/cpu/mmu_32.c @@ -76,6 +76,27 @@ static bool pgd_type_table(u32 pgd) return (pgd & PMD_TYPE_MASK) == PMD_TYPE_TABLE; } +#define PTE_SIZE (PTRS_PER_PTE * sizeof(u32)) + +#ifdef __PBL__ +static uint32_t *alloc_pte(void) +{ + static unsigned int idx = 3; + + idx++; + + if (idx * PTE_SIZE >= ARM_EARLY_PAGETABLE_SIZE) + return NULL; + + return (void *)ttb + idx * PTE_SIZE; +} +#else +static uint32_t *alloc_pte(void) +{ + return xmemalign(PTE_SIZE, PTE_SIZE); +} +#endif + static u32 *find_pte(unsigned long adr) { u32 *table; @@ -125,8 +146,7 @@ static u32 *arm_create_pte(unsigned long virt, uint32_t flags) virt = ALIGN_DOWN(virt, PGDIR_SIZE); - table = xmemalign(PTRS_PER_PTE * sizeof(u32), - PTRS_PER_PTE * sizeof(u32)); + table = alloc_pte(); if (!ttb) arm_mmu_not_initialized_error(); -- 2.39.2