From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH] ARM: mmu_32: Fix zero page faulting
Date: Thu, 1 Jun 2023 13:41:43 +0200 [thread overview]
Message-ID: <20230601114143.1515209-1-s.hauer@pengutronix.de> (raw)
Even with MAP_FAULT we still set PTE_TYPE_SMALL in the 2nd level page
table. With this the zero page doesn't fault on ARMv6 and earlier. Fix
this by only setting PTE_TYPE_SMALL when the map_type is not MAP_FAULT.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/cpu/mmu_32.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/mmu_32.c b/arch/arm/cpu/mmu_32.c
index 14775768a3..a6cb3e04f4 100644
--- a/arch/arm/cpu/mmu_32.c
+++ b/arch/arm/cpu/mmu_32.c
@@ -266,7 +266,9 @@ static void __arch_remap_range(void *_virt_addr, phys_addr_t phys_addr, size_t s
* replace it with a section
*/
chunk = PGDIR_SIZE;
- *pgd = phys_addr | pmd_flags | PMD_TYPE_SECT;
+ *pgd = phys_addr | pmd_flags;
+ if (map_type != MAP_FAULT)
+ *pgd |= PMD_TYPE_SECT;
dma_flush_range(pgd, sizeof(*pgd));
} else {
unsigned int num_ptes;
@@ -306,7 +308,9 @@ static void __arch_remap_range(void *_virt_addr, phys_addr_t phys_addr, size_t s
for (i = 0; i < num_ptes; i++) {
pte[i] = phys_addr + i * PAGE_SIZE;
- pte[i] |= pte_flags | PTE_TYPE_SMALL;
+ pte[i] |= pte_flags;
+ if (map_type != MAP_FAULT)
+ pte[i] |= PTE_TYPE_SMALL;
}
dma_flush_range(pte, num_ptes * sizeof(u32));
--
2.39.2
reply other threads:[~2023-06-01 11:43 UTC|newest]
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