From: Sascha Hauer <sha@pengutronix.de>
To: Marco Felsch <m.felsch@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH] ARM: i.MX8M: iomux-mx8mm: add pad ctrl defines
Date: Fri, 23 Jun 2023 11:38:34 +0200 [thread overview]
Message-ID: <20230623093834.GP18491@pengutronix.de> (raw)
In-Reply-To: <20230622181907.3167989-1-m.felsch@pengutronix.de>
On Thu, Jun 22, 2023 at 08:19:07PM +0200, Marco Felsch wrote:
> Add pad ctrl defines like already done for the 8mp.
>
> Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
> ---
> include/mach/imx/iomux-mx8mm.h | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/include/mach/imx/iomux-mx8mm.h b/include/mach/imx/iomux-mx8mm.h
> index f2ebde3d3b..24e7e4afe3 100644
> --- a/include/mach/imx/iomux-mx8mm.h
> +++ b/include/mach/imx/iomux-mx8mm.h
> @@ -691,6 +691,16 @@ enum {
> IMX8MM_PAD_UART4_TXD_GPIO5_IO29 = IOMUX_PAD(0x04B8, 0x0250, 5, 0x0000, 0, 0),
> };
>
> +#define MX8MM_PAD_CTL_DSE1 (0 << 1)
> +#define MX8MM_PAD_CTL_DSE2 (2 << 1)
> +#define MX8MM_PAD_CTL_DSE4 (1 << 1)
> +#define MX8MM_PAD_CTL_DSE6 (3 << 1)
> +#define MX8MM_PAD_CTL_FSEL BIT(4)
> +#define MX8MM_PAD_CTL_ODE BIT(5)
> +#define MX8MM_PAD_CTL_PUE BIT(6)
> +#define MX8MM_PAD_CTL_HYS BIT(7)
> +#define MX8MM_PAD_CTL_PE BIT(8)
Can't we just add MX8M_PAD_CTL_* defines? They are likely all the same
for all i.MX8M variants.
Sascha
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prev parent reply other threads:[~2023-06-23 9:39 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-22 18:19 Marco Felsch
2023-06-23 9:38 ` Sascha Hauer [this message]
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