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* [PATCH 1/3] kvx: Add missing include/asm/mmu.h
@ 2023-06-27 15:42 oss
  2023-06-27 15:42 ` [PATCH 2/3] kvx: Replace dinval alias with d1inval oss
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: oss @ 2023-06-27 15:42 UTC (permalink / raw)
  To: barebox; +Cc: jmaselbas, ysionneau

From: Jules Maselbas <jmaselbas@kalray.eu>

Since the rework of remap_range each architecture is expected to have
the asm/mmu.h header, this wasn't the case for kvx, fix this.

By default the KV3-1 cpu (as found in Coolidge SoC) starts with all memory
uncached and MMU disabled. Data and instruction L1-caches are enabled very
early during barebox start code, see arch/kvx/cpu/start.S, using the wfxl
instruction to modify DCE and ICE (resp. Data and Instruction Cache Enable)
bits in PS (Processor Status) of the system register file.

The core MMU is not used by barebox, however there is a default mapping of
the memory when the MMU is disabled where only the SMEM and DDR memory are
cached and device-memory isn't.

Fixes b792124a7d ("rework remap_range")

Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
---
 arch/kvx/include/asm/mmu.h | 8 ++++++++
 1 file changed, 8 insertions(+)
 create mode 100644 arch/kvx/include/asm/mmu.h

diff --git a/arch/kvx/include/asm/mmu.h b/arch/kvx/include/asm/mmu.h
new file mode 100644
index 0000000000..d39889bd3f
--- /dev/null
+++ b/arch/kvx/include/asm/mmu.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __ASM_MMU_H
+#define __ASM_MMU_H
+
+#define MAP_ARCH_DEFAULT MAP_CACHED
+
+#endif /* __ASM_MMU_H */
-- 
2.17.1








^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH 2/3] kvx: Replace dinval alias with d1inval
  2023-06-27 15:42 [PATCH 1/3] kvx: Add missing include/asm/mmu.h oss
@ 2023-06-27 15:42 ` oss
  2023-06-27 15:42 ` [PATCH 3/3] kvx: Fix asm syntax in start.S oss
  2023-06-28  8:46 ` [PATCH 1/3] kvx: Add missing include/asm/mmu.h Sascha Hauer
  2 siblings, 0 replies; 4+ messages in thread
From: oss @ 2023-06-27 15:42 UTC (permalink / raw)
  To: barebox; +Cc: jmaselbas, ysionneau, Julien Villette

From: Julien Villette <jvillette@kalray.eu>

The coolidge ISA has been updated for better compatibility for kv3-1
and kv3-2, the dinval instruction is now an alias of d1inval for
backward compatibility and should be replaced by the new name d1inval.

Replace dinval/iinval instructions with d1inval/i1inval respectively.

Signed-off-by: Julien Villette <jvillette@kalray.eu>
Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
---
 arch/kvx/cpu/start.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/kvx/cpu/start.S b/arch/kvx/cpu/start.S
index a647e8a513..83bda7b96f 100644
--- a/arch/kvx/cpu/start.S
+++ b/arch/kvx/cpu/start.S
@@ -174,7 +174,7 @@ delegate_pl:
 ENDPROC(asm_init_pl)
 
 ENTRY(kvx_proc_power_off):
-	dinval
+	d1inval
 	make $r1 = WS_WFXL_VALUE
 	;;
         /* Enable STOP */
-- 
2.17.1








^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH 3/3] kvx: Fix asm syntax in start.S
  2023-06-27 15:42 [PATCH 1/3] kvx: Add missing include/asm/mmu.h oss
  2023-06-27 15:42 ` [PATCH 2/3] kvx: Replace dinval alias with d1inval oss
@ 2023-06-27 15:42 ` oss
  2023-06-28  8:46 ` [PATCH 1/3] kvx: Add missing include/asm/mmu.h Sascha Hauer
  2 siblings, 0 replies; 4+ messages in thread
From: oss @ 2023-06-27 15:42 UTC (permalink / raw)
  To: barebox; +Cc: jmaselbas, ysionneau, Paul Iannetta

From: Paul Iannetta <piannetta@kalray.eu>

Previously our assembler considered all separators (",", "?", "=", "[]")
to be the same, this is not the case anymore hence we need to fix all
the misformed assembly.

Signed-off-by: Paul Iannetta <piannetta@kalray.eu>
Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
---
 arch/kvx/cpu/start.S | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/arch/kvx/cpu/start.S b/arch/kvx/cpu/start.S
index 83bda7b96f..342c7d38a5 100644
--- a/arch/kvx/cpu/start.S
+++ b/arch/kvx/cpu/start.S
@@ -51,11 +51,11 @@ ENTRY(kvx_start)
 	/* Setup default processor status */
 	make $r25 = PS_WFXL_START_VALUE
 	;;
-	wfxl $ps = $r25
+	wfxl $ps, $r25
 	;;
 	make $r25 = PCR_WFXM_START_VALUE
 	;;
-	wfxm $pcr = $r25
+	wfxm $pcr, $r25
 	;;
 	/* Clear BSS */
 	make $r22 = __bss_stop
@@ -65,7 +65,7 @@ ENTRY(kvx_start)
 	make $r24 = 0
 	;;
 	/* Divide by 16 for hardware loop */
-	srld $r22, $r22, 4
+	srld $r22 = $r22, 4
 	make $r25 = 0
 	;;
 	/* Clear bss with hardware loop */
@@ -76,7 +76,7 @@ ENTRY(kvx_start)
 		;;
 	clear_bss_done:
 	/* Setup stack */
-	make $sp, __stack_start
+	make $sp = __stack_start
 	;;
 	call kvx_lowlevel_setup
 	;;
@@ -89,36 +89,36 @@ ENDPROC(kvx_start)
 #define request_ownership(__pl) ;\
 	make $r21 = SYO_WFXL_VALUE_##__pl ;\
 	;; ;\
-	wfxl $syow = $r21 ;\
+	wfxl $syow, $r21 ;\
 	;; ;\
 	make $r21 = HTO_WFXL_VALUE_##__pl ;\
 	;; ;\
-	wfxl $htow = $r21 ;\
+	wfxl $htow, $r21 ;\
 	;; ;\
 	make $r21 = MO_WFXL_VALUE_##__pl ;\
 	make $r22 = MO_WFXM_VALUE_##__pl ;\
 	;; ;\
-	wfxl $mow = $r21 ;\
+	wfxl $mow, $r21 ;\
 	;; ;\
-	wfxm $mow = $r22 ;\
+	wfxm $mow, $r22 ;\
 	;; ;\
 	make $r21 = ITO_WFXL_VALUE_##__pl ;\
 	make $r22 = ITO_WFXM_VALUE_##__pl ;\
 	;; ;\
-	wfxl $itow = $r21 ;\
+	wfxl $itow, $r21 ;\
 	;; ;\
-	wfxm $itow = $r22 ;\
+	wfxm $itow, $r22 ;\
 	;; ;\
 	make $r21 = PSO_WFXL_VALUE_##__pl ;\
 	make $r22 = PSO_WFXM_VALUE_##__pl ;\
 	;; ;\
-	wfxl $psow = $r21 ;\
+	wfxl $psow, $r21 ;\
 	;; ;\
-	wfxm $psow = $r22 ;\
+	wfxm $psow, $r22 ;\
 	;; ;\
 	make $r21 = DO_WFXL_VALUE_##__pl ;\
 	;; ;\
-	wfxl $dow = $r21 ;\
+	wfxl $dow, $r21 ;\
 	;;
 
 /**
-- 
2.17.1








^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH 1/3] kvx: Add missing include/asm/mmu.h
  2023-06-27 15:42 [PATCH 1/3] kvx: Add missing include/asm/mmu.h oss
  2023-06-27 15:42 ` [PATCH 2/3] kvx: Replace dinval alias with d1inval oss
  2023-06-27 15:42 ` [PATCH 3/3] kvx: Fix asm syntax in start.S oss
@ 2023-06-28  8:46 ` Sascha Hauer
  2 siblings, 0 replies; 4+ messages in thread
From: Sascha Hauer @ 2023-06-28  8:46 UTC (permalink / raw)
  To: oss; +Cc: barebox, jmaselbas, ysionneau

On Tue, Jun 27, 2023 at 05:42:00PM +0200, oss@kalray.eu wrote:
> From: Jules Maselbas <jmaselbas@kalray.eu>
> 
> Since the rework of remap_range each architecture is expected to have
> the asm/mmu.h header, this wasn't the case for kvx, fix this.
> 
> By default the KV3-1 cpu (as found in Coolidge SoC) starts with all memory
> uncached and MMU disabled. Data and instruction L1-caches are enabled very
> early during barebox start code, see arch/kvx/cpu/start.S, using the wfxl
> instruction to modify DCE and ICE (resp. Data and Instruction Cache Enable)
> bits in PS (Processor Status) of the system register file.
> 
> The core MMU is not used by barebox, however there is a default mapping of
> the memory when the MMU is disabled where only the SMEM and DDR memory are
> cached and device-memory isn't.
> 
> Fixes b792124a7d ("rework remap_range")
> 
> Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
> ---
>  arch/kvx/include/asm/mmu.h | 8 ++++++++
>  1 file changed, 8 insertions(+)
>  create mode 100644 arch/kvx/include/asm/mmu.h

Applied, thanks

Sascha

> 
> diff --git a/arch/kvx/include/asm/mmu.h b/arch/kvx/include/asm/mmu.h
> new file mode 100644
> index 0000000000..d39889bd3f
> --- /dev/null
> +++ b/arch/kvx/include/asm/mmu.h
> @@ -0,0 +1,8 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +
> +#ifndef __ASM_MMU_H
> +#define __ASM_MMU_H
> +
> +#define MAP_ARCH_DEFAULT MAP_CACHED
> +
> +#endif /* __ASM_MMU_H */
> -- 
> 2.17.1
> 
> 
> 
> 
> 
> 
> 

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^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2023-06-28  8:47 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-06-27 15:42 [PATCH 1/3] kvx: Add missing include/asm/mmu.h oss
2023-06-27 15:42 ` [PATCH 2/3] kvx: Replace dinval alias with d1inval oss
2023-06-27 15:42 ` [PATCH 3/3] kvx: Fix asm syntax in start.S oss
2023-06-28  8:46 ` [PATCH 1/3] kvx: Add missing include/asm/mmu.h Sascha Hauer

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