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From: Jules Maselbas <jmaselbas@kalray.eu>
To: barebox@lists.infradead.org
Cc: Jules Maselbas <jmaselbas@kalray.eu>
Subject: [PATCH 7/8] mci: sdhci: Force DMA update to the next block boundary
Date: Mon, 10 Jul 2023 19:23:34 +0200	[thread overview]
Message-ID: <20230710172335.26701-7-jmaselbas@kalray.eu> (raw)
In-Reply-To: <20230710172335.26701-1-jmaselbas@kalray.eu>

When working with 64-bit DMA the DMA addresse is stored in two 32-bit
registers, different from the usual 32-bit one. Copy what is done by
Linux which simple and is also a workaround for some broken controller.

Note: in case the 64-bit DMA address needs to be read, it must be done
by reading the 32-bit LSB first (SDHCI_ADMA_ADDRESS) and then the MSB
(SDHCI_ADMA_ADDRESS_HI).

Adapted from Linux commit:
8<----------------------------------------------------------------------
commit f6a03cbf43e586211f8ea088148c8ecd3fc4b5be
Author: Mikko Vinni <mmvinni@yahoo.com>
Date:   Tue Apr 12 09:36:18 2011 -0400

    mmc: sdhci: work around broken dma boundary behavior

    Some SD host controllers (noticed on an integrated JMicron SD reader on an
    HP Pavilion dv5-1250eo laptop) don't update the dma address register before
    signaling a dma interrupt due to a dma boundary. Update the register
    manually to the next boundary (by default 512KiB), at which the transfer
    stopped.

    As long as each transfer is at most 512KiB in size (guaranteed by a BUG_ON
    in sdhci_prepare_data()) and the boundary is kept at the default value,
    this fix is needed at most once per transfer. Smaller boundaries are taken
    care of by counting the transferred bytes.

    Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=28462

    Signed-off-by: Mikko Vinni <mmvinni@yahoo.com>
    Signed-off-by: Chris Ball <cjb@laptop.org>
8<----------------------------------------------------------------------

Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
---
 drivers/mci/sdhci.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/mci/sdhci.c b/drivers/mci/sdhci.c
index 4aca3af5aa..4c8e73d94d 100644
--- a/drivers/mci/sdhci.c
+++ b/drivers/mci/sdhci.c
@@ -279,8 +279,18 @@ int sdhci_transfer_data_dma(struct sdhci *sdhci, struct mci_data *data,
 			goto out;
 		}
 
+		/*
+		 * We currently don't do anything fancy with DMA
+		 * boundaries, but as we can't disable the feature
+		 * we need to at least restart the transfer.
+		 *
+		 * According to the spec sdhci_readl(host, SDHCI_DMA_ADDRESS)
+		 * should return a valid address to continue from, but as
+		 * some controllers are faulty, don't trust them.
+		 */
 		if (irqstat & SDHCI_INT_DMA) {
-			u32 addr = sdhci_read32(sdhci, SDHCI_DMA_ADDRESS);
+			/* Force update to the next DMA block boundary. */
+			dma += sdhci->sdma_boundary;
 
 			/*
 			 * DMA engine has stopped on buffer boundary. Acknowledge
-- 
2.17.1








  parent reply	other threads:[~2023-07-10 17:25 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-10 17:23 [PATCH 1/8] mci: sdhci: Set 8-bit host caps Jules Maselbas
2023-07-10 17:23 ` [PATCH 2/8] mci: sdhci: Add registers defines Jules Maselbas
2023-07-10 17:23 ` [PATCH 3/8] mci: Add dwcmshc-sdhci driver Jules Maselbas
2023-07-10 19:47   ` Sam Ravnborg
2023-07-11  8:12     ` Jules Maselbas
2023-07-26 13:11       ` Sascha Hauer
2023-07-10 17:23 ` [PATCH 4/8] mci: sdhci: Actually return the error code instead of 0 Jules Maselbas
2023-07-10 17:23 ` [PATCH 5/8] mci: sdhci: Add sd host v4 mode Jules Maselbas
2023-07-10 17:23 ` [PATCH 6/8] mci: sdhci: Add 64-bit DMA addressing suport for V4 mode Jules Maselbas
2023-07-10 17:23 ` Jules Maselbas [this message]
2023-07-11  9:46   ` [PATCH 7/8] mci: sdhci: Force DMA update to the next block boundary Jules Maselbas
2023-07-11 13:40   ` [PATCH] fixup! " Jules Maselbas
2023-07-10 17:23 ` [PATCH 8/8] mci: dwcmshc: Use sdhci_enable_v4_mode() Jules Maselbas

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