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From: Jules Maselbas <jmaselbas@kalray.eu>
To: barebox@lists.infradead.org
Cc: Jules Maselbas <jmaselbas@kalray.eu>
Subject: [PATCH 8/8] mci: dwcmshc: Use sdhci_enable_v4_mode()
Date: Mon, 10 Jul 2023 19:23:35 +0200	[thread overview]
Message-ID: <20230710172335.26701-8-jmaselbas@kalray.eu> (raw)
In-Reply-To: <20230710172335.26701-1-jmaselbas@kalray.eu>

Enable the use of the common sdhci code path by using sdhci_enable_v4_mode().
This removes a bunch of functions that configured v4_mode and 64-bit dma in
the dwcmshc driver, which is now handled by common sdhci code.

Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
---
 drivers/mci/dwcmshc-sdhci.c | 174 ++----------------------------------
 1 file changed, 7 insertions(+), 167 deletions(-)

diff --git a/drivers/mci/dwcmshc-sdhci.c b/drivers/mci/dwcmshc-sdhci.c
index 1e0af06f50..a95e3bd1e9 100644
--- a/drivers/mci/dwcmshc-sdhci.c
+++ b/drivers/mci/dwcmshc-sdhci.c
@@ -27,129 +27,6 @@ struct dwcmshc_host {
 
 #define priv_from_mci_host(h) container_of(h, struct dwcmshc_host, mci)
 
-static inline int dwcmshc_sdma_supported(struct dwcmshc_host *host)
-{
-	return host->sdhci.caps & SDHCI_CAN_DO_SDMA;
-}
-
-static inline void dwcmshc_write_dma_addr(struct dwcmshc_host *host, u64 addr)
-{
-	sdhci_write32(&host->sdhci, SDHCI_ADMA_ADDRESS, addr & 0xffffffff);
-	sdhci_write32(&host->sdhci, SDHCI_ADMA_ADDRESS_HI, addr >> 32);
-}
-
-static inline u64 dwcmshc_read_dma_addr(struct dwcmshc_host *host)
-{
-	u64 addrh, addrl;
-
-	addrl = sdhci_read32(&host->sdhci, SDHCI_ADMA_ADDRESS);
-	addrh = sdhci_read32(&host->sdhci, SDHCI_ADMA_ADDRESS_HI);
-
-	return (addrh << 32) | addrl;
-}
-
-static int dwcmshc_wait_for_done(struct dwcmshc_host *host, u16 mask)
-{
-	u16 status;
-	u64 start;
-	u64 addr;
-
-	start = get_time_ns();
-	while (1) {
-		status = sdhci_read16(&host->sdhci, SDHCI_INT_NORMAL_STATUS);
-		if (status & SDHCI_INT_ERROR) {
-			dev_err(host->mci.hw_dev,
-				"SDHCI_INT_ERROR, normal int status: %04x\n",
-				status);
-			return -EPERM;
-		}
-		/* this special quirk is necessary, as the dma
-		 * engine stops on dma boundary and will only
-		 * restart after acknowledging it this way.
-		 */
-		if (status & SDHCI_INT_DMA) {
-			sdhci_write16(&host->sdhci, SDHCI_INT_NORMAL_STATUS, SDHCI_INT_DMA);
-			addr = dwcmshc_read_dma_addr(host);
-			dwcmshc_write_dma_addr(host, addr);
-		}
-		if (status & mask)
-			break;
-		if (is_timeout(start, 10000 * MSECOND)) {
-			dev_err(host->mci.hw_dev, "SDHCI timeout while waiting for done\n");
-			return -ETIMEDOUT;
-		}
-	}
-	return 0;
-}
-
-static int dwcmshc_wait_for_status_mask(struct dwcmshc_host *host,
-					struct mci_cmd *cmd, u16 mask)
-{
-	int ret;
-
-	ret = dwcmshc_wait_for_done(host, mask);
-	if (ret) {
-		dev_err(host->mci.hw_dev, "error on command %d\n", cmd->cmdidx);
-		dev_err(host->mci.hw_dev, "state = %04x %04x interrupt = %04x %04x\n",
-			sdhci_read16(&host->sdhci, SDHCI_PRESENT_STATE),
-			sdhci_read16(&host->sdhci, SDHCI_PRESENT_STATE1),
-			sdhci_read16(&host->sdhci, SDHCI_INT_NORMAL_STATUS),
-			sdhci_read16(&host->sdhci, SDHCI_INT_ERROR_STATUS));
-	}
-	sdhci_write16(&host->sdhci, SDHCI_INT_NORMAL_STATUS, mask);
-	return ret;
-}
-
-static void sdhci_rx_pio(struct sdhci *sdhci, struct mci_data *data,
-			 unsigned int block)
-{
-	u32 *buf = (u32 *)data->dest;
-	int i;
-
-	buf += block * data->blocksize / sizeof(u32);
-
-	for (i = 0; i < data->blocksize / sizeof(u32); i++)
-		buf[i] = sdhci_read32(sdhci, SDHCI_BUFFER);
-}
-
-static void sdhci_tx_pio(struct sdhci *sdhci, struct mci_data *data,
-			 unsigned int block)
-{
-	const u32 *buf = (const u32 *)data->src;
-	int i;
-
-	buf += block * data->blocksize / sizeof(u32);
-
-	for (i = 0; i < data->blocksize / sizeof(u32); i++)
-		sdhci_write32(sdhci, SDHCI_BUFFER, buf[i]);
-}
-
-static int dwcmshc_pio_xfer(struct dwcmshc_host *host, struct mci_cmd *cmd,
-			    struct mci_data *data)
-{
-	unsigned int i;
-	u16 sts;
-	int ret;
-
-	if (data->flags & MMC_DATA_READ)
-		sts = SDHCI_INT_DATA_AVAIL;
-	else
-		sts = SDHCI_INT_SPACE_AVAIL;
-
-	for (i = 0; i < data->blocks; i++) {
-		ret = dwcmshc_wait_for_status_mask(host, cmd, sts);
-		if (ret)
-			return ret;
-
-		if (data->flags & MMC_DATA_READ)
-			sdhci_rx_pio(&host->sdhci, data, i);
-		else
-			sdhci_tx_pio(&host->sdhci, data, i);
-	}
-
-	return 0;
-}
-
 static void mci_setup_cmd(struct mci_cmd *p, unsigned int cmd, unsigned int arg,
 			  unsigned int response)
 {
@@ -257,18 +134,7 @@ static int dwcmshc_mci_send_cmd(struct mci_host *mci, struct mci_cmd *cmd,
 
 	sdhci_write32(&host->sdhci, SDHCI_INT_STATUS, ~0);
 
-	/* setup transfer data */
-	if (data) {
-		unsigned char hostctrl1;
-		hostctrl1 = sdhci_read8(&host->sdhci, SDHCI_HOST_CONTROL);
-		hostctrl1 &= ~SDHCI_CTRL_DMA_MASK; /* SDMA */
-		sdhci_write8(&host->sdhci, SDHCI_HOST_CONTROL, hostctrl1);
-
-		sdhci_setup_data_dma(&host->sdhci, data, &dma);
-
-		if (dwcmshc_sdma_supported(host))
-			dwcmshc_write_dma_addr(host, dma);
-	}
+	sdhci_setup_data_dma(&host->sdhci, data, &dma);
 
 	sdhci_write8(&host->sdhci, SDHCI_TIMEOUT_CONTROL, 0xe);
 
@@ -281,35 +147,14 @@ static int dwcmshc_mci_send_cmd(struct mci_host *mci, struct mci_cmd *cmd,
 	sdhci_write32(&host->sdhci, SDHCI_ARGUMENT, cmd->cmdarg);
 	sdhci_write16(&host->sdhci, SDHCI_COMMAND, command);
 
-	ret = dwcmshc_wait_for_status_mask(host, cmd, SDHCI_INT_CMD_COMPLETE);
+	ret = sdhci_wait_for_done(&host->sdhci, SDHCI_INT_CMD_COMPLETE);
 	if (ret)
 		goto error;
 
 	sdhci_read_response(&host->sdhci, cmd);
 
-	if (data) {
-		if (dma_mapping_error(mci->hw_dev, dma)) {
-			ret = dwcmshc_pio_xfer(host, cmd, data);
-			if (ret) {
-				dev_err(host->mci.hw_dev, "error during PIO xfer\n");
-				goto error;
-			}
-		}
-		ret = dwcmshc_wait_for_status_mask(host, cmd,
-						SDHCI_INT_XFER_COMPLETE);
-		if (ret)
-			goto error;
-	}
-
+	ret = sdhci_transfer_data(&host->sdhci, data, dma);
 error:
-	if (data && !dma_mapping_error(mci->hw_dev, dma)) {
-		u32 len = data->blocks * data->blocksize;
-		if (data->flags & MMC_DATA_READ)
-			dma_unmap_single(mci->hw_dev, dma, len, DMA_FROM_DEVICE);
-		else
-			dma_unmap_single(mci->hw_dev, dma, len, DMA_TO_DEVICE);
-	}
-
 	if (ret) {
 		sdhci_reset(&host->sdhci, SDHCI_RESET_CMD);
 		sdhci_reset(&host->sdhci, SDHCI_RESET_DATA);
@@ -399,15 +244,7 @@ static int dwcmshc_mci_init(struct mci_host *mci, struct device *dev)
 	sdhci_write32(&host->sdhci, SDHCI_INT_STATUS, ~0);
 	sdhci_write32(&host->sdhci, SDHCI_SIGNAL_ENABLE, ~0);
 
-	/* Enable host version4 */
-	ctrl2 = sdhci_read16(&host->sdhci, SDHCI_HOST_CONTROL2);
-	ctrl2 |= SDHCI_CTRL_V4_MODE;
-	sdhci_write16(&host->sdhci, SDHCI_HOST_CONTROL2, ctrl2);
-
-	/* Enable 64-bit addressing */
-	ctrl2 = sdhci_read16(&host->sdhci, SDHCI_HOST_CONTROL2);
-	ctrl2 |= SDHCI_CTRL_64BIT_ADDR;
-	sdhci_write16(&host->sdhci, SDHCI_HOST_CONTROL2, ctrl2);
+	sdhci_enable_v4_mode(&host->sdhci);
 
 	dev_dbg(host->mci.hw_dev, "host version4: %s\n",
 		ctrl2 & SDHCI_CTRL_V4_MODE ? "enabled" : "disabled");
@@ -476,6 +313,9 @@ static int dwcmshc_probe(struct device *dev)
 	mci->card_present = dwcmshc_mci_card_present;
 
 	mci_of_parse(&host->mci);
+
+	/* Enable host_version4 */
+	sdhci_enable_v4_mode(&host->sdhci);
 	sdhci_setup_host(&host->sdhci);
 
 	mci->max_req_size = 0x8000;
-- 
2.17.1








      parent reply	other threads:[~2023-07-10 17:25 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-10 17:23 [PATCH 1/8] mci: sdhci: Set 8-bit host caps Jules Maselbas
2023-07-10 17:23 ` [PATCH 2/8] mci: sdhci: Add registers defines Jules Maselbas
2023-07-10 17:23 ` [PATCH 3/8] mci: Add dwcmshc-sdhci driver Jules Maselbas
2023-07-10 19:47   ` Sam Ravnborg
2023-07-11  8:12     ` Jules Maselbas
2023-07-26 13:11       ` Sascha Hauer
2023-07-10 17:23 ` [PATCH 4/8] mci: sdhci: Actually return the error code instead of 0 Jules Maselbas
2023-07-10 17:23 ` [PATCH 5/8] mci: sdhci: Add sd host v4 mode Jules Maselbas
2023-07-10 17:23 ` [PATCH 6/8] mci: sdhci: Add 64-bit DMA addressing suport for V4 mode Jules Maselbas
2023-07-10 17:23 ` [PATCH 7/8] mci: sdhci: Force DMA update to the next block boundary Jules Maselbas
2023-07-11  9:46   ` Jules Maselbas
2023-07-11 13:40   ` [PATCH] fixup! " Jules Maselbas
2023-07-10 17:23 ` Jules Maselbas [this message]

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