From: Denis Orlov <denorl2009@gmail.com>
To: barebox@lists.infradead.org
Cc: Denis Orlov <denorl2009@gmail.com>,
Ahmad Fatoum <a.fatoum@pengutronix.de>
Subject: [PATCH 19/21] MIPS: c-r4k: do flush secondary cache
Date: Tue, 25 Jul 2023 08:05:20 +0300 [thread overview]
Message-ID: <20230725050618.3451-20-denorl2009@gmail.com> (raw)
In-Reply-To: <20230725050618.3451-1-denorl2009@gmail.com>
Even though we probe for the secondary cache, we don't actually utilize
it when flushing. It seems that the reason for this is that no MIPS
board currently supported in barebox actually has secondary caches and
thus requires the additional logic in handling them.
Add the required functions and calls to them. This will make it easier
to add support for boards that do happen to have secondary caches.
Signed-off-by: Denis Orlov <denorl2009@gmail.com>
---
arch/mips/include/asm/cacheops.h | 5 +++++
arch/mips/lib/c-r4k.c | 12 ++++++------
2 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/arch/mips/include/asm/cacheops.h b/arch/mips/include/asm/cacheops.h
index 9f60e0287d..1e4e361e22 100644
--- a/arch/mips/include/asm/cacheops.h
+++ b/arch/mips/include/asm/cacheops.h
@@ -12,6 +12,7 @@
*/
#define Cache_I 0x00
#define Cache_D 0x01
+#define Cache_SD 0x03
#define Index_Writeback_Inv 0x00
#define Index_Store_Tag 0x08
@@ -23,9 +24,13 @@
*/
#define Index_Invalidate_I (Cache_I | Index_Writeback_Inv)
#define Index_Writeback_Inv_D (Cache_D | Index_Writeback_Inv)
+#define Index_Writeback_Inv_SD (Cache_SD | Index_Writeback_Inv)
#define Index_Store_Tag_I (Cache_I | Index_Store_Tag)
#define Index_Store_Tag_D (Cache_D | Index_Store_Tag)
+#define Index_Store_Tag_SD (Cache_SD | Index_Store_Tag)
#define Hit_Invalidate_D (Cache_D | Hit_Invalidate)
+#define Hit_Invalidate_SD (Cache_SD | Hit_Invalidate)
#define Hit_Writeback_Inv_D (Cache_D | Hit_Writeback_Inv)
+#define Hit_Writeback_Inv_SD (Cache_SD | Hit_Writeback_Inv)
#endif /* __ASM_CACHEOPS_H */
diff --git a/arch/mips/lib/c-r4k.c b/arch/mips/lib/c-r4k.c
index d3855bd756..2fb4e90138 100644
--- a/arch/mips/lib/c-r4k.c
+++ b/arch/mips/lib/c-r4k.c
@@ -60,30 +60,30 @@ static inline void blast_##pfx##cache##_range(unsigned long start, \
__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D)
__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I)
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD)
__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D)
+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD)
__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D)
+__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD)
void flush_cache_all(void)
{
blast_dcache();
blast_icache();
-
- /* secondatory cache skipped */
+ blast_scache();
}
void dma_flush_range(unsigned long start, unsigned long end)
{
blast_dcache_range(start, end);
-
- /* secondatory cache skipped */
+ blast_scache_range(start, end);
}
void dma_inv_range(unsigned long start, unsigned long end)
{
blast_inv_dcache_range(start, end);
-
- /* secondatory cache skipped */
+ blast_inv_scache_range(start, end);
}
void r4k_cache_init(void);
--
2.41.0
next prev parent reply other threads:[~2023-07-25 5:08 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-25 5:05 [PATCH 00/21] MIPS: semi-random code improvements Denis Orlov
2023-07-25 5:05 ` [PATCH 01/21] MIPS: addrspace: rectify ksseg segment naming Denis Orlov
2023-07-25 5:05 ` [PATCH 02/21] MIPS: addrspace: simplify the header Denis Orlov
2023-07-25 5:05 ` [PATCH 03/21] MIPS: main_entry-pbl: remove unused variable Denis Orlov
2023-07-25 5:05 ` [PATCH 04/21] MIPS: barebox.lds: remove extra whitespace Denis Orlov
2023-07-25 5:05 ` [PATCH 05/21] MIPS: reloc: mark relocate_code() as noreturn Denis Orlov
2023-07-25 5:05 ` [PATCH 06/21] MIPS: cpuinfo: use appropriate format specifiers in printf Denis Orlov
2023-07-25 5:05 ` [PATCH 07/21] MIPS: print BadVAddr CP0 register on exception Denis Orlov
2023-07-25 5:05 ` [PATCH 08/21] MIPS: malta: merge GT64120 headers Denis Orlov
2023-07-25 5:05 ` [PATCH 09/21] MIPS: pbl_macros: use .asciiz instead of .ascii + .byte 0 Denis Orlov
2023-07-25 5:05 ` [PATCH 10/21] MIPS: malta: remove duplicated barebox magic code Denis Orlov
2023-07-25 5:05 ` [PATCH 11/21] MIPS: pbl: put mips_barebox_10h into ENTRY_FUNCTION Denis Orlov
2023-07-25 5:05 ` [PATCH 12/21] MIPS: pbl: make sure to disable interrupts/watchpoints on entry Denis Orlov
2023-07-25 5:05 ` [PATCH 13/21] MIPS: pbl: do enable 64-bit addressing in PBL Denis Orlov
2023-07-25 5:05 ` [PATCH 14/21] MIPS: clean up barebox proper entry point Denis Orlov
2023-07-25 5:05 ` [PATCH 15/21] MIPS: main_entry: properly set XTLB handler for 64-bit mode Denis Orlov
2023-07-25 5:05 ` [PATCH 16/21] MIPS: main_entry: remove exception vector array Denis Orlov
2023-07-25 5:05 ` [PATCH 17/21] MIPS: c-r4k: prettify code in __BUILD_BLAST_CACHE_RANGE Denis Orlov
2023-07-25 5:05 ` [PATCH 18/21] MIPS: c-r4k: generate blast_*cache functions via macros Denis Orlov
2023-07-25 5:05 ` Denis Orlov [this message]
2023-07-25 5:05 ` [PATCH 20/21] MIPS: c-r4k: remove extra function declaration Denis Orlov
2023-07-25 5:05 ` [PATCH 21/21] MIPS: reloc: use IS_ALIGNED macro to check for an alignment Denis Orlov
2023-07-27 5:09 ` [PATCH 00/21] MIPS: semi-random code improvements Sascha Hauer
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230725050618.3451-20-denorl2009@gmail.com \
--to=denorl2009@gmail.com \
--cc=a.fatoum@pengutronix.de \
--cc=barebox@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox