[PATCH v2 01/11] ARM: boards: make use of MDIO_MMD register defines

[PATCH v2 01/11] ARM: boards: make use of MDIO_MMD register defines

[Marco Felsch]

Make use of the register definition instead of having magic numbers. No
functional change.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
v2:
- added afa's rb

 arch/arm/boards/datamodul-edm-qmx6/board.c   | 7 ++++---
 arch/arm/boards/embest-marsboard/board.c     | 7 ++++---
 arch/arm/boards/terasic-de0-nano-soc/board.c | 7 ++++---
 arch/arm/boards/terasic-de10-nano/board.c    | 7 ++++---
 arch/arm/boards/tqma6x/board.c               | 7 ++++---
 5 files changed, 20 insertions(+), 15 deletions(-)

diff --git a/arch/arm/boards/datamodul-edm-qmx6/board.c b/arch/arm/boards/datamodul-edm-qmx6/board.c
index 9adb3ee0f898..366b64d35aca 100644
--- a/arch/arm/boards/datamodul-edm-qmx6/board.c
+++ b/arch/arm/boards/datamodul-edm-qmx6/board.c
@@ -11,6 +11,7 @@
 #include <gpio.h>
 #include <of.h>
 
+#include <linux/mdio.h>
 #include <linux/micrel_phy.h>
 #include <mfd/stmpe-i2c.h>
 
@@ -48,9 +49,9 @@ static int ksz9031rn_phy_fixup(struct phy_device *dev)
 	 * min rx data delay, max rx/tx clock delay,
 	 * min rx/tx control delay
 	 */
-	phy_write_mmd_indirect(dev, 4, 2, 0);
-	phy_write_mmd_indirect(dev, 5, 2, 0);
-	phy_write_mmd_indirect(dev, 8, 2, 0x03ff);
+	phy_write_mmd_indirect(dev, 4, MDIO_MMD_WIS, 0);
+	phy_write_mmd_indirect(dev, 5, MDIO_MMD_WIS, 0);
+	phy_write_mmd_indirect(dev, 8, MDIO_MMD_WIS, 0x03ff);
 
 	return 0;
 }
diff --git a/arch/arm/boards/embest-marsboard/board.c b/arch/arm/boards/embest-marsboard/board.c
index 7835a9265a3d..7274595e2a76 100644
--- a/arch/arm/boards/embest-marsboard/board.c
+++ b/arch/arm/boards/embest-marsboard/board.c
@@ -9,6 +9,7 @@
 #include <init.h>
 #include <envfs.h>
 #include <mach/imx/bbu.h>
+#include <linux/mdio.h>
 #include <linux/phy.h>
 #include <deep-probe.h>
 
@@ -19,13 +20,13 @@ static int ar8035_phy_fixup(struct phy_device *dev)
 	/* Ar803x phy SmartEEE feature cause link status generates glitch,
 	 * which cause ethernet link down/up issue, so disable SmartEEE
 	 */
-	val = phy_read_mmd_indirect(dev, 0x805d, 0x3);
+	val = phy_read_mmd_indirect(dev, 0x805d, MDIO_MMD_PCS);
 	phy_write(dev, MII_MMD_DATA, val & ~(1 << 8));
 
-	val = phy_read_mmd_indirect(dev, 0x4003, 0x3);
+	val = phy_read_mmd_indirect(dev, 0x4003, MDIO_MMD_PCS);
 	phy_write(dev, MII_MMD_DATA, val & ~(1 << 8));
 
-	val = phy_read_mmd_indirect(dev, 0x4007, 0x3);
+	val = phy_read_mmd_indirect(dev, 0x4007, MDIO_MMD_PCS);
 	val &= 0xffe3;
 	val |= 0x18;
 	phy_write(dev, MII_MMD_DATA, val);
diff --git a/arch/arm/boards/terasic-de0-nano-soc/board.c b/arch/arm/boards/terasic-de0-nano-soc/board.c
index 19f74b784c12..832160c595fa 100644
--- a/arch/arm/boards/terasic-de0-nano-soc/board.c
+++ b/arch/arm/boards/terasic-de0-nano-soc/board.c
@@ -5,6 +5,7 @@
 #include <driver.h>
 #include <init.h>
 #include <asm/armlinux.h>
+#include <linux/mdio.h>
 #include <linux/micrel_phy.h>
 #include <linux/phy.h>
 #include <linux/sizes.h>
@@ -18,9 +19,9 @@ static int phy_fixup(struct phy_device *dev)
 	 * min rx data delay, max rx/tx clock delay,
 	 * min rx/tx control delay
 	 */
-	phy_write_mmd_indirect(dev, 4, 2, 0);
-	phy_write_mmd_indirect(dev, 5, 2, 0);
-	phy_write_mmd_indirect(dev, 8, 2, 0x003ff);
+	phy_write_mmd_indirect(dev, 4, MDIO_MMD_WIS, 0);
+	phy_write_mmd_indirect(dev, 5, MDIO_MMD_WIS, 0);
+	phy_write_mmd_indirect(dev, 8, MDIO_MMD_WIS, 0x003ff);
 	return 0;
 }
 
diff --git a/arch/arm/boards/terasic-de10-nano/board.c b/arch/arm/boards/terasic-de10-nano/board.c
index 580c8980129f..e47d9ac841d1 100644
--- a/arch/arm/boards/terasic-de10-nano/board.c
+++ b/arch/arm/boards/terasic-de10-nano/board.c
@@ -5,6 +5,7 @@
 #include <driver.h>
 #include <init.h>
 #include <asm/armlinux.h>
+#include <linux/mdio.h>
 #include <linux/micrel_phy.h>
 #include <linux/phy.h>
 #include <linux/sizes.h>
@@ -18,9 +19,9 @@ static int phy_fixup(struct phy_device *dev)
 	 * min rx data delay, max rx/tx clock delay,
 	 * min rx/tx control delay
 	 */
-	phy_write_mmd_indirect(dev, 4, 2, 0);
-	phy_write_mmd_indirect(dev, 5, 2, 0);
-	phy_write_mmd_indirect(dev, 8, 2, 0x003ff);
+	phy_write_mmd_indirect(dev, 4, MDIO_MMD_WIS, 0);
+	phy_write_mmd_indirect(dev, 5, MDIO_MMD_WIS, 0);
+	phy_write_mmd_indirect(dev, 8, MDIO_MMD_WIS, 0x003ff);
 	return 0;
 }
 
diff --git a/arch/arm/boards/tqma6x/board.c b/arch/arm/boards/tqma6x/board.c
index 4bb7223a6e7a..8a91ad652a98 100644
--- a/arch/arm/boards/tqma6x/board.c
+++ b/arch/arm/boards/tqma6x/board.c
@@ -11,6 +11,7 @@
 #include <gpio.h>
 #include <of.h>
 
+#include <linux/mdio.h>
 #include <linux/micrel_phy.h>
 #include <mfd/stmpe-i2c.h>
 
@@ -46,9 +47,9 @@ static int ksz9031rn_phy_fixup(struct phy_device *dev)
 	 * min rx data delay, max rx/tx clock delay,
 	 * min rx/tx control delay
 	 */
-	phy_write_mmd_indirect(dev, 4, 2, 0);
-	phy_write_mmd_indirect(dev, 5, 2, 0);
-	phy_write_mmd_indirect(dev, 8, 2, 0x003ff);
+	phy_write_mmd_indirect(dev, 4, MDIO_MMD_WIS, 0);
+	phy_write_mmd_indirect(dev, 5, MDIO_MMD_WIS, 0);
+	phy_write_mmd_indirect(dev, 8, MDIO_MMD_WIS, 0x003ff);
 
 	return 0;
 }
-- 
2.39.2

[PATCH v2 02/11] net: phy: micrel: make use of MDIO_MMD register defines

[Marco Felsch]

Make use of the register definition instead of having magic numbers. No
functional change.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
v2:
- added afa's rb

 drivers/net/phy/micrel.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index ef1f919ae792..02d474c44250 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -447,23 +447,27 @@ static int ksz9031_config_rgmii_delay(struct phy_device *phydev)
 		return 0;
 	}
 
-	phy_write_mmd_indirect(phydev, MII_KSZ9031RN_CONTROL_PAD_SKEW, 2,
+	phy_write_mmd_indirect(phydev, MII_KSZ9031RN_CONTROL_PAD_SKEW,
+			       MDIO_MMD_WIS,
 			       FIELD_PREP(MII_KSZ9031RN_RX_CTL_M, rx) |
 			       FIELD_PREP(MII_KSZ9031RN_TX_CTL_M, tx));
 
-	phy_write_mmd_indirect(phydev, MII_KSZ9031RN_RX_DATA_PAD_SKEW, 2,
+	phy_write_mmd_indirect(phydev, MII_KSZ9031RN_RX_DATA_PAD_SKEW,
+			       MDIO_MMD_WIS,
 			       FIELD_PREP(MII_KSZ9031RN_RXD3, rx) |
 			       FIELD_PREP(MII_KSZ9031RN_RXD2, rx) |
 			       FIELD_PREP(MII_KSZ9031RN_RXD1, rx) |
 			       FIELD_PREP(MII_KSZ9031RN_RXD0, rx));
 
-	phy_write_mmd_indirect(phydev, MII_KSZ9031RN_TX_DATA_PAD_SKEW, 2,
+	phy_write_mmd_indirect(phydev, MII_KSZ9031RN_TX_DATA_PAD_SKEW,
+			       MDIO_MMD_WIS,
 			       FIELD_PREP(MII_KSZ9031RN_TXD3, tx) |
 			       FIELD_PREP(MII_KSZ9031RN_TXD2, tx) |
 			       FIELD_PREP(MII_KSZ9031RN_TXD1, tx) |
 			       FIELD_PREP(MII_KSZ9031RN_TXD0, tx));
 
-	phy_write_mmd_indirect(phydev, MII_KSZ9031RN_CLK_PAD_SKEW, 2,
+	phy_write_mmd_indirect(phydev, MII_KSZ9031RN_CLK_PAD_SKEW,
+			       MDIO_MMD_WIS,
 			       FIELD_PREP(MII_KSZ9031RN_GTX_CLK, tx_clk) |
 			       FIELD_PREP(MII_KSZ9031RN_RX_CLK, rx_clk));
 	return 0;
-- 
2.39.2

[PATCH v2 03/11] net: phy: fix struct member comments

[Marco Felsch]

Nothing special just add the missing @ which is useful for the
documentation generation.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
v2:
- new patch

 include/linux/phy.h | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/include/linux/phy.h b/include/linux/phy.h
index 509bf72de918..fee3868d38f9 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -143,12 +143,12 @@ int mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val);
 
 /* phy_device: An instance of a PHY
  *
- * bus: Pointer to the bus this PHY is on
- * dev: driver model device structure for this PHY
- * phy_id: UID for this device found during discovery
- * dev_flags: Device-specific flags used by the PHY driver.
- * addr: Bus address of PHY
- * attached_dev: The attached enet driver's device instance ptr
+ * @bus: Pointer to the bus this PHY is on
+ * @dev: driver model device structure for this PHY
+ * @phy_id: UID for this device found during discovery
+ * @dev_flags: Device-specific flags used by the PHY driver.
+ * @addr: Bus address of PHY
+ * @attached_dev: The attached enet driver's device instance ptr
  *
  * speed, duplex, pause, supported, advertising, and
  * autoneg are used like in mii_if_info
@@ -202,11 +202,11 @@ struct phy_device {
 
 /* struct phy_driver: Driver structure for a particular PHY type
  *
- * phy_id: The result of reading the UID registers of this PHY
+ * @phy_id: The result of reading the UID registers of this PHY
  *   type, and ANDing them with the phy_id_mask.  This driver
  *   only works for PHYs with IDs which match this field
- * phy_id_mask: Defines the important bits of the phy_id
- * features: A list of features (speed, duplex, etc) supported
+ * @phy_id_mask: Defines the important bits of the phy_id
+ * @features: A list of features (speed, duplex, etc) supported
  *   by this PHY
  * @driver_data: Static driver data
  *
-- 
2.39.2

[PATCH v2 04/11] net: phy: mmd_phy_indirect: align parameters with Linux

[Marco Felsch]

Switch the prtad and devad to align it with Linux to make porting from
Linux less error prone. While on it rename prtad with regnum.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
v2:
- new patch

 drivers/net/phy/phy.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 74381949b43a..c1b8cb46e6be 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -819,14 +819,14 @@ int genphy_read_status(struct phy_device *phydev)
 	return 0;
 }
 
-static inline void mmd_phy_indirect(struct phy_device *phydev, int prtad,
-					int devad)
+static inline void mmd_phy_indirect(struct phy_device *phydev, int devad,
+				    u16 regnum)
 {
 	/* Write the desired MMD Devad */
 	phy_write(phydev, MII_MMD_CTRL, devad);
 
 	/* Write the desired MMD register address */
-	phy_write(phydev, MII_MMD_DATA, prtad);
+	phy_write(phydev, MII_MMD_DATA, regnum);
 
 	/* Select the Function : DATA with no post increment */
 	phy_write(phydev, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));
@@ -850,7 +850,7 @@ int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad)
 {
 	u32 ret;
 
-	mmd_phy_indirect(phydev, prtad, devad);
+	mmd_phy_indirect(phydev, devad, prtad);
 
 	/* Read the content of the MMD's selected register */
 	ret = phy_read(phydev, MII_MMD_DATA);
@@ -876,7 +876,7 @@ int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad)
 void phy_write_mmd_indirect(struct phy_device *phydev, int prtad, int devad,
 				   u16 data)
 {
-	mmd_phy_indirect(phydev, prtad, devad);
+	mmd_phy_indirect(phydev, devad, prtad);
 
 	/* Write the data into MMD's selected register */
 	phy_write(phydev, MII_MMD_DATA, data);
-- 
2.39.2

[PATCH v2 05/11] net: phy: add phydev_{err,err_probe,info,warn,dbg} macros

[Marco Felsch]

Import Linux macros to make it easier to port drivers to barebox.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
v2:
- add afa's rb

 include/linux/phy.h | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/include/linux/phy.h b/include/linux/phy.h
index fee3868d38f9..8b52c16bb228 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -417,6 +417,21 @@ static inline bool phy_acquired(struct phy_device *phydev)
 	return phydev && phydev->bus && slice_acquired(&phydev->bus->slice);
 }
 
+#define phydev_err(_phydev, format, args...)	\
+	dev_err(&_phydev->dev, format, ##args)
+
+#define phydev_err_probe(_phydev, err, format, args...)	\
+	dev_err_probe(&_phydev->dev, err, format, ##args)
+
+#define phydev_info(_phydev, format, args...)	\
+	dev_info(&_phydev->dev, format, ##args)
+
+#define phydev_warn(_phydev, format, args...)	\
+	dev_warn(&_phydev->dev, format, ##args)
+
+#define phydev_dbg(_phydev, format, args...)	\
+	dev_dbg(&_phydev->dev, format, ##args)
+
 #ifdef CONFIG_PHYLIB
 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
 		int (*run)(struct phy_device *));
-- 
2.39.2

[PATCH v2 06/11] net: phy: import phy_{read,write,modify}_mmd helpers from Linux

[Marco Felsch]

Linux have added helper functions to access and modify the mmd
registers. The helpers are clause22/45 agnostic and can handle both the
same way. Since barebox does not have clause45 support we need to inform
the user that this is not supported at the moment. Therefore we also
need the is_c45 flag which is ported from Linux as well.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
v2:
- new patch

 drivers/net/phy/phy.c | 109 ++++++++++++++++++++++++++++++++++++++++++
 include/linux/phy.h   |  10 ++++
 2 files changed, 119 insertions(+)

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index c1b8cb46e6be..4cabb436e461 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -905,6 +905,115 @@ int phy_modify_mmd_indirect(struct phy_device *phydev, int prtad, int devad,
 	return 0;
 }
 
+/**
+ * phy_read_mmd - Convenience function for reading a register
+ * from an MMD on a given PHY.
+ * @phydev: The phy_device struct
+ * @devad: The MMD to read from
+ * @regnum: The register on the MMD to read
+ *
+ * Same rules as for phy_read();
+ */
+int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
+{
+	struct mii_bus *bus = phydev->bus;
+	int phy_addr = phydev->addr;
+
+	if (regnum > (u16)~0 || devad > 32)
+		return -EINVAL;
+
+	if (phydev->is_c45) {
+		phydev_warn(phydev, "Clause45 is not supported yet\n");
+		return -EOPNOTSUPP;
+	}
+
+	mmd_phy_indirect(phydev, devad, regnum);
+
+	/* Read the content of the MMD's selected register */
+	return mdiobus_read(bus, phy_addr, MII_MMD_DATA);
+}
+EXPORT_SYMBOL(phy_read_mmd);
+
+/**
+ * phy_write_mmd - Convenience function for writing a register
+ * on an MMD on a given PHY.
+ * @phydev: The phy_device struct
+ * @devad: The MMD to read from
+ * @regnum: The register on the MMD to read
+ * @val: value to write to @regnum
+ *
+ * Same rules as for phy_write();
+ */
+int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
+{
+	struct mii_bus *bus = phydev->bus;
+	int phy_addr = phydev->addr;
+
+	if (regnum > (u16)~0 || devad > 32)
+		return -EINVAL;
+
+	if (phydev->is_c45) {
+		phydev_warn(phydev, "Clause45 is not supported yet\n");
+		return -EOPNOTSUPP;
+	}
+
+	mmd_phy_indirect(phydev, devad, regnum);
+
+	/* Write the data into MMD's selected register */
+	mdiobus_write(bus, phy_addr, MII_MMD_DATA, val);
+
+	return 0;
+}
+EXPORT_SYMBOL(phy_write_mmd);
+
+/**
+ * phy_modify_mmd_changed - Function for modifying a register on MMD
+ * @phydev: the phy_device struct
+ * @devad: the MMD containing register to modify
+ * @regnum: register number to modify
+ * @mask: bit mask of bits to clear
+ * @set: new value of bits set in mask to write to @regnum
+ *
+ * Returns negative errno, 0 if there was no change, and 1 in case of change
+ */
+int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
+			   u16 mask, u16 set)
+{
+	int new, ret;
+
+	ret = phy_read_mmd(phydev, devad, regnum);
+	if (ret < 0)
+		return ret;
+
+	new = (ret & ~mask) | set;
+	if (new == ret)
+		return 0;
+
+	ret = phy_write_mmd(phydev, devad, regnum, new);
+
+	return ret < 0 ? ret : 1;
+}
+EXPORT_SYMBOL_GPL(phy_modify_mmd_changed);
+
+/**
+ * phy_modify_mmd - Convenience function for modifying a register on MMD
+ * @phydev: the phy_device struct
+ * @devad: the MMD containing register to modify
+ * @regnum: register number to modify
+ * @mask: bit mask of bits to clear
+ * @set: new value of bits set in mask to write to @regnum
+ */
+int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
+		   u16 mask, u16 set)
+{
+	int ret;
+
+	ret = phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
+
+	return ret < 0 ? ret : 0;
+}
+EXPORT_SYMBOL_GPL(phy_modify_mmd);
+
 int genphy_config_init(struct phy_device *phydev)
 {
 	int val;
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 8b52c16bb228..bb728dfaf8ea 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -146,6 +146,7 @@ int mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val);
  * @bus: Pointer to the bus this PHY is on
  * @dev: driver model device structure for this PHY
  * @phy_id: UID for this device found during discovery
+ * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
  * @dev_flags: Device-specific flags used by the PHY driver.
  * @addr: Bus address of PHY
  * @attached_dev: The attached enet driver's device instance ptr
@@ -160,6 +161,8 @@ struct phy_device {
 
 	u32 phy_id;
 
+	unsigned is_c45:1;
+
 	u32 dev_flags;
 
 	phy_interface_t interface;
@@ -412,6 +415,13 @@ void phy_write_mmd_indirect(struct phy_device *phydev, int prtad, int devad,
 int phy_modify_mmd_indirect(struct phy_device *phydev, int prtad, int devad,
 				    u16 mask, u16 set);
 
+int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
+int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
+int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
+		   u16 mask, u16 set);
+int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
+			   u16 mask, u16 set);
+
 static inline bool phy_acquired(struct phy_device *phydev)
 {
 	return phydev && phydev->bus && slice_acquired(&phydev->bus->slice);
-- 
2.39.2

[PATCH v2 07/11] net: phy: replace phy_{write,read,modify}_mmd_indirect with phy_{write,read,modify}_mmd

[Marco Felsch]

Make use of the phy_{write,read,modify}_mmd API to align the code with
Linux. This also fixes the r8169 driver since this driver did not adapt
the parameters while porting from Linux.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
v2:
- replace phy_*_mmd_indirect with phy_*_mmd

 arch/arm/boards/datamodul-edm-qmx6/board.c   |  6 +--
 arch/arm/boards/embest-marsboard/board.c     |  6 +--
 arch/arm/boards/terasic-de0-nano-soc/board.c |  6 +--
 arch/arm/boards/terasic-de10-nano/board.c    |  6 +--
 arch/arm/boards/tqma6x/board.c               |  6 +--
 drivers/net/phy/at803x.c                     |  4 +-
 drivers/net/phy/dp83867.c                    | 35 ++++++--------
 drivers/net/phy/micrel.c                     | 50 +++++++++-----------
 drivers/net/r8169_phy_config.c               |  2 +-
 9 files changed, 56 insertions(+), 65 deletions(-)

diff --git a/arch/arm/boards/datamodul-edm-qmx6/board.c b/arch/arm/boards/datamodul-edm-qmx6/board.c
index 366b64d35aca..3ef28ac2da30 100644
--- a/arch/arm/boards/datamodul-edm-qmx6/board.c
+++ b/arch/arm/boards/datamodul-edm-qmx6/board.c
@@ -49,9 +49,9 @@ static int ksz9031rn_phy_fixup(struct phy_device *dev)
 	 * min rx data delay, max rx/tx clock delay,
 	 * min rx/tx control delay
 	 */
-	phy_write_mmd_indirect(dev, 4, MDIO_MMD_WIS, 0);
-	phy_write_mmd_indirect(dev, 5, MDIO_MMD_WIS, 0);
-	phy_write_mmd_indirect(dev, 8, MDIO_MMD_WIS, 0x03ff);
+	phy_write_mmd(dev, MDIO_MMD_WIS, 4, 0);
+	phy_write_mmd(dev, MDIO_MMD_WIS, 5, 0);
+	phy_write_mmd(dev, MDIO_MMD_WIS, 8, 0x03ff);
 
 	return 0;
 }
diff --git a/arch/arm/boards/embest-marsboard/board.c b/arch/arm/boards/embest-marsboard/board.c
index 7274595e2a76..1a5e5a84918f 100644
--- a/arch/arm/boards/embest-marsboard/board.c
+++ b/arch/arm/boards/embest-marsboard/board.c
@@ -20,13 +20,13 @@ static int ar8035_phy_fixup(struct phy_device *dev)
 	/* Ar803x phy SmartEEE feature cause link status generates glitch,
 	 * which cause ethernet link down/up issue, so disable SmartEEE
 	 */
-	val = phy_read_mmd_indirect(dev, 0x805d, MDIO_MMD_PCS);
+	val = phy_read_mmd(dev, MDIO_MMD_PCS, 0x805d);
 	phy_write(dev, MII_MMD_DATA, val & ~(1 << 8));
 
-	val = phy_read_mmd_indirect(dev, 0x4003, MDIO_MMD_PCS);
+	val = phy_read_mmd(dev, MDIO_MMD_PCS, 0x4003);
 	phy_write(dev, MII_MMD_DATA, val & ~(1 << 8));
 
-	val = phy_read_mmd_indirect(dev, 0x4007, MDIO_MMD_PCS);
+	val = phy_read_mmd(dev, MDIO_MMD_PCS, 0x4007);
 	val &= 0xffe3;
 	val |= 0x18;
 	phy_write(dev, MII_MMD_DATA, val);
diff --git a/arch/arm/boards/terasic-de0-nano-soc/board.c b/arch/arm/boards/terasic-de0-nano-soc/board.c
index 832160c595fa..b4502f552a74 100644
--- a/arch/arm/boards/terasic-de0-nano-soc/board.c
+++ b/arch/arm/boards/terasic-de0-nano-soc/board.c
@@ -19,9 +19,9 @@ static int phy_fixup(struct phy_device *dev)
 	 * min rx data delay, max rx/tx clock delay,
 	 * min rx/tx control delay
 	 */
-	phy_write_mmd_indirect(dev, 4, MDIO_MMD_WIS, 0);
-	phy_write_mmd_indirect(dev, 5, MDIO_MMD_WIS, 0);
-	phy_write_mmd_indirect(dev, 8, MDIO_MMD_WIS, 0x003ff);
+	phy_write_mmd(dev, MDIO_MMD_WIS, 4, 0);
+	phy_write_mmd(dev, MDIO_MMD_WIS, 5, 0);
+	phy_write_mmd(dev, MDIO_MMD_WIS, 8, 0x003ff);
 	return 0;
 }
 
diff --git a/arch/arm/boards/terasic-de10-nano/board.c b/arch/arm/boards/terasic-de10-nano/board.c
index e47d9ac841d1..e553e26da841 100644
--- a/arch/arm/boards/terasic-de10-nano/board.c
+++ b/arch/arm/boards/terasic-de10-nano/board.c
@@ -19,9 +19,9 @@ static int phy_fixup(struct phy_device *dev)
 	 * min rx data delay, max rx/tx clock delay,
 	 * min rx/tx control delay
 	 */
-	phy_write_mmd_indirect(dev, 4, MDIO_MMD_WIS, 0);
-	phy_write_mmd_indirect(dev, 5, MDIO_MMD_WIS, 0);
-	phy_write_mmd_indirect(dev, 8, MDIO_MMD_WIS, 0x003ff);
+	phy_write_mmd(dev, MDIO_MMD_WIS, 4, 0);
+	phy_write_mmd(dev, MDIO_MMD_WIS, 5, 0);
+	phy_write_mmd(dev, MDIO_MMD_WIS, 8, 0x003ff);
 	return 0;
 }
 
diff --git a/arch/arm/boards/tqma6x/board.c b/arch/arm/boards/tqma6x/board.c
index 8a91ad652a98..d8d6204f0a0a 100644
--- a/arch/arm/boards/tqma6x/board.c
+++ b/arch/arm/boards/tqma6x/board.c
@@ -47,9 +47,9 @@ static int ksz9031rn_phy_fixup(struct phy_device *dev)
 	 * min rx data delay, max rx/tx clock delay,
 	 * min rx/tx control delay
 	 */
-	phy_write_mmd_indirect(dev, 4, MDIO_MMD_WIS, 0);
-	phy_write_mmd_indirect(dev, 5, MDIO_MMD_WIS, 0);
-	phy_write_mmd_indirect(dev, 8, MDIO_MMD_WIS, 0x003ff);
+	phy_write_mmd(dev, MDIO_MMD_WIS, 4, 0);
+	phy_write_mmd(dev, MDIO_MMD_WIS, 5, 0);
+	phy_write_mmd(dev, MDIO_MMD_WIS, 8, 0x003ff);
 
 	return 0;
 }
diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
index 18182bffc299..f0a14799234b 100644
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c
@@ -229,14 +229,14 @@ static int at803x_clk_out_config(struct phy_device *phydev)
 	if (!priv->clk_25m_mask)
 		return 0;
 
-	val = phy_read_mmd_indirect(phydev, AT803X_MMD7_CLK25M, MDIO_MMD_AN);
+	val = phy_read_mmd(phydev, MDIO_MMD_AN, AT803X_MMD7_CLK25M);
 	if (val < 0)
 		return val;
 
 	val &= ~priv->clk_25m_mask;
 	val |= priv->clk_25m_reg;
 
-	phy_write_mmd_indirect(phydev, AT803X_MMD7_CLK25M, MDIO_MMD_AN, val);
+	phy_write_mmd(phydev, MDIO_MMD_AN, AT803X_MMD7_CLK25M, val);
 
 	return 0;
 }
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index d8109172dfa5..d8185940146c 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -154,14 +154,14 @@ static int dp83867_config_port_mirroring(struct phy_device *phydev)
 	struct dp83867_private *dp83867 = phydev->priv;
 	u16 val;
 
-	val = phy_read_mmd_indirect(phydev, DP83867_CFG4, DP83867_DEVADDR);
+	val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4);
 
 	if (dp83867->port_mirroring == DP83867_PORT_MIRROING_EN)
 		val |= DP83867_CFG4_PORT_MIRROR_EN;
 	else
 		val &= ~DP83867_CFG4_PORT_MIRROR_EN;
 
-	phy_write_mmd_indirect(phydev, DP83867_CFG4, DP83867_DEVADDR, val);
+	phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4, val);
 
 	return 0;
 }
@@ -256,11 +256,9 @@ static int dp83867_config_init(struct phy_device *phydev)
 	phy_write(phydev, DP83867_CTRL, val | DP83867_SW_RESTART);
 
 	if (dp83867->rxctrl_strap_quirk) {
-		val = phy_read_mmd_indirect(phydev, DP83867_CFG4,
-					    DP83867_DEVADDR);
+		val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4);
 		val &= ~BIT(7);
-		phy_write_mmd_indirect(phydev, DP83867_CFG4,
-				       DP83867_DEVADDR, val);
+		phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4, val);
 	}
 
 	if (phy_interface_is_rgmii(phydev)) {
@@ -270,8 +268,7 @@ static int dp83867_config_init(struct phy_device *phydev)
 		if (ret)
 			return ret;
 
-		val = phy_read_mmd_indirect(phydev, DP83867_RGMIICTL,
-					    DP83867_DEVADDR);
+		val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL);
 
 		switch (phydev->interface) {
 		case PHY_INTERFACE_MODE_RGMII_ID:
@@ -287,31 +284,29 @@ static int dp83867_config_init(struct phy_device *phydev)
 		default:
 			break;
 		}
-		phy_write_mmd_indirect(phydev, DP83867_RGMIICTL,
-				       DP83867_DEVADDR, val);
+		phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL, val);
 
 		delay = (dp83867->rx_id_delay |
 			(dp83867->tx_id_delay << DP83867_RGMII_TX_CLK_DELAY_SHIFT));
 
-		phy_write_mmd_indirect(phydev, DP83867_RGMIIDCTL,
-				       DP83867_DEVADDR, delay);
+		phy_write_mmd(phydev, DP83867_DEVADDR,
+			      DP83867_RGMIIDCTL, delay);
 
 		if (dp83867->io_impedance >= 0) {
-			val = phy_read_mmd_indirect(phydev, DP83867_IO_MUX_CFG,
-						    DP83867_DEVADDR);
+			val = phy_read_mmd(phydev, DP83867_DEVADDR,
+					   DP83867_IO_MUX_CFG);
 			val &= ~DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
 			val |= (dp83867->io_impedance &
 				DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL);
 
-			phy_write_mmd_indirect(phydev, DP83867_IO_MUX_CFG,
-					       DP83867_DEVADDR, val);
+			phy_write_mmd(phydev, DP83867_DEVADDR,
+				      DP83867_IO_MUX_CFG, val);
 		}
 	} else if (phy_interface_is_sgmii(phydev)) {
 		phy_write(phydev, MII_BMCR,
 			  BMCR_ANENABLE | BMCR_FULLDPLX | BMCR_SPEED1000);
 
-		phy_write_mmd_indirect(phydev, DP83867_RGMIICTL,
-				       DP83867_DEVADDR, 0x0);
+		phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL, 0x0);
 
 		val = DP83867_PHYCTRL_SGMIIEN |
 		      DP83867_MDI_CROSSOVER_MDIX << DP83867_MDI_CROSSOVER |
@@ -341,8 +336,8 @@ static int dp83867_config_init(struct phy_device *phydev)
 				DP83867_IO_MUX_CFG_CLK_O_SEL_SHIFT;
 		}
 
-		phy_modify_mmd_indirect(phydev, DP83867_IO_MUX_CFG,
-				DP83867_DEVADDR, mask, val);
+		phy_modify_mmd(phydev, DP83867_DEVADDR,
+			       DP83867_IO_MUX_CFG, mask, val);
 	}
 
 	return 0;
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index 02d474c44250..36cc857a2c36 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -387,7 +387,7 @@ static int ksz9031_of_load_skew_values(struct phy_device *phydev,
 		return 0;
 
 	if (matches < numfields)
-		newval = phy_read_mmd_indirect(phydev, reg, MDIO_MMD_WIS);
+		newval = phy_read_mmd(phydev, MDIO_MMD_WIS, reg);
 	else
 		newval = 0;
 
@@ -401,15 +401,15 @@ static int ksz9031_of_load_skew_values(struct phy_device *phydev,
 				<< (field_sz * i));
 		}
 
-	phy_write_mmd_indirect(phydev, reg, MDIO_MMD_WIS, newval);
+	phy_write_mmd(phydev, MDIO_MMD_WIS, reg, newval);
 	return 0;
 }
 
 static int ksz9031_center_flp_timing(struct phy_device *phydev)
 {
 	/* Center KSZ9031RNX FLP timing at 16ms. */
-	phy_write_mmd_indirect(phydev, MII_KSZ9031RN_FLP_BURST_TX_HI, 0, 0x0006);
-	phy_write_mmd_indirect(phydev, MII_KSZ9031RN_FLP_BURST_TX_LO, 0, 0x1a80);
+	phy_write_mmd(phydev, 0, MII_KSZ9031RN_FLP_BURST_TX_HI, 0x0006);
+	phy_write_mmd(phydev, 0, MII_KSZ9031RN_FLP_BURST_TX_LO, 0x1a80);
 
 	return genphy_restart_aneg(phydev);
 }
@@ -447,29 +447,25 @@ static int ksz9031_config_rgmii_delay(struct phy_device *phydev)
 		return 0;
 	}
 
-	phy_write_mmd_indirect(phydev, MII_KSZ9031RN_CONTROL_PAD_SKEW,
-			       MDIO_MMD_WIS,
-			       FIELD_PREP(MII_KSZ9031RN_RX_CTL_M, rx) |
-			       FIELD_PREP(MII_KSZ9031RN_TX_CTL_M, tx));
-
-	phy_write_mmd_indirect(phydev, MII_KSZ9031RN_RX_DATA_PAD_SKEW,
-			       MDIO_MMD_WIS,
-			       FIELD_PREP(MII_KSZ9031RN_RXD3, rx) |
-			       FIELD_PREP(MII_KSZ9031RN_RXD2, rx) |
-			       FIELD_PREP(MII_KSZ9031RN_RXD1, rx) |
-			       FIELD_PREP(MII_KSZ9031RN_RXD0, rx));
-
-	phy_write_mmd_indirect(phydev, MII_KSZ9031RN_TX_DATA_PAD_SKEW,
-			       MDIO_MMD_WIS,
-			       FIELD_PREP(MII_KSZ9031RN_TXD3, tx) |
-			       FIELD_PREP(MII_KSZ9031RN_TXD2, tx) |
-			       FIELD_PREP(MII_KSZ9031RN_TXD1, tx) |
-			       FIELD_PREP(MII_KSZ9031RN_TXD0, tx));
-
-	phy_write_mmd_indirect(phydev, MII_KSZ9031RN_CLK_PAD_SKEW,
-			       MDIO_MMD_WIS,
-			       FIELD_PREP(MII_KSZ9031RN_GTX_CLK, tx_clk) |
-			       FIELD_PREP(MII_KSZ9031RN_RX_CLK, rx_clk));
+	phy_write_mmd(phydev, MDIO_MMD_WIS, MII_KSZ9031RN_CONTROL_PAD_SKEW,
+		      FIELD_PREP(MII_KSZ9031RN_RX_CTL_M, rx) |
+		      FIELD_PREP(MII_KSZ9031RN_TX_CTL_M, tx));
+
+	phy_write_mmd(phydev, MDIO_MMD_WIS, MII_KSZ9031RN_RX_DATA_PAD_SKEW,
+		      FIELD_PREP(MII_KSZ9031RN_RXD3, rx) |
+		      FIELD_PREP(MII_KSZ9031RN_RXD2, rx) |
+		      FIELD_PREP(MII_KSZ9031RN_RXD1, rx) |
+		      FIELD_PREP(MII_KSZ9031RN_RXD0, rx));
+
+	phy_write_mmd(phydev, MDIO_MMD_WIS, MII_KSZ9031RN_TX_DATA_PAD_SKEW,
+		      FIELD_PREP(MII_KSZ9031RN_TXD3, tx) |
+		      FIELD_PREP(MII_KSZ9031RN_TXD2, tx) |
+		      FIELD_PREP(MII_KSZ9031RN_TXD1, tx) |
+		      FIELD_PREP(MII_KSZ9031RN_TXD0, tx));
+
+	phy_write_mmd(phydev, MDIO_MMD_WIS, MII_KSZ9031RN_CLK_PAD_SKEW,
+		      FIELD_PREP(MII_KSZ9031RN_GTX_CLK, tx_clk) |
+		      FIELD_PREP(MII_KSZ9031RN_RX_CLK, rx_clk));
 	return 0;
 }
 
diff --git a/drivers/net/r8169_phy_config.c b/drivers/net/r8169_phy_config.c
index 0c34a58b05fc..c57c221e1392 100644
--- a/drivers/net/r8169_phy_config.c
+++ b/drivers/net/r8169_phy_config.c
@@ -574,7 +574,7 @@ static void rtl8168e_1_hw_phy_config(struct rtl8169_private *tp,
 	r8168d_modify_extpage(phydev, 0x0020, 0x15, 0x1100, 0x0000);
 	phy_write_paged(phydev, 0x0006, 0x00, 0x5a00);
 
-	phy_write_mmd_indirect(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0x0000);
+	phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0x0000);
 }
 
 static void rtl8168e_2_hw_phy_config(struct rtl8169_private *tp,
-- 
2.39.2

[PATCH v2 08/11] net: phy: add deprecation warning to phy_{read,write,modify}_mmd_indirect

[Marco Felsch]

Add deprecation warnings and point to the new APIs user should use
instead.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
v2:
- new patch

 drivers/net/phy/phy.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 4cabb436e461..ad02732ff93b 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -850,6 +850,9 @@ int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad)
 {
 	u32 ret;
 
+	phydev_warn(phydev, "%s is deprectated use phy_read_mmd instead\n",
+		    __func__);
+
 	mmd_phy_indirect(phydev, devad, prtad);
 
 	/* Read the content of the MMD's selected register */
@@ -876,6 +879,9 @@ int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad)
 void phy_write_mmd_indirect(struct phy_device *phydev, int prtad, int devad,
 				   u16 data)
 {
+	phydev_warn(phydev, "%s is deprectated use phy_write_mmd instead\n",
+		    __func__);
+
 	mmd_phy_indirect(phydev, devad, prtad);
 
 	/* Write the data into MMD's selected register */
@@ -896,6 +902,9 @@ int phy_modify_mmd_indirect(struct phy_device *phydev, int prtad, int devad,
 {
 	int ret;
 
+	phydev_warn(phydev, "%s is deprectated use phy_modify_mmd instead\n",
+		    __func__);
+
 	ret = phy_read_mmd_indirect(phydev, prtad, devad);
 	if (ret < 0)
 		return ret;
-- 
2.39.2

[PATCH v2 09/11] net: phy: at803x: disable SmartEEE

[Marco Felsch]

The SmartEEE functionality can cause strange connection issues. Disable
it unconditional and leave it to the OS to enable it again.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
v2:
- always disable smarteee (afa)
- adapt commit message

 drivers/net/phy/at803x.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
index f0a14799234b..2e3e57b27ee6 100644
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c
@@ -59,6 +59,9 @@
  */
 #define AT8035_CLK_OUT_MASK			GENMASK(4, 3)
 
+#define AT803X_MMD3_SMARTEEE_CTL3		0x805d
+#define AT803X_MMD3_SMARTEEE_CTL3_LPI_EN	BIT(8)
+
 #define AT803X_CLK_OUT_STRENGTH_MASK		GENMASK(8, 7)
 #define AT803X_CLK_OUT_STRENGTH_FULL		0
 #define AT803X_CLK_OUT_STRENGTH_HALF		1
@@ -221,6 +224,12 @@ static int at803x_probe(struct phy_device *phydev)
 	return at803x_parse_dt(phydev);
 }
 
+static int at803x_smarteee_config(struct phy_device *phydev)
+{
+	return phy_modify_mmd(phydev, MDIO_MMD_PCS, AT803X_MMD3_SMARTEEE_CTL3,
+			      AT803X_MMD3_SMARTEEE_CTL3_LPI_EN, 0);
+}
+
 static int at803x_clk_out_config(struct phy_device *phydev)
 {
 	struct at803x_priv *priv = phydev->priv;
@@ -270,7 +279,15 @@ static int at803x_config_init(struct phy_device *phydev)
 	if (ret < 0)
 		return ret;
 
-	return at803x_clk_out_config(phydev);
+	ret = at803x_smarteee_config(phydev);
+	if (ret < 0)
+		return ret;
+
+	ret = at803x_clk_out_config(phydev);
+	if (ret < 0)
+		return ret;
+
+	return 0;
 }
 
 static struct phy_driver at803x_driver[] = {
-- 
2.39.2

[PATCH v2 10/11] net: phy: at803x: add disable hibernation mode support

[Marco Felsch]

This commit is based on Linux commit:

| commit 9ecf04016c87bcb33b44e24489d33618e2592f41
| Author: Wei Fang <wei.fang@nxp.com>
| Date:   Thu Aug 18 11:00:54 2022 +0800
|
|     net: phy: at803x: add disable hibernation mode support
|
|     When the cable is unplugged, the Atheros AR803x PHYs will enter
|     hibernation mode after about 10 seconds if the hibernation mode
|     is enabled and will not provide any clock to the MAC. But for
|     some MACs, this feature might cause unexpected issues due to the
|     logic of MACs.
|     Taking SYNP MAC (stmmac) as an example, if the cable is unplugged
|     and the "eth0" interface is down, the AR803x PHY will enter
|     hibernation mode. Then perform the "ifconfig eth0 up" operation,
|     the stmmac can't be able to complete the software reset operation
|     and fail to init it's own DMA. Therefore, the "eth0" interface is
|     failed to ifconfig up. Why does it cause this issue? The truth is
|     that the software reset operation of the stmmac is designed to
|     depend on the RX_CLK of PHY.
|     So, this patch offers an option for the user to determine whether
|     to disable the hibernation mode of AR803x PHYs.
|
|     Signed-off-by: Wei Fang <wei.fang@nxp.com>
|     Reviewed-by: Andrew Lunn <andrew@lunn.ch>
|     Signed-off-by: Jakub Kicinski <kuba@kernel.org>

The commit is adapted to always disable the hibernation mode instead of
making it optional since bootloaders require no special power
optimization.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
v2:
- adapt the commit message
- unconditional disable the hibernation mode (afa)

 drivers/net/phy/at803x.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
index 2e3e57b27ee6..b9e11025b86c 100644
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c
@@ -32,6 +32,9 @@
 #define AT803X_DEBUG_REG_5			0x05
 #define AT803X_DEBUG_TX_CLK_DLY_EN		BIT(8)
 
+#define AT803X_DEBUG_REG_HIB_CTRL		0x0b
+#define   AT803X_DEBUG_HIB_CTRL_PS_HIB_EN	BIT(15)
+
 /* AT803x supports either the XTAL input pad, an internal PLL or the
  * DSP as clock reference for the clock output pad. The XTAL reference
  * is only used for 25 MHz output, all other frequencies need the PLL.
@@ -131,6 +134,15 @@ static int at803x_disable_tx_delay(struct phy_device *phydev)
 				     AT803X_DEBUG_TX_CLK_DLY_EN, 0);
 }
 
+static int at803x_hibernation_mode_config(struct phy_device *phydev)
+{
+	/* The default after hardware reset is hibernation mode enabled. After
+	 * software reset, the value is retained.
+	 */
+	return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_HIB_CTRL,
+				     AT803X_DEBUG_HIB_CTRL_PS_HIB_EN, 0);
+}
+
 static bool at803x_match_phy_id(struct phy_device *phydev, u32 phy_id)
 {
 	struct phy_driver *drv = to_phy_driver(phydev->dev.driver);
@@ -287,6 +299,10 @@ static int at803x_config_init(struct phy_device *phydev)
 	if (ret < 0)
 		return ret;
 
+	ret = at803x_hibernation_mode_config(phydev);
+	if (ret < 0)
+		return ret;
+
 	return 0;
 }
 
-- 
2.39.2

[PATCH v2 11/11] net: phy: at803x: disable extended next page bit

[Marco Felsch]

This commit ports Linux commit:

| commit 3c51fa5d2afe7a4909b53af5019635326389dd29
| Author: Russell King <rmk+kernel@armlinux.org.uk>
| Date:   Tue Jan 12 22:59:43 2021 +0000
|
|     net: phy: ar803x: disable extended next page bit
|
|     This bit is enabled by default and advertises support for extended
|     next page support.  XNP is only needed for 10GBase-T and MultiGig
|     support which is not supported. Additionally, Cisco MultiGig switches
|     will read this bit and attempt 10Gb negotiation even though Next Page
|     support is disabled. This will cause timeouts when the interface is
|     forced to 100Mbps and auto-negotiation will fail. The interfaces are
|     only 1000Base-T and supporting auto-negotiation for this only requires
|     the Next Page bit to be set.
|
|     Taken from:
|     https://github.com/SolidRun/linux-stable/commit/7406c5244b7ea6bc17a2afe8568277a8c4b126a9
|     and adapted to mainline kernels by rmk.
|
|     Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
|     Reviewed-by: Andrew Lunn <andrew@lunn.ch>
|     Link: https://lore.kernel.org/r/E1kzSdb-000417-FJ@rmk-PC.armlinux.org.uk
|     Signed-off-by: Jakub Kicinski <kuba@kernel.org>

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
v2
- add afa's rb

 drivers/net/phy/at803x.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
index b9e11025b86c..8d6b879a27ab 100644
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c
@@ -303,7 +303,13 @@ static int at803x_config_init(struct phy_device *phydev)
 	if (ret < 0)
 		return ret;
 
-	return 0;
+	/* Ar803x extended next page bit is enabled by default. Cisco
+	 * multigig switches read this bit and attempt to negotiate 10Gbps
+	 * rates even if the next page bit is disabled. This is incorrect
+	 * behaviour but we still need to accommodate it. XNP is only needed
+	 * for 10Gbps support, so disable XNP.
+	 */
+	return phy_modify(phydev, MII_ADVERTISE, MDIO_AN_CTRL1_XNP, 0);
 }
 
 static struct phy_driver at803x_driver[] = {
-- 
2.39.2

Re: [PATCH v2 01/11] ARM: boards: make use of MDIO_MMD register defines

[Sascha Hauer]

On Fri, Aug 11, 2023 at 12:26:47PM +0200, Marco Felsch wrote:
> Make use of the register definition instead of having magic numbers. No
> functional change.
> 
> Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> ---
> v2:
> - added afa's rb

Applied, thanks

Sascha

> 
>  arch/arm/boards/datamodul-edm-qmx6/board.c   | 7 ++++---
>  arch/arm/boards/embest-marsboard/board.c     | 7 ++++---
>  arch/arm/boards/terasic-de0-nano-soc/board.c | 7 ++++---
>  arch/arm/boards/terasic-de10-nano/board.c    | 7 ++++---
>  arch/arm/boards/tqma6x/board.c               | 7 ++++---
>  5 files changed, 20 insertions(+), 15 deletions(-)
> 
> diff --git a/arch/arm/boards/datamodul-edm-qmx6/board.c b/arch/arm/boards/datamodul-edm-qmx6/board.c
> index 9adb3ee0f898..366b64d35aca 100644
> --- a/arch/arm/boards/datamodul-edm-qmx6/board.c
> +++ b/arch/arm/boards/datamodul-edm-qmx6/board.c
> @@ -11,6 +11,7 @@
>  #include <gpio.h>
>  #include <of.h>
>  
> +#include <linux/mdio.h>
>  #include <linux/micrel_phy.h>
>  #include <mfd/stmpe-i2c.h>
>  
> @@ -48,9 +49,9 @@ static int ksz9031rn_phy_fixup(struct phy_device *dev)
>  	 * min rx data delay, max rx/tx clock delay,
>  	 * min rx/tx control delay
>  	 */
> -	phy_write_mmd_indirect(dev, 4, 2, 0);
> -	phy_write_mmd_indirect(dev, 5, 2, 0);
> -	phy_write_mmd_indirect(dev, 8, 2, 0x03ff);
> +	phy_write_mmd_indirect(dev, 4, MDIO_MMD_WIS, 0);
> +	phy_write_mmd_indirect(dev, 5, MDIO_MMD_WIS, 0);
> +	phy_write_mmd_indirect(dev, 8, MDIO_MMD_WIS, 0x03ff);
>  
>  	return 0;
>  }
> diff --git a/arch/arm/boards/embest-marsboard/board.c b/arch/arm/boards/embest-marsboard/board.c
> index 7835a9265a3d..7274595e2a76 100644
> --- a/arch/arm/boards/embest-marsboard/board.c
> +++ b/arch/arm/boards/embest-marsboard/board.c
> @@ -9,6 +9,7 @@
>  #include <init.h>
>  #include <envfs.h>
>  #include <mach/imx/bbu.h>
> +#include <linux/mdio.h>
>  #include <linux/phy.h>
>  #include <deep-probe.h>
>  
> @@ -19,13 +20,13 @@ static int ar8035_phy_fixup(struct phy_device *dev)
>  	/* Ar803x phy SmartEEE feature cause link status generates glitch,
>  	 * which cause ethernet link down/up issue, so disable SmartEEE
>  	 */
> -	val = phy_read_mmd_indirect(dev, 0x805d, 0x3);
> +	val = phy_read_mmd_indirect(dev, 0x805d, MDIO_MMD_PCS);
>  	phy_write(dev, MII_MMD_DATA, val & ~(1 << 8));
>  
> -	val = phy_read_mmd_indirect(dev, 0x4003, 0x3);
> +	val = phy_read_mmd_indirect(dev, 0x4003, MDIO_MMD_PCS);
>  	phy_write(dev, MII_MMD_DATA, val & ~(1 << 8));
>  
> -	val = phy_read_mmd_indirect(dev, 0x4007, 0x3);
> +	val = phy_read_mmd_indirect(dev, 0x4007, MDIO_MMD_PCS);
>  	val &= 0xffe3;
>  	val |= 0x18;
>  	phy_write(dev, MII_MMD_DATA, val);
> diff --git a/arch/arm/boards/terasic-de0-nano-soc/board.c b/arch/arm/boards/terasic-de0-nano-soc/board.c
> index 19f74b784c12..832160c595fa 100644
> --- a/arch/arm/boards/terasic-de0-nano-soc/board.c
> +++ b/arch/arm/boards/terasic-de0-nano-soc/board.c
> @@ -5,6 +5,7 @@
>  #include <driver.h>
>  #include <init.h>
>  #include <asm/armlinux.h>
> +#include <linux/mdio.h>
>  #include <linux/micrel_phy.h>
>  #include <linux/phy.h>
>  #include <linux/sizes.h>
> @@ -18,9 +19,9 @@ static int phy_fixup(struct phy_device *dev)
>  	 * min rx data delay, max rx/tx clock delay,
>  	 * min rx/tx control delay
>  	 */
> -	phy_write_mmd_indirect(dev, 4, 2, 0);
> -	phy_write_mmd_indirect(dev, 5, 2, 0);
> -	phy_write_mmd_indirect(dev, 8, 2, 0x003ff);
> +	phy_write_mmd_indirect(dev, 4, MDIO_MMD_WIS, 0);
> +	phy_write_mmd_indirect(dev, 5, MDIO_MMD_WIS, 0);
> +	phy_write_mmd_indirect(dev, 8, MDIO_MMD_WIS, 0x003ff);
>  	return 0;
>  }
>  
> diff --git a/arch/arm/boards/terasic-de10-nano/board.c b/arch/arm/boards/terasic-de10-nano/board.c
> index 580c8980129f..e47d9ac841d1 100644
> --- a/arch/arm/boards/terasic-de10-nano/board.c
> +++ b/arch/arm/boards/terasic-de10-nano/board.c
> @@ -5,6 +5,7 @@
>  #include <driver.h>
>  #include <init.h>
>  #include <asm/armlinux.h>
> +#include <linux/mdio.h>
>  #include <linux/micrel_phy.h>
>  #include <linux/phy.h>
>  #include <linux/sizes.h>
> @@ -18,9 +19,9 @@ static int phy_fixup(struct phy_device *dev)
>  	 * min rx data delay, max rx/tx clock delay,
>  	 * min rx/tx control delay
>  	 */
> -	phy_write_mmd_indirect(dev, 4, 2, 0);
> -	phy_write_mmd_indirect(dev, 5, 2, 0);
> -	phy_write_mmd_indirect(dev, 8, 2, 0x003ff);
> +	phy_write_mmd_indirect(dev, 4, MDIO_MMD_WIS, 0);
> +	phy_write_mmd_indirect(dev, 5, MDIO_MMD_WIS, 0);
> +	phy_write_mmd_indirect(dev, 8, MDIO_MMD_WIS, 0x003ff);
>  	return 0;
>  }
>  
> diff --git a/arch/arm/boards/tqma6x/board.c b/arch/arm/boards/tqma6x/board.c
> index 4bb7223a6e7a..8a91ad652a98 100644
> --- a/arch/arm/boards/tqma6x/board.c
> +++ b/arch/arm/boards/tqma6x/board.c
> @@ -11,6 +11,7 @@
>  #include <gpio.h>
>  #include <of.h>
>  
> +#include <linux/mdio.h>
>  #include <linux/micrel_phy.h>
>  #include <mfd/stmpe-i2c.h>
>  
> @@ -46,9 +47,9 @@ static int ksz9031rn_phy_fixup(struct phy_device *dev)
>  	 * min rx data delay, max rx/tx clock delay,
>  	 * min rx/tx control delay
>  	 */
> -	phy_write_mmd_indirect(dev, 4, 2, 0);
> -	phy_write_mmd_indirect(dev, 5, 2, 0);
> -	phy_write_mmd_indirect(dev, 8, 2, 0x003ff);
> +	phy_write_mmd_indirect(dev, 4, MDIO_MMD_WIS, 0);
> +	phy_write_mmd_indirect(dev, 5, MDIO_MMD_WIS, 0);
> +	phy_write_mmd_indirect(dev, 8, MDIO_MMD_WIS, 0x003ff);
>  
>  	return 0;
>  }
> -- 
> 2.39.2
> 
> 
> 

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