Re: [PATCH v2] ARM: i.MX8M: esdctl: split memory banks for devices with >4G

[Marco Felsch <m.felsch@pengutronix.de>]

On 23-09-04, Sascha Hauer wrote:
> Hi Marco,
> 
> On Thu, Aug 31, 2023 at 04:47:24PM +0200, Marco Felsch wrote:
> > At the moment the whole available memory is added to one single memory
> > bank "ram0". This can cause barebox chainload issues on devices with a
> > huge amount of memory like the i.MX8MP-EVK which has 6G of RAM if the
> > barebox pbl binary is to large.
> > 
> > The reason for this issues is that memory_bank_first_find_space()
> > returns the memory area with the largest amount of free space on the
> > first memory bank. So in case of Debix SOM-A 8G and i.MX8MP-EVK 6G this
> > is the area crossing the 4G boundary. This cause the barebox pbl code to
> > trigger a MMU exception once the early MMU gets enabled which is
> > configured for sizes <=4G.
> > 
> > Split the memory space into two memory banks: "ram0" and "ram1" to fix
> > this issue.
> 
> In the long run we'll need a proper solution for this. I think this

Of course but I didn't wanted to step into this hole ;)

> patch is fine for now, but please add a comment why we are doing this.
> Otherwise we might remove this superfluous code at some point.

Sure, I will add a comment.

Regards,
  Marco

> 
> Sascha
> 
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